公开(公告)号：US08344788B2

公开(公告)日：2013-01-01

申请号：US13010024

申请日：2011-01-20

申请人： Shunpei Yamazaki ,  Jun Koyama

发明人： Shunpei Yamazaki ,  Jun Koyama

IPC分类号： H03K17/687

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/45 ,  H01L29/78645 ,  H03K17/0822

摘要： The semiconductor device includes a power element which is in an on state when voltage is not applied to a gate, a switching field-effect transistor for applying first voltage to the gate of the power element, and a switching field-effect transistor for applying voltage lower than the first voltage to the gate of the power element. The switching field-effect transistors have small off-state current.

公开(公告)号：US08344374B2

公开(公告)日：2013-01-01

申请号：US12898366

申请日：2010-10-05

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Yasuo Nakamura ,  Junpei Sugao ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Yasuo Nakamura ,  Junpei Sugao ,  Hideki Uochi

IPC分类号： H01L29/10

CPC分类号： H01L29/78669 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78678 ,  H01L29/7869

摘要： It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.

摘要翻译： 本发明的目的是提供一种由具有良好的显示质量的显示装置代表的半导体器件，其中在半导体层和电极之间的连接部分中产生的寄生电阻被抑制，并且具有诸如电压降等的不利影响 防止由于布线电阻而导致像素的信号布线，灰度级的缺陷等。 为了实现上述目的，根据本发明的半导体器件可以具有这样的结构，其中具有低电阻的布线连接到薄膜晶体管，其中包括具有高氧亲和力的金属的源电极和漏电极是 连接到具有抑制的杂质浓度的氧化物半导体层。 另外，包含氧化物半导体的薄膜晶体管也可以被要被密封的绝缘膜包围。

公开(公告)号：US20120326951A1

公开(公告)日：2012-12-27

申请号：US13529129

申请日：2012-06-21

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

IPC分类号： G09G3/30

CPC分类号： G02F1/1345

摘要： To provide a display device with little signal delay and a display device that can operate with low power consumption, parasitic capacitance between a common wiring that applies a common potential to a plurality of pixels and signal lines that input signals for driving the pixels is avoided. Specifically, the common wiring is routed outwardly with respect to an external input terminal to which a signal is input from the, outside, to avoid intersections of the signal lines and the common wiring. Thus, parasitic capacitance between the common wiring and the signal lines is avoided, so that the display device can operate at high speed with low power consumption.

摘要翻译： 为了提供几乎没有信号延迟的显示装置和能够以低功耗工作的显示装置，避免了对多个像素施加共同电位的公共布线与输入用于驱动像素的信号的信号线之间的寄生电容。 具体地，公共布线相对于从外部输入信号的外部输入端子向外布线，以避免信号线和公共布线的交叉。 因此，避免了公共布线和信号线之间的寄生电容，使得显示装置能够以低功耗高速运行。

公开(公告)号：US08330670B2

公开(公告)日：2012-12-11

申请号：US13189852

申请日：2011-07-25

申请人： Shunpei Yamazaki ,  Jun Koyama

发明人： Shunpei Yamazaki ,  Jun Koyama

IPC分类号： G09G5/00

CPC分类号： G06F3/1423 ,  F21V9/14 ,  F21V21/00 ,  G09G3/2022 ,  G09G3/30 ,  G09G3/3258 ,  G09G3/3266 ,  G09G5/393 ,  G09G5/395 ,  G09G2300/023 ,  G09G2300/0842 ,  G09G2310/0251 ,  G09G2340/0492 ,  G09G2360/14 ,  G09G2360/142 ,  H01L27/14678 ,  H01L27/3244 ,  H01L27/3269 ,  H01L2251/5323

摘要： In a conventional display device comprising a sub-display, the display device is increased in thickness and in the number of components as the number of displays is increased. In the present invention, a dual emission display device is used so that either surface of a display is used as a main display or a sub-display. Accordingly, the display device can be reduced in thickness and in the number of components. Further, mechanical reliability can be enhanced when the invention is applied to a tablet PC, a video camera and the like.

摘要翻译： 在包括子显示器的常规显示装置中，随着显示数量的增加，显示装置的厚度和部件数量增加。 在本发明中，使用双重显示装置，使得显示器的任一表面被用作主显示器或副显示器。 因此，显示装置的厚度和部件数量可以减少。 此外，当将本发明应用于平板PC，摄像机等时，可以提高机械可靠性。

公开(公告)号：USRE43782E1

公开(公告)日：2012-11-06

申请号：US10960897

申请日：2004-10-08

申请人： Jun Koyama ,  Hisashi Ohtani ,  Yasushi Ogata ,  Shunpei Yamazaki

发明人： Jun Koyama ,  Hisashi Ohtani ,  Yasushi Ogata ,  Shunpei Yamazaki

IPC分类号： H01L29/04 ,  H01L29/15 ,  H04B10/00

CPC分类号： G02F1/13454 ,  G02F1/136227 ,  H01L27/124

摘要： A wiring line to which a high-frequency signal is applied is electrically connected in parallel to an auxiliary wiring line via a plurality of contact holes. The contact holes are formed through an interlayer insulating film and arranged in vertical direction to the wiring line. Since the auxiliary wiring line is formed in the same layer as an electrode that constitutes a TFT, the electric resistance of the wiring line can be reduced effectively and waveform rounding of an applied high-frequency signal can be reduced without increasing the number of manufacturing steps.

摘要翻译： 施加高频信号的布线经由多个接触孔与辅助布线并联电连接。 接触孔通过层间绝缘膜形成并且布置在与布线的垂直方向上。 由于辅助布线形成在与构成TFT的电极相同的层中，因此可以有效地降低布线的电阻，并且可以减少施加的高频信号的波形舍入，而不增加制造步骤的数量 。

公开(公告)号：US08289164B2

公开(公告)日：2012-10-16

申请号：US12846104

申请日：2010-07-29

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Mai Akiba

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Mai Akiba

IPC分类号： G08B13/14

CPC分类号： H01L27/1266 ,  H01L27/1214 ,  H01L27/1218 ,  H01L29/78603 ,  Y10T29/49117

摘要： A semiconductor device typified by a wireless tag, which has improved mechanical strength, can be formed by a more simple process at a low cost and prevent radio waves from being shielded, and a manufacturing method of the semiconductor device. According to the invention, a wireless tag includes a thin film integrated circuit formed of an isolated TFT having a thin film semiconductor film. The wireless tag may be attached directly to an object, or attached to a flexible support such as plastic and paper before being attached to an object. The wireless tag of the invention may include an antenna as well as the thin film integrated circuit. The antenna allows to communicate signals between a reader/writer and the thin film integrated circuit, and to supply a power source voltage from the reader/writer to the thin film integrated circuit.

摘要翻译： 可以通过更简单的方法以低成本的方法形成具有改善的机械强度的无线标签代表的半导体器件，并且防止无线电波被屏蔽，以及半导体器件的制造方法。 根据本发明，无线标签包括由具有薄膜半导体膜的隔离TFT形成的薄膜集成电路。 无线标签可以在被附接到对象之前直接附着到物体上，或者附着到诸如塑料和纸张之类的柔性支撑件上。 本发明的无线标签可以包括天线以及薄膜集成电路。 该天线允许在读/写器和薄膜集成电路之间通信信号，并将读取器/写入器的电源电压提供给薄膜集成电路。

公开(公告)号：US08252637B2

公开(公告)日：2012-08-28

申请号：US13116379

申请日：2011-05-26

申请人： Shunpei Yamazaki ,  Jun Koyama

发明人： Shunpei Yamazaki ,  Jun Koyama

IPC分类号： H01L21/00

CPC分类号： H01L29/78696 ,  H01L27/124 ,  H01L27/127 ,  H01L27/3262 ,  H01L29/4908 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78627 ,  H01L33/0041 ,  H01L2029/7863

摘要： The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring resistance. One of the features of the present invention is that an LDD region including a region which overlaps with a gate electrode and a region which does not overlap with the gate electrode is provided in one TFT. Another feature of the present invention is that gate electrode comprises a first conductive layer and a second conductive layer and portion of the gate wiring has a clad structure comprising the first conductive layer and the second conductive layer with a low resistance layer interposed therebetween.

摘要翻译： 本发明的目的是提供一种包括具有低布线电阻的大面积集成电路的TFT的可靠的半导体器件。 本发明的特征之一是在一个TFT中设置包括与栅电极重叠的区域和不与栅电极重叠的区域的LDD区域。 本发明的另一特征在于，栅电极包括第一导电层和第二导电层，并且栅极布线的一部分具有包含第一导电层和第二导电层的包层结构，其间具有低电阻层。

公开(公告)号：US08237179B2

公开(公告)日：2012-08-07

申请号：US13241351

申请日：2011-09-23

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Tatsuya Arao ,  Munehiro Azami

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Tatsuya Arao ,  Munehiro Azami

IPC分类号： H01L33/00

CPC分类号： H01L27/3265 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3246 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/78633

摘要： A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.

摘要翻译： 提供一种可以防止由于泄漏或其它原因引起的栅极电压变化并且同时可以防止开口率降低的发光器件。 电容器存储器由连接布线，绝缘膜和电容布线形成。 连接布线形成在栅电极和像素的TFT的有源层上，并与有源层连接。 绝缘膜形成在连接布线上。 电容布线形成在绝缘膜上。 这种结构使得电容器存储与TFT重叠，从而在保持开口率降低的同时增加电容器存储的容量。 因此，可以避免由于泄漏或其他原因导致的栅极电压的变化，以防止OLED的亮度变化和模拟驱动中屏幕的闪烁。

公开(公告)号：US08227806B2

公开(公告)日：2012-07-24

申请号：US11787749

申请日：2007-04-17

申请人： Shunpei Yamazaki ,  Yasuyuki Arai ,  Jun Koyama

发明人： Shunpei Yamazaki ,  Yasuyuki Arai ,  Jun Koyama

IPC分类号： H01L29/04 ,  H01L29/786

CPC分类号： H01L27/1222 ,  G02F1/13454 ,  H01L23/552 ,  H01L23/60 ,  H01L24/83 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/14601 ,  H01L29/78621 ,  H01L29/78624 ,  H01L2924/00011 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2224/83851 ,  H01L2924/00

摘要： A p channel TFT of a driving circuit has a single drain structure and its n channel TFT, a GOLD structure or an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel portion is connected to the pixel TFT through a hole bored in at least a protective insulation film formed of an inorganic insulating material and formed above a gate electrode of the pixel TFT, and in an interlayer insulating film disposed on the insulation film in close contact therewith. These process steps use 6 to 8 photo-masks.

摘要翻译： 驱动电路的p沟道TFT具有单个漏极结构及其n沟道TFT，GOLD结构或LDD结构。 像素TFT具有LDD结构。 设置在像素部分中的像素电极通过在至少由无机绝缘材料形成的保护绝缘膜中钻孔并形成在像素TFT的栅电极之上的孔连接到像素TFT，并且在设置在像素TFT上的层间绝缘膜中 绝缘膜与其紧密接触。 这些处理步骤使用6到8张照片掩模。

公开(公告)号：US20120161145A1

公开(公告)日：2012-06-28

申请号：US13336335

申请日：2011-12-23

申请人： Jun Koyama ,  Shunpei Yamazaki

发明人： Jun Koyama ,  Shunpei Yamazaki

IPC分类号： H01L29/78 ,  H01L27/06

CPC分类号： H01L27/1225 ,  G11C16/0416 ,  H01L27/1156

摘要： An object is at least one of a longer data retention period of a memory circuit, a reduction in power consumption, a smaller circuit area, and an increase in the number of times written data can be read to one data writing operation. The memory circuit has a first field-effect transistor, a second field-effect transistor, and a rectifier element including a pair of current terminals. A data signal is input to one of a source and a drain of the first field-effect transistor. A gate of the second field-effect transistor is electrically connected to the other of the source and the drain of the first field-effect transistor. One of the pair of current terminals of the rectifier element is electrically connected to a source or a drain of the second field-effect transistor.

摘要翻译： 目的是存储电路的较长的数据保持期间，功耗的降低，较小的电路面积以及写入的数据的次数的增加可以读取到一个数据写入操作中的至少一个。 存储电路具有第一场效应晶体管，第二场效应晶体管和包括一对电流端子的整流元件。 数据信号被输入到第一场效应晶体管的源极和漏极之一。 第二场效应晶体管的栅极电连接到第一场效应晶体管的源极和漏极中的另一个。 整流元件的一对电流端子之一与第二场效应晶体管的源极或漏极电连接。