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    Semiconductor device structures with self-aligned doped regions and methods for forming such semiconductor device structures
    63.
    发明授权
    Semiconductor device structures with self-aligned doped regions and methods for forming such semiconductor device structures 失效
    具有自对准掺杂区域的半导体器件结构和用于形成这种半导体器件结构的方法

    公开(公告)号：US07898014B2

    公开(公告)日：2011-03-01

    申请号：US11393142

    申请日：2006-03-30

    申请人： Kangguo Cheng ,  Louis Lu-Chen Hsu ,  Jack Allan Mandelman

    发明人： Kangguo Cheng ,  Louis Lu-Chen Hsu ,  Jack Allan Mandelman

    IPC分类号： H01L27/108

    CPC分类号： H01L27/10841 ,  H01L27/10864

    摘要： Semiconductor device structures with self-aligned doped regions and methods for forming such semiconductor device structures. The semiconductor structure comprises first and second doped regions of a first conductivity type defined in the semiconductor material of a substrate bordering a sidewall of a trench. An intervening region of the semiconductor material separates the first and second doped regions. A third doped region is defined in the semiconductor material bordering the sidewall of the trench and disposed between the first and second doped regions. The third doped region is doped to have a second conductivity type opposite to the first conductivity type. Methods for forming the doped regions involve depositing either a layer of a material doped with both dopants or different layers each doped with one of the dopants in the trench and, then, diffusing the dopants from the layer or layers into the semiconductor material bordering the trench sidewall.

    摘要翻译： 具有自对准掺杂区域的半导体器件结构和用于形成这种半导体器件结构的方法。 半导体结构包括限定在与沟槽的侧壁相邻的衬底的半导体材料中的第一导电类型的第一和第二掺杂区域。 半导体材料的中间区域分离第一和第二掺杂区域。 第三掺杂区域限定在与沟槽的侧壁接壤并且设置在第一和第二掺杂区域之间的半导体材料中。 第三掺杂区被掺杂以具有与第一导电类型相反的第二导电类型。 用于形成掺杂区域的方法包括沉积掺杂有掺杂剂或不同层的材料的层，每个掺杂剂或不同的层在沟槽中掺杂有一种掺杂剂，然后将掺杂剂从层或层扩散到与沟槽接壤的半导体材料 侧壁。

    Electronic fuses in semiconductor integrated circuits
    64.
    发明授权
    Electronic fuses in semiconductor integrated circuits 失效
    半导体集成电路中的电子保险丝

    公开(公告)号：US07785934B2

    公开(公告)日：2010-08-31

    申请号：US11680131

    申请日：2007-02-28

    申请人： Louis Lu-Chen Hsu ,  Jack Allan Mandelman ,  William Robert Tonti ,  Chih-Chao Yang

    发明人： Louis Lu-Chen Hsu ,  Jack Allan Mandelman ,  William Robert Tonti ,  Chih-Chao Yang

    IPC分类号： H01L21/82

    CPC分类号： H01L23/5256 ,  H01L21/76807 ,  H01L21/76892 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

    摘要： A structure fabrication method. The method includes providing a structure. The structure includes (a) a substrate layer, (b) a first fuse electrode in the substrate layer, and (c) a fuse dielectric layer on the substrate layer and the first fuse electrode. The method further includes (i) forming an opening in the fuse dielectric layer such that the first fuse electrode is exposed to a surrounding ambient through the opening, (ii) forming a fuse region on side walls and bottom walls of the opening such that the fuse region is electrically coupled to the first fuse electrode, and (iii) after said forming the fuse region, filling the opening with a dielectric material.

    摘要翻译： 一种结构制造方法。 该方法包括提供结构。 该结构包括（a）衬底层，（b）衬底层中的第一熔丝电极，以及（c）衬底层和第一熔丝电极上的熔丝绝缘层。 该方法还包括（i）在熔丝电介质层中形成开口，使得第一熔丝电极通过开口暴露于周围环境，（ii）在开口的侧壁和底壁上形成保险丝区域，使得 熔融区域电耦合到第一熔丝电极，以及（iii）在形成熔丝区域之后，用电介质材料填充该开口。

    Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates
    67.
    发明授权
    Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates 失效
    用于形成这种混合取向基板的混合取向基板和晶体压印方法

    公开(公告)号：US07651929B2

    公开(公告)日：2010-01-26

    申请号：US11928456

    申请日：2007-10-30

    申请人： Louis Lu-Chen Hsu ,  Jack Allan Mandelman ,  William Robert Tonti

    发明人： Louis Lu-Chen Hsu ,  Jack Allan Mandelman ,  William Robert Tonti

    IPC分类号： H01L21/20

    CPC分类号： H01L27/1203 ,  H01L21/84 ,  H01L29/045

    摘要： A semiconductor structure with an insulating layer on a silicon substrate, a plurality of electrically-isolated silicon-on-insulator (SOI) regions separated from the substrate by the insulating layer, and a plurality of electrically-isolated silicon bulk regions extending through the insulating layer to the substrate. Each of one number of the SOI regions is oriented with a first crystal orientation and each of another number of the SOI regions is oriented with a second crystal orientation that differs from the first crystal orientation. The bulk silicon regions are each oriented with a third crystal orientation. Damascene or imprinting methods of forming the SOI regions and bulk silicon regions are also provided.

    摘要翻译： 一种在硅衬底上具有绝缘层的半导体结构，通过绝缘层从衬底分离出的多个电隔离绝缘体上硅（SOI）区域，以及延伸穿过绝缘体的多个电隔离硅体区域 层到基底。 SOI区域中的每一个以第一晶体取向取向，并且另外数量的SOI区域中的每一个以与第一晶体取向不同的第二晶体取向取向。 体硅区域各自定向为具有第三晶体取向。 还提供了形成SOI区域和体硅区域的镶嵌或印刷方法。

    SEMICONDUCTOR DEVICE STRUCTURES FOR BIPOLAR JUNCTION TRANSISTORS AND METHODS OF FABRICATING SUCH STRUCTURES
    69.
    发明申请
    SEMICONDUCTOR DEVICE STRUCTURES FOR BIPOLAR JUNCTION TRANSISTORS AND METHODS OF FABRICATING SUCH STRUCTURES 失效
    双极晶体管的半导体器件结构和制作这种结构的方法

    公开(公告)号：US20080220583A1

    公开(公告)日：2008-09-11

    申请号：US12125342

    申请日：2008-05-22

    申请人： Kangguo Cheng ,  Louis Lu-Chen Hsu ,  Jack Allan Mandelman

    发明人： Kangguo Cheng ,  Louis Lu-Chen Hsu ,  Jack Allan Mandelman

    IPC分类号： H01L21/331

    CPC分类号： H01L29/732 ,  H01L29/66265

    摘要： Semiconductor device structures for use with bipolar junction transistors and methods of fabricating such semiconductor device structures. The semiconductor device structure comprises a semiconductor body having a top surface and sidewalls extending from the top surface to an insulating layer, a first region including a first semiconductor material with a first conductivity type, and a second region including a second semiconductor material with a second conductivity type. The first and second regions each extend across the top surface and the sidewalls of the semiconductor body. The device structure further comprises a junction defined between the first and second regions and extending across the top surface and the sidewalls of the semiconductor body.

    摘要翻译： 用于双极结晶体管的半导体器件结构和制造这种半导体器件结构的方法。 半导体器件结构包括具有顶表面和从顶表面延伸到绝缘层的侧壁的半导体本体，包括具有第一导电类型的第一半导体材料的第一区域和包括具有第二导电类型的第二半导体材料的第二区域 导电类型。 第一和第二区域各自延伸穿过半导体本体的顶表面和侧壁。 器件结构还包括限定在第一和第二区域之间并且跨越半导体本体的顶表面和侧壁延伸的接合部。

    ELECTRONIC FUSES IN SEMICONDUCTOR INTEGRATED CIRCUITS
    70.
    发明申请
    ELECTRONIC FUSES IN SEMICONDUCTOR INTEGRATED CIRCUITS 失效
    半导体集成电路中的电子熔丝

    公开(公告)号：US20080206978A1

    公开(公告)日：2008-08-28

    申请号：US11680131

    申请日：2007-02-28

    申请人： Louis Lu-Chen Hsu ,  Jack Allan Mandelman ,  William Robert Tonti ,  Chih-Chao Yang

    发明人： Louis Lu-Chen Hsu ,  Jack Allan Mandelman ,  William Robert Tonti ,  Chih-Chao Yang

    IPC分类号： H01L23/525 ,  H01L21/44 ,  H01L29/00

    CPC分类号： H01L23/5256 ,  H01L21/76807 ,  H01L21/76892 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

    摘要： A structure fabrication method. The method includes providing a structure. The structure includes (a) a substrate layer, (b) a first fuse electrode in the substrate layer, and (c) a fuse dielectric layer on the substrate layer and the first fuse electrode. The method further includes (i) forming an opening in the fuse dielectric layer such that the first fuse electrode is exposed to a surrounding ambient through the opening, (ii) forming a fuse region on side walls and bottom walls of the opening such that the fuse region is electrically coupled to the first fuse electrode, and (iii) after said forming the fuse region, filling the opening with a dielectric material.

    摘要翻译： 一种结构制造方法。 该方法包括提供结构。 该结构包括（a）衬底层，（b）衬底层中的第一熔丝电极，以及（c）衬底层和第一熔丝电极上的熔丝绝缘层。 该方法还包括（i）在熔丝电介质层中形成开口，使得第一熔丝电极通过开口暴露于周围环境，（ii）在开口的侧壁和底壁上形成保险丝区域，使得 熔融区域电耦合到第一熔丝电极，以及（iii）在形成熔丝区域之后，用电介质材料填充该开口。