利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

237 条记录 (耗时 0.045 秒)

    Method for forming mixed high voltage (HV/LV) transistors for CMOS devices using controlled gate depletion
    4.
    发明授权
    Method for forming mixed high voltage (HV/LV) transistors for CMOS devices using controlled gate depletion 失效
    用于使用受控栅极耗尽的CMOS器件形成混合高压（HV / LV）晶体管的方法

    公开(公告)号：US06436749B1

    公开(公告)日：2002-08-20

    申请号：US09658655

    申请日：2000-09-08

    申请人： William R. Tonti ,  Claude L. Bertin ,  Jeffrey P. Gambino ,  Russell J. Houghton ,  Jack A. Mandelman ,  Wilbur D. Pricer

    发明人： William R. Tonti ,  Claude L. Bertin ,  Jeffrey P. Gambino ,  Russell J. Houghton ,  Jack A. Mandelman ,  Wilbur D. Pricer

    IPC分类号： H01L218238

    CPC分类号： H01L27/092 ,  H01L21/823842

    摘要： A method for forming mixed high voltage/low voltage (HV/LV) transistors for CMOS devices is disclosed. In an exemplary embodiment, depletion of the gate conductor is controlled by leaving a fixed region of the gate conductor intrinsic, or lightly doped, thus separating the heavily doped low resistivity portion of the electrode with an intrinsic region by use of a conducting dopant barrier. The barrier is conductive in nature, but acts as a well-controlled diffusion barrier, stopping the “fast” diffusion which normally takes place in polysilicon, and eliminating diffusion between the conductors. Thereby, the device performance may be precisely predicted by carefully controlling the gate conductor thickness.

    摘要翻译： 公开了一种用于形成用于CMOS器件的混合高压/低压（HV / LV）晶体管的方法。 在示例性实施例中，通过将栅极导体的固定区域固有或轻掺杂来控制栅极导体的耗尽，从而通过使用导电掺杂剂屏障将本征区域的重掺杂低电阻率部分与本征区域分离。 阻挡层本质上是导电的，但是作为良好控制的扩散屏障，停止通常在多晶硅中发生的“快速”扩散，并消除导体之间的扩散。 因此，可以通过仔细地控制栅极导体厚度来精确地预测器件性能。

    Logic elements comprising carbon nanotube field effect transistor (CNTFET) devices and methods of making same
    5.
    发明授权
    Logic elements comprising carbon nanotube field effect transistor (CNTFET) devices and methods of making same 有权
    包括碳纳米管场效应晶体管（CNTFET）器件的逻辑元件及其制造方法

    公开(公告)号：US09362390B2

    公开(公告)日：2016-06-07

    申请号：US13579828

    申请日：2011-02-22

    申请人： Claude L. Bertin

    发明人： Claude L. Bertin

    IPC分类号： H01L29/78 ,  B82Y10/00 ,  H01L51/00 ,  H03K19/20 ,  H01L21/02 ,  H01L29/16 ,  H01L27/28 ,  H01L51/05 ,  B82Y40/00

    CPC分类号： H01L27/283 ,  B82Y10/00 ,  B82Y40/00 ,  G06F17/5045 ,  H01L21/02376 ,  H01L29/16 ,  H01L29/78 ,  H01L51/0048 ,  H01L51/0558 ,  H01L51/0566 ,  H01L51/105 ,  H03K19/20 ,  Y10S977/742

    摘要： Inverter circuits and NAND circuits comprising nanotube based FETs and methods of making the same are described. Such circuits can be fabricating using field effect transistors comprising a source, a drain, a channel region, and a gate, wherein the first channel region includes a fabric of semiconducting nanotubes of a given conductivity type. Such FETs can be arranged to provide inverter circuits in either two-dimension or three-dimensional (stacked) layouts. Design equations based upon consideration of the electrical characteristics of the nanotubes are described which permit optimization of circuit design layout based upon constants that are indicative of the current carrying capacity of the nanotube fabrics of different FETs.

    摘要翻译： 描述了包括基于纳米管的FET的逆变器电路和NAND电路及其制造方法。 这样的电路可以使用包括源极，漏极，沟道区和栅极的场效应晶体管来制造，其中第一沟道区包括具有给定导电类型的半导体纳米管的织物。 这样的FET可以被布置成以二维或三维（堆叠）布局提供逆变器电路。 描述了基于对纳米管的电特性的考虑的设计方程，其基于指示不同FET的纳米管织物的载流能力的常数来优化电路设计布局。

    Method of making sensor platform using a non-horizontally oriented nanotube element
    7.
    发明授权
    Method of making sensor platform using a non-horizontally oriented nanotube element 有权
    使用非水平取向的纳米管元件制造传感器平台的方法

    公开(公告)号：US08357559B2

    公开(公告)日：2013-01-22

    申请号：US12469402

    申请日：2009-05-20

    申请人： Brent M. Segal ,  Thomas Rueckes ,  Bernhard Vogeli ,  Darren K. Brock ,  Venkatachalam C. Jaiprakash ,  Claude L. Bertin

    发明人： Brent M. Segal ,  Thomas Rueckes ,  Bernhard Vogeli ,  Darren K. Brock ,  Venkatachalam C. Jaiprakash ,  Claude L. Bertin

    IPC分类号： H01L21/00

    CPC分类号： G01N27/4146 ,  B82Y15/00 ,  G11C13/025 ,  Y10S977/902 ,  Y10S977/904 ,  Y10S977/92 ,  Y10S977/921 ,  Y10S977/922 ,  Y10S977/924 ,  Y10T29/43 ,  Y10T29/49082

    摘要： Sensor platforms and methods of making them are described. A platform having a non-horizontally oriented sensor element comprising one or more nanostructures such as nanotubes is described. Under certain embodiments, a sensor element has or is made to have an affinity for an analyte. Under certain embodiments, such a sensor element comprises one or more pristine nanotubes. Under certain embodiments, the sensor element comprises derivatized or functionalized nanotubes. Under certain embodiments, a sensor is made by providing a support structure; providing one or more nanotubes on the structure to provide material for a sensor element; and providing circuitry to electrically sense the sensor element's electrical characterization. Under certain embodiments, the sensor element comprises pre-derivatized or pre-functionalized nanotubes. Under other embodiments, sensor material is derivatized or functionalized after provision on the structure or after patterning. Under certain embodiments, a large-scale array of sensor platforms includes a plurality of sensor elements.

    摘要翻译： 介绍传感器平台及其制作方法。 描述了具有包括一个或多个纳米结构如纳米管的非水平定向的传感器元件的平台。 在某些实施方案中，传感器元件具有或被制成对分析物具有亲和性。 在某些实施例中，这种传感器元件包括一个或多个原始纳米管。 在某些实施方案中，传感器元件包括衍生的或功能化的纳米管。 在某些实施例中，通过提供支撑结构来制造传感器; 在所述结构上提供一个或多个纳米管以提供用于传感器元件的材料; 以及提供用于电感测传感器元件电特性的电路。 在某些实施方案中，传感器元件包括预衍生的或预功能化的纳米管。 在其它实施例中，传感器材料在结构上提供之后或在图案化之后被衍生化或功能化。 在某些实施例中，传感器平台的大规模阵列包括多个传感器元件。

    Nonvolatile resistive memories having scalable two-terminal nanotube switches
    9.
    发明授权
    Nonvolatile resistive memories having scalable two-terminal nanotube switches 有权
    具有可扩展的两端纳米管开关的非易失性电阻存储器

    公开(公告)号：US08102018B2

    公开(公告)日：2012-01-24

    申请号：US11835612

    申请日：2007-08-08

    申请人： Claude L. Bertin ,  Thomas Rueckes ,  Jonathan W. Ward ,  Frank Guo ,  Steven L. Konsek ,  Mitchell Meinhold

    发明人： Claude L. Bertin ,  Thomas Rueckes ,  Jonathan W. Ward ,  Frank Guo ,  Steven L. Konsek ,  Mitchell Meinhold

    IPC分类号： G11C11/56 ,  G11C5/00 ,  H01L29/00

    CPC分类号： B82Y10/00 ,  G11C11/56 ,  G11C13/003 ,  G11C13/025 ,  G11C19/00 ,  G11C29/86 ,  G11C2213/19 ,  G11C2213/75 ,  G11C2213/79 ,  H01L27/101 ,  H01L27/1052 ,  H01L27/112 ,  H01L27/11206

    摘要： A non-volatile resistive memory is provided. The memory includes at least one non-volatile memory cell and selection circuitry. Each memory cell has a two-terminal nanotube switching device having and a nanotube fabric article disposed between and in electrical communication with two conductive terminals. Selection circuitry is operable to select the two-terminal nanotube switching device for read and write operations. Write control circuitry, responsive to a control signal, supplies write signals to a selected memory cell to induce a change in the resistance of the nanotube fabric article, the resistance corresponding to an informational state of the memory cell. Resistance sensing circuitry in communication with a selected nonvolatile memory cell, senses the resistance of the nanotube fabric article and provides the control signal to the write control circuitry. Read circuitry reads the corresponding informational state of the memory cell.

    摘要翻译： 提供了非易失性电阻性存储器。 存储器包括至少一个非易失性存储单元和选择电路。 每个存储单元具有两端纳米管切换装置，其具有设置在两个导电端子之间并与两个导电端子电连通的纳米管织物制品。 选择电路可操作以选择用于读和写操作的两端纳米管切换装置。 响应于控制信号的写控制电路向所选存储单元提供写入信号，以引起纳米管织物物品的电阻变化，该电阻对应于存储单元的信息状态。 与所选择的非易失性存储器单元通信的电阻感测电路感测纳米管织物制品的电阻并将控制信号提供给写入控制电路。 读取电路读取存储单元的相应信息状态。