公开(公告)号：USRE50029E1

公开(公告)日：2024-07-02

申请号：US17230173

申请日：2021-04-14

Applicant: Micron Technology, Inc.

Inventor： Scott E. Sills ,  Gurtej S. Sandhu

IPC: B81C1/00 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/02 ,  H01L21/033 ,  H01L21/311 ,  H01L29/02 ,  H01L29/06 ,  H01L29/66

CPC classification number: B81C1/00031 ,  B81C1/00206 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/02118 ,  H01L21/02227 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31138 ,  H01L29/02 ,  H01L29/0665 ,  H01L29/66007

Abstract: A method of forming a nanostructure comprises forming a directed self-assembly of nucleic acid structures on a patterned substrate. The patterned substrate comprises multiple regions. Each of the regions on the patterned substrate is specifically tailored for adsorption of specific nucleic acid structure in the directed self-assembly.

公开(公告)号：US20240206152A1

公开(公告)日：2024-06-20

申请号：US18542299

申请日：2023-12-15

Applicant: Micron Technology, Inc.

Inventor： Kamal M. Karda ,  Haitao Liu ,  Scott E. Sills ,  Si-Woo Lee

IPC: H10B12/00 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H10B12/31 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696 ,  H10B12/03 ,  H10B12/05 ,  H10B12/482

Abstract: Systems, methods and apparatus are provided for a hybrid gate dielectric access device for vertical three-dimensional (3D) memory. The memory cell has a first horizontally oriented access device having a first source/drain region and a second source/drain region separated by a first channel region. The first access device is operatively controlled by a first gate. A hybrid gate dielectric separates the gate from the channel region and a horizontally oriented storage node coupled to the second source/drain region of the access device.

公开(公告)号：US20240183522A1

公开(公告)日：2024-06-06

申请号：US18439670

申请日：2024-02-12

Applicant: Micron Technology, Inc.

Inventor： Scott E. Sills

IPC: F21V29/67 ,  F21V7/00 ,  F21V7/05 ,  F21V9/30 ,  F21V13/04 ,  F21V13/14 ,  F21V29/507 ,  F21V29/74 ,  F21V29/80 ,  F21V29/83 ,  F21Y115/10 ,  H01L33/48 ,  H01L33/60

CPC classification number: F21V29/67 ,  F21V7/0008 ,  F21V9/30 ,  F21V13/14 ,  F21V29/673 ,  F21V29/83 ,  F21V7/005 ,  F21V7/05 ,  F21V13/04 ,  F21V29/507 ,  F21V29/74 ,  F21V29/80 ,  F21Y2115/10 ,  H01L33/48 ,  H01L33/60

Abstract: A solid state lighting (SSL) with a solid state emitter (SSE) having thermally conductive projections extending into an air channel, and methods of making and using such SSLs. The thermally conductive projections can be fins, posts, or other structures configured to transfer heat into a fluid medium, such as air. The projections can be electrical contacts between the SSE and a power source. The air channel can be oriented generally vertically such that air in the channel warmed by the SSE flows upward through the channel.

公开(公告)号：US11968821B2

公开(公告)日：2024-04-23

申请号：US17528128

申请日：2021-11-16

Applicant: Micron Technology, Inc.

Inventor： Scott E. Sills

IPC: H01L27/108 ,  H10B12/00 ,  H01L29/78 ,  H01L49/02

CPC classification number: H10B12/20 ,  H10B12/033 ,  H10B12/31 ,  H01L28/91 ,  H01L29/7827

Abstract: A two transistor-one capacitor memory cell comprises first and second transistors laterally displaced relative one another. A capacitor is above the first and second transistors. The capacitor comprises a conductive first capacitor node directly above and electrically coupled to a first node of the first transistor. A conductive second capacitor node is directly above the first and second transistors and is electrically coupled to a first node of the second transistor. A capacitor insulator is between the first and second capacitor nodes. The second capacitor node comprises an elevationally-extending conductive pillar directly above the first node of the second transistor. The conductive pillar has an elevationally outer portion that is of four-sided diamond shape in horizontal cross-section. Other memory cells, including arrays of memory cells are disclosed as are methods.

公开(公告)号：US20240098969A1

公开(公告)日：2024-03-21

申请号：US17945448

申请日：2022-09-15

Applicant: Micron Technology, Inc.

Inventor： David K. Hwang ,  Yoshitaka Nakamura ,  Scott E. Sills ,  Si-Woo Lee ,  Yuanzhi Ma ,  Glen H. Walters

IPC: H01L27/108

CPC classification number: H01L27/10805 ,  H01L27/1085 ,  H01L27/10891

Abstract: Systems, methods and apparatus are provided for an array of vertically stacked memory cells having horizontally oriented access devices and storage nodes formed in tiers. And, more particularly, to multiple, alternating silicon germanium (SiGe) and single crystalline silicon (Si) in different thicknesses to form tiers in which to form the horizontal access devices in vertical three-dimensional (3D) memory. The horizontally oriented access devices can have a first source/drain regions and a second source drain regions separated by single crystalline silicon (Si) channel regions. The single crystalline silicon (Si) channel regions can include a dielectric material to provide support structure to the single crystalline channel regions when forming the horizontal access devices in vertical three-dimensional (3D) memory. Horizontally oriented access lines can connect to gate structures opposing the channel regions. Vertical digit lines coupled to the first source/drain regions.

公开(公告)号：US11652108B2

公开(公告)日：2023-05-16

申请号：US17061852

申请日：2020-10-02

Applicant: Micron Technology, Inc.

Inventor： Scott E. Sills ,  Yi Fang Lee ,  Kevin J. Torek

IPC: H01L21/00 ,  H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  H01L29/786 ,  H01L21/768

CPC classification number: H01L27/1225 ,  H01L27/127 ,  H01L29/7869 ,  H01L21/76877 ,  H01L27/1255

Abstract: Some embodiments include an integrated assembly which includes a base structure. The base structure includes a series of conductive structures which extend along a first direction. The conductive structures have steps which alternate with recessed regions along the first direction. Pillars of semiconductor material are over the steps. The semiconductor material includes at least one element selected from Group 13 of the periodic table in combination with at least one element selected from Group 16 of the periodic table. The semiconductor material may be semiconductor oxide in some applications. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US11626488B2

公开(公告)日：2023-04-11

申请号：US17453621

申请日：2021-11-04

Applicant: Micron Technology, Inc.

Inventor： Srinivas Pulugurtha ,  Jaydip Guha ,  Scott E. Sills ,  Yi Fang Lee

IPC: H01L23/495 ,  H01L29/10 ,  H01L29/24 ,  H01L27/11502 ,  H01L27/06 ,  H01L21/8234 ,  H01L27/108

Abstract: Some embodiments include a transistor having an active region containing semiconductor material. The semiconductor material includes at least one element selected from Group 13 of the periodic table in combination with at least one element selected from Group 16 of the periodic table. The active region has a first region, a third region offset from the first region, and a second region between the first and third regions. A gating structure is operatively adjacent to the second region. A first carrier-concentration-gradient is within the first region, and a second carrier-concentration-gradient is within the third region. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US11619375B2

公开(公告)日：2023-04-04

申请号：US17728780

申请日：2022-04-25

Applicant: Micron Technology, Inc.

Inventor： Scott E. Sills

IPC: F21V29/00 ,  F21V29/67 ,  F21V9/30 ,  F21V29/83 ,  F21V7/00 ,  F21V13/14 ,  F21V29/507 ,  F21V29/74 ,  F21V29/80 ,  F21Y115/10 ,  F21V7/05 ,  F21V13/04 ,  H01L33/48 ,  H01L33/60

Abstract: A solid state lighting (SSL) with a solid state emitter (SSE) having thermally conductive projections extending into an air channel, and methods of making and using such SSLs. The thermally conductive projections can be fins, posts, or other structures configured to transfer heat into a fluid medium, such as air. The projections can be electrical contacts between the SSE and a power source. The air channel can be oriented generally vertically such that air in the channel warmed by the SSE flows upward through the channel.

公开(公告)号：US20230081634A1

公开(公告)日：2023-03-16

申请号：US18050424

申请日：2022-10-27

Applicant: Micron Technology, Inc.

Inventor： Scott E. Sills ,  Ramanathan Gandhi ,  Durai Vishak Nirmal Ramaswamy ,  Yi Fang Lee ,  Kamal M. Karda

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/66 ,  H01L27/24

Abstract: A transistor comprises a first conductive contact, a heterogeneous channel comprising at least one oxide semiconductor material over the first conductive contact, a second conductive contact over the heterogeneous channel, and a gate electrode laterally neighboring the heterogeneous channel. A device, a method of forming a device, a memory device, and an electronic system are also described.

公开(公告)号：US20220302318A1

公开(公告)日：2022-09-22

申请号：US17806427

申请日：2022-06-10

Applicant: Micron Technology, Inc.

Inventor： Durai Vishak Nirmal Ramaswamy ,  Scott E. Sills

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/423

Abstract: A device comprises vertically oriented transistors. The device comprises a pillar comprising at least one oxide semiconductor material, the pillar wider in a first lateral direction at an upper portion thereof than at a lower portion thereof, a gate dielectric material over sidewalls of the pillar and extending in the first lateral direction, and at least one gate electrode adjacent to at least a portion of the gate dielectric material. Related devices, electronic systems, and methods are also disclosed.