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公开(公告)号：US09407207B2
公开(公告)日：2016-08-02
申请号：US14205407
申请日：2014-03-12
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takayuki Tsutsui , Satoshi Tanaka , Kenichi Shimamoto
CPC classification number: H03F1/0205 , H03F1/30 , H03F1/302 , H03F1/32 , H03F1/56 , H03F3/189 , H03F3/19 , H03F3/21 , H03F3/245 , H03F2200/108 , H03F2200/129 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/411 , H03F2200/447 , H03F2200/451 , H03F2200/555
Abstract: An radio frequency amplifying circuit includes an amplifying transistor configured to amplify a radio frequency signal input to a base of the amplifying transistor via a matching network to output the amplified radio frequency signal, a first bias transistor connected to the amplifying transistor based on a current-mirror connection to supply a bias to the amplifying transistor, and a second bias transistor connected to the base of the amplifying transistor based on an emitter-follower connection to supply a bias to the amplifying transistor.
Abstract translation: 射频放大电路包括：放大晶体管，被配置为经由匹配网络放大输入到放大晶体管的基极的射频信号，以输出放大的射频信号;第一偏置晶体管，基于电流 - 反射镜连接以向放大晶体管提供偏置;以及第二偏置晶体管，其基于发射极跟随器连接到放大晶体管的基极，以向放大晶体管提供偏置。
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公开(公告)号：US09397618B2
公开(公告)日：2016-07-19
申请号：US14640341
申请日：2015-03-06
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kenichi Shimamoto , Satoshi Tanaka , Tadashi Matsuoka
CPC classification number: H03F1/0222 , H03F1/0211 , H03F1/0261 , H03F1/30 , H03F1/56 , H03F3/19 , H03F3/193 , H03F3/21 , H03F3/245 , H03F2200/108 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/411 , H03F2200/447 , H03F2200/451 , H03F2200/555
Abstract: A power amplification module includes a first transistor which amplifies and outputs a radio frequency signal input to its base; a current source which outputs a control current; a second transistor connected to an output of the current source, a first current from the control current input to its collector, a control voltage generation circuit connected to the output and which generates a control voltage according to a second current from the control current; a first FET, the drain being supplied with a supply voltage, the source being connected to the base of the first transistor, and the gate being supplied with the control voltage; and a second FET, the drain being supplied with the supply voltage, the source being connected to the base of the second transistor, and the gate being supplied with the control voltage.
Abstract translation: 功率放大模块包括放大并输出输入到其基极的射频信号的第一晶体管; 输出控制电流的电流源; 连接到电流源的输出的第二晶体管，从控制电流输入到其集电极的第一电流，连接到输出并根据来自控制电流的第二电流产生控制电压的控制电压产生电路; 第一FET，所述漏极被供应电源电压，所述源极连接到所述第一晶体管的基极，并且所述栅极被提供所述控制电压; 和第二FET，漏极被供应电源电压，源极连接到第二晶体管的基极，栅极被提供控制电压。
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公开(公告)号：US20150084698A1
公开(公告)日：2015-03-26
申请号：US14552597
申请日：2014-11-25
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masahiro Ito , Kiichiro Takenaka , Satoshi Tanaka , Hidetoshi Matsumoto
CPC classification number: H03F1/0205 , H03F1/02 , H03F1/0227 , H03F1/32 , H03F1/3223 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/213 , H03F3/245 , H03F2200/18 , H03F2200/222 , H03F2200/318 , H03F2200/372 , H03F2200/387 , H03F2200/411 , H03F2200/451
Abstract: Linearity and power efficiency in a power amplifier circuit are enhanced. The power amplifier circuit includes a first transistor that amplifies a signal input to the base and that outputs the amplified signal from the collector and a first capacitor that is disposed between the base and the collector of the first transistor and that has voltage dependency of a capacitance value lower than that of a base-collector parasitic capacitance value of the first transistor.
Abstract translation: 增强了功率放大器电路中的线性和功率效率。 功率放大器电路包括：第一晶体管，其放大输入到基极的信号并输出来自集电极的放大信号;以及第一电容器，其设置在第一晶体管的基极和集电极之间，并且具有电容的电压依赖性 的值低于第一晶体管的基极 - 集电极寄生电容值的值。
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公开(公告)号：US11984924B2
公开(公告)日：2024-05-14
申请号：US16711898
申请日：2019-12-12
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Seima Kondo , Satoshi Tanaka , Satoshi Arayashiki , Hiroyuki Furusato , Jin Yokoyama , Toru Yamaji , Akio Kaneda , Kiwamu Sakano , Junichi Yoshioka , Tatsuya Tsujiguchi , Atushi Ono
CPC classification number: H04B1/48 , H03F3/21 , H05K1/0243 , H03F2200/294 , H03F2200/451 , H05K2201/10098
Abstract: A transmit/receive module includes plural duplexers, a power amplifier, and a sending transmission line. The plural duplexers operate in bands different from each other and each includes a transmit filter and a receive filter. The power amplifier amplifies signals of pass bands of the plural transmit filters and outputs the amplified signals. The sending transmission line is connected to the plural transmit filters. The signals of the pass bands of the plural transmit filters output from the power amplifier are transmitted through the sending transmission line.
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公开(公告)号：US11942685B2
公开(公告)日：2024-03-26
申请号：US17673798
申请日：2022-02-17
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hideki Ueda , Yasuhisa Yamamoto , Masashi Omuro , Kazunari Kawahata , Satoshi Tanaka , Ryuken Mizunuma
Abstract: A first antenna, a second antenna, and a waveguide structure are housed in a single cabinet. An operating frequency of the second antenna is higher than an operating frequency of the first antenna. The second antenna is an array antenna including a plurality of radiating elements. The waveguide structure is present outside a range of a half-value angle of a main beam as viewed from the first antenna, includes a unit waveguide disposed in a route of a radio wave received by the second antenna, and further attenuates a radio wave with the operating frequency of the first antenna.
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Patent Agency Ranking
公开(公告)号：US11784609B2
公开(公告)日：2023-10-10
申请号：US16898156
申请日：2020-06-10
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Masatoshi Hase , Norio Hayashi , Kazuo Watanabe , Yuuri Honda
CPC classification number: H03F1/0205 , H03F1/565 , H03F3/19 , H03F3/195 , H03F3/21 , H03F3/245 , H03F2200/387 , H03F2200/451
Abstract: A power amplifier circuit includes an amplifier that receives an input signal with an alternating current and outputs an output signal obtained by amplifying power of the input signal to a first node; an inductive element that is connected between the first node and a second node; and a variable capacitor that is connected between the second node and a reference potential, and whose electrostatic capacitance increases as power of the output signal increases.
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公开(公告)号：US11757411B2
公开(公告)日：2023-09-12
申请号：US18147849
申请日：2022-12-29
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Satoshi Arayashiki , Satoshi Goto , Yusuke Tanaka
CPC classification number: H03F1/0216 , H03F3/21 , H03F2200/451 , H04W88/02
Abstract: A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.
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公开(公告)号：US11606066B2
公开(公告)日：2023-03-14
申请号：US17195770
申请日：2021-03-09
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Satoshi Arayashiki , Kazuo Watanabe
Abstract: A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.
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公开(公告)号：US11387796B2
公开(公告)日：2022-07-12
申请号：US16709262
申请日：2019-12-10
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kazuo Watanabe , Norio Hayashi , Makoto Itou
Abstract: A power amplifier circuit includes a lower-stage transistor having a first power supply voltage supplied to a first terminal, a second terminal connected to ground, and a first signal supplied to a third terminal; an upper-stage transistor having a second power supply voltage supplied to a first terminal, a second signal obtained by amplifying the first signal being output from the first terminal, a second terminal connected to the first terminal of the lower-stage transistor via a first capacitor, and a third terminal connected to ground via a ground path; an inductor that connects the second terminal of the upper-stage transistor to ground; and an adjustment circuit that adjusts impedance seen from the third terminal of the upper-stage transistor. The adjustment circuit includes a second capacitor and at least one resistance element connected in series with the ground path between the third terminal of the upper-stage transistor and ground.
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公开(公告)号：US11368131B2
公开(公告)日：2022-06-21
申请号：US17083037
申请日：2020-10-28
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takayuki Tsutsui , Satoshi Tanaka , Yasuhisa Yamamoto
Abstract: A power amplifier circuit amplifies a radio-frequency signal in a transmit frequency band. The power amplifier circuit includes an amplifier, a bias circuit, and an impedance circuit. The amplifier amplifies power of a radio-frequency signal and outputs an amplified signal. The impedance circuit is connected between a signal input terminal of the amplifier and a bias-current output terminal of the bias circuit and has frequency characteristics in which attenuation is obtained in the transmit frequency band. The impedance circuit includes first and second impedance circuits. The first impedance circuit is connected to the signal input terminal. The second impedance circuit is connected between the first impedance circuit and the bias-current output terminal.
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