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公开(公告)号:US20200326869A1
公开(公告)日:2020-10-15
申请号:US16382374
申请日:2019-04-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Noam LIVNE , Jun Jin Kong
Abstract: A memory system may include a memory device configured to store data received from a host; and a memory controller configured to, receive a received block of the data and a logical address associated with the data from the host, detect at least one halves of the received block as being duplicate halves based on whether a respective one of the at least one halves of the received block match one or more existing halves of stored blocks stored in the memory device, selectively store the at least one halves of the received block in the memory device based on whether the respective one of the at least one halves are duplicate halves such that the duplicate halves of the received block are not stored in the memory device, and store metadata associated with retrieving the received block.
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公开(公告)号:US10693503B2
公开(公告)日:2020-06-23
申请号:US16013053
申请日:2018-06-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong-Min Shin , Min Uk Kim , Ki Jun Lee , Jun Jin Kong , Hong Rak Son
Abstract: A polar code encoding and decoding method includes generating a first and second sub-codewords. The sub-codewords correspond to pre-codewords, and the pre-codewords have a shared data aspect. The sub-codewords provide useful error-recovery for data stored in a memory. When data is read from the memory, decoding takes place. The data read operation may include hard decision decoding, soft decision decoding, or hard decision decoding followed by soft decision decoding. In the method, the shared data aspect is used to decode a first sub-codeword for which decoding was not initially successful. An apparatus is also provided.
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公开(公告)号:US10607708B2
公开(公告)日:2020-03-31
申请号:US16539290
申请日:2019-08-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Eun Chu Oh , Pilsang Yoon , Jun Jin Kong , Jisu Kim , Hong Rak Son , Jinbae Bang , Daeseok Byeon , Taehyun Song , Dongjin Shin , Dongsup Jin
Abstract: An method of operating a nonvolatile memory device including a plurality of memory cells comprises receiving a read command from an external device, in response to the read command, performing, based on a reference voltage, a first cell counting operation with respect to the plurality of memory cells, adjusting at least one read voltage of first through nth read voltages (where n is a natural number greater than 1) based on a first result of the first cell counting operation, and performing, based on the adjusted at least one read voltage, a read operation corresponding to the read command with respect to the plurality of memory cells.
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公开(公告)号:US20190252027A1
公开(公告)日:2019-08-15
申请号:US16141294
申请日:2018-09-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong Jin Shin , Ji Su Kim , Dae Seok Byeon , Ji Sang Lee , Jun Jin Kong , Eun Chu Oh
Abstract: A non-volatile memory device including: a page buffer configured to latch a plurality of page data constituting one bit page of a plurality of bit pages, and a control logic configured to compare results of a plurality of read operations performed in response to a high-priority read signal set to select one of a plurality of read signals included in the high-priority read signal set as a high-priority read signal, and determine a low-priority read signal corresponding to the high-priority read signal, wherein the high-priority read signal set is for reading high-priority page data, and the low-priority read signal is for reading low-priority page data.
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65.
公开(公告)号:US20190058547A1
公开(公告)日:2019-02-21
申请号:US15680661
申请日:2017-08-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eran Hof , Moshe Twitto , Jun Jin Kong
Abstract: A method of storing survivor data generated while decoding channel polarization codes in a memory module includes setting a list size that corresponds to a number of decoder units used to decode the channel polarization codes, inputting a stream of input bits to the decoder units, and sequentially decoding the input bits. Each input bit is decoded using all previous input bits decoded before the each input bit. The method further includes selecting a plurality of survivor bits from among the decoded input bits, and storing the selected survivor bits in the memory module in a binary tree configuration. The number of edges in each level of the binary tree configuration does not exceed the list size.
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公开(公告)号:US09858994B2
公开(公告)日:2018-01-02
申请号:US14743445
申请日:2015-06-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Amit Berman , Jun Jin Kong , Uri Beitler
CPC classification number: G11C11/5642 , G06F12/00 , G06F12/0246 , G06F2212/1024 , G06F2212/401 , G06F2212/7202 , G06F2212/7203 , G11C7/1006 , G11C16/0483 , G11C16/26 , G11C2211/5641
Abstract: A memory system includes a memory device, the memory device including a memory cell array and a compression encoder, the memory cell array including a first plurality of multi level cells (MLCs). The memory device is configured to generate a first partial page by performing one or more first sensing operations on the first plurality of MLCs using one or more first reference voltages, output the first partial page, generate a second partial page by performing a second sensing operation on the first plurality of MLCs based on a second reference voltage, the second reference voltage having a different voltage level than the one or more first reference voltages, generate a compressed second partial page by compressing the second partial page using the compression encoder, and output the compressed second partial page.
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公开(公告)号:US09792176B2
公开(公告)日:2017-10-17
申请号:US14941051
申请日:2015-11-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Evgeny Blaichman , Moshe Twitto , Avner Dor , Elona Erez , Jun Jin Kong , Shay Landis , Yaron Shany , Yoav Shereshevski
CPC classification number: G06F11/1068 , G06F3/0619 , G06F3/064 , G06F3/0653 , G06F3/0679 , G11C29/52 , G11C2029/0409 , G11C2029/0411 , H03M13/09 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/152 , H03M13/23 , H03M13/2906 , H03M13/2909 , H03M13/2927 , H03M13/2948 , H03M13/2957 , H03M13/3707 , H03M13/455
Abstract: A memory system includes a memory controller; and a memory device, the memory device including a memory cell array, the memory cell array including least a first memory page having a plurality of memory cells storing a plurality of stored bits, the memory controller being such that, the memory controller performs a first hard read operation on the first memory page to generate a plurality of read bits corresponding to the plurality of stored bits, and if the memory controller determines to change a value of one of a first group of bits, from among the plurality of read bits, the memory controller selects one of the first group of bits based on log likelihood ratio (LLR) values corresponding, respectively, to each of the first group of bits, and changes the value of the selected bit.
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公开(公告)号:US20170279606A1
公开(公告)日:2017-09-28
申请号:US15080070
申请日:2016-03-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Michael KARA-IVANOV , Dvir Schirman , Shmuel Dashevsky , Jun Jin Kong
CPC classification number: G06F21/00 , G06F21/6209 , G06F21/73 , G09C1/00 , H04L9/0866 , H04L9/3268 , H04L2209/60
Abstract: A method of encrypting unencrypted digital content includes measuring an analog value associated with a physical property of interested cells of a memory array; digitizing the measured analog value to generate a response key; generating an encryption key based at least on the response key; encrypting the unencrypted digital content to generated encrypted digital content based on the encryption key; and storing the encrypted digital content.
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公开(公告)号:US09672928B2
公开(公告)日:2017-06-06
申请号:US14937333
申请日:2015-11-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Uri Beitler , Jun Jin Kong
CPC classification number: G11C16/26 , G11C11/5642 , G11C16/06 , G11C16/10 , G11C29/021 , G11C29/028
Abstract: A method, executed by a memory controller, for estimating read levels of a nonvolatile memory includes reading voltages stored by memory cells of a page space within the nonvolatile memory to which pilot signals of a predetermined symbol are programmed. The number of memory cells are identified whose voltages, read from the page space, are less-than/greater-than a read-voltage applied in reading the voltages stored by the memory cells. A voltage to be applied for reading data stored in the page space is estimated based upon the identified number of memory cells.
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70.
公开(公告)号:US09672105B2
公开(公告)日:2017-06-06
申请号:US14641649
申请日:2015-03-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jung Soo Chung , Jun Jin Kong , Hongrak Son , Pilsang Yoon , Seong Hyeog Choi
CPC classification number: G06F11/1072 , G06F11/1012 , G06F11/1451 , G06F2201/84 , G11C2029/0411 , H04L9/0662 , H04L9/0869 , H04L9/0894
Abstract: A method of operating a data storage device includes generating at least one pseudo noise (PN) sequence using logical information and physical information for the data storage device. The method also includes converting first data into second data using the at least one PN sequence. The logical information may be a logical address for the data storage device, and the physical information may be a physical address for the data storage device.
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