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公开(公告)号：US20190027507A1
公开(公告)日：2019-01-24
申请号：US16126360
申请日：2018-09-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Kouhei TOYOTAKA , Kei TAKAHASHI , Hideaki SHISHIDO , Koji KUSUNOKI
IPC: H01L27/12 , H01L29/786 , H01L29/49 , H01L29/04 , H01L27/32
CPC classification number: H01L27/1225 , H01L27/124 , H01L27/1266 , H01L27/3262 , H01L27/3272 , H01L29/045 , H01L29/4908 , H01L29/78648 , H01L29/7869
Abstract: A novel display device or the like in which a transistor connected to a scan line has small gate capacitance is provided. A novel display device or the like in which a scan line has low resistance is provided. A novel display device or the like in which pixels can be arranged with high density is provided. A novel display device or the like that can be manufactured without an increase in cost is provided. In a transistor including a first gate electrode and a second gate electrode, the first gate electrode is formed using a metal material with low resistance and the second gate electrode is formed using a metal oxide material that can reduce oxygen vacancies in an oxide semiconductor layer. The first gate electrode is connected to the scan line, and the second gate electrode is connected to a wiring to which a constant potential is supplied.
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公开(公告)号：US20180082645A1
公开(公告)日：2018-03-22
申请号：US15819236
申请日：2017-11-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE , Kouhei TOYOTAKA
CPC classification number: G09G3/3406 , G09G3/2025 , G09G3/3413 , G09G3/3607 , G09G3/3659 , G09G2300/0456 , G09G2330/021
Abstract: A liquid crystal display device comprising a backlight and a pixel portion including first to 2n-th scan lines, wherein, in a first case of expressing a color image, first pixels controlled by the first to n-th scan lines are configured to express a first image using at least one of first to third hues supplied in a first rotating order, and second pixels controlled by the (n+1)-th to 2n-th scan lines are configured to express a second image using at least one of the first to third hues supplied in a second rotating order, wherein, in a second case of expressing a monochrome image, the first and second pixels controlled by the first to 2n-th scan lines are configured to express the monochrome image by external light reflected by the reflective pixel electrode, and wherein the first rotating order is different from the second rotating order.
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公开(公告)号：US20170263777A1
公开(公告)日：2017-09-14
申请号：US15609513
申请日：2017-05-31
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE , Kei TAKAHASHI , Kouhei TOYOTAKA , Masashi TSUBUKU , Kosei NODA , Hideaki KUWABARA
IPC: H01L29/786 , H01L23/552 , H01L23/66 , H01L49/02 , H01L27/02 , H01L27/108 , H01L27/12 , H01L21/84 , H01L25/16
CPC classification number: H01L29/7869 , H01L21/84 , H01L23/552 , H01L23/60 , H01L23/66 , H01L25/16 , H01L27/0222 , H01L27/10873 , H01L27/12 , H01L27/1225 , H01L28/20 , H01L28/60 , H01L29/78609 , H01L2223/6677 , H01L2924/0002 , H01L2924/00
Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit included in an LSI, a CPU, or a memory is manufactured using the transistor which is formed using an oxide semiconductor which is an intrinsic or substantially intrinsic semiconductor obtained by removal of impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than a silicon semiconductor, and is formed over a semiconductor substrate. With the transistor which is formed over the semiconductor substrate and includes the highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device whose power consumption due to leakage current is low can be realized.
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公开(公告)号：US20160365359A1
公开(公告)日：2016-12-15
申请号：US15239006
申请日：2016-08-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Kouhei TOYOTAKA , Jun KOYAMA , Hiroyuki MIYAKE
IPC: H01L27/12 , G09G3/3233 , G09G3/3258 , G02F1/1343 , G02F1/1368 , G02F1/1334 , G02F1/1337 , G02F1/1362 , H01L29/786 , G09G3/36
CPC classification number: H01L27/124 , G02F1/1334 , G02F1/1337 , G02F1/134336 , G02F1/136286 , G02F1/1368 , G02F2201/121 , G02F2201/123 , G09G3/3233 , G09G3/3258 , G09G3/3266 , G09G3/3275 , G09G3/3648 , G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2310/0286 , G09G2310/08 , G09G2320/0626 , G09G2330/021 , G11C19/28 , G11C19/287 , H01L27/1225 , H01L29/7869
Abstract: A semiconductor device includes first and second transistors having the same conductivity type and a circuit. One of a source and a drain of the first transistor is electrically connected to that of the second transistor. First and third potentials are supplied to the circuit through respective wirings. A second potential and a first clock signal are supplied to the others of the sources and the drains of the first and second transistors, respectively. A second clock signal is supplied to the circuit. The third potential is higher than the second potential which is higher than the first potential. A fourth potential is equal to or higher than the third potential. The first clock signal alternates the second and fourth potentials and the second clock signal alternates the first and third potentials. The circuit controls electrical connections between gates of the first and second transistors and the wirings.
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公开(公告)号：US20150248869A1
公开(公告)日：2015-09-03
申请号：US14714473
申请日：2015-05-18
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Hiroyuki MIYAKE , Kouhei TOYOTAKA
CPC classification number: G09G3/3677 , G09G3/3266 , G09G3/3648 , G09G3/3696 , G09G5/18 , G09G2300/0404 , G09G2300/0413 , G09G2310/0205 , G09G2310/0286 , G09G2310/0291 , G11C19/28 , H03K3/356026
Abstract: Two gate drivers each comprising a shift register and a demultiplexer including single conductivity type transistors are provided on left and right sides of a pixel portion. Gate lines are alternately connected to the left-side and right-side gate drivers in every M rows. The shift register includes k first unit circuits connected in cascade. The demultiplexer includes k second unit circuits to each of which a signal is input from the first unit circuit and to each of which M gate lines are connected. The second unit circuit selects one or more wirings which output an input signal from the first unit circuit among M gate lines, and outputs the signal from the first unit circuit to the selected wiring(s). Since gate signals can be output from an output of a one-stage shift register to the M gate lines, the width of the shift register can be narrowed.
Abstract translation: 在像素部分的左侧和右侧设置两个包括移位寄存器和包括单导电型晶体管的解复用器的栅极驱动器。 栅极线在每M行中交替连接到左侧和右侧栅极驱动器。 移位寄存器包括串联连接的k个第一单元电路。 解复用器包括k个第二单位电路，其中每个电路从第一单元电路输入信号，并且连接M个栅极线。 第二单元电路选择在M个栅极线之间输出来自第一单位电路的输入信号的一个或多个布线，并将来自第一单元电路的信号输出到所选择的布线。 由于门信号可以从一级移位寄存器的输出输出到M条栅极线，所以移位寄存器的宽度可以变窄。
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Patent Agency Ranking
公开(公告)号：US20150179112A1
公开(公告)日：2015-06-25
申请号：US14643160
申请日：2015-03-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE , Kouhei TOYOTAKA
CPC classification number: G09G3/3406 , G09G3/2025 , G09G3/3413 , G09G3/3607 , G09G3/3659 , G09G2300/0456 , G09G2330/021
Abstract: A liquid crystal display device comprising a backlight and a pixel portion including first to 2n-th scan lines, wherein, in a first case of expressing a color image, first pixels controlled by the first to n-th scan lines are configured to express a first image using at least one of first to third hues supplied in a first rotating order, and second pixels controlled by the (n+1)-th to 2n-th scan lines are configured to express a second image using at least one of the first to third hues supplied in a second rotating order, wherein, in a second case of expressing a monochrome image, the first and second pixels controlled by the first to 2n-th scan lines are configured to express the monochrome image by external light reflected by the reflective pixel electrode, and wherein the first rotating order is different from the second rotating order.
Abstract translation: 一种液晶显示装置，包括背光源和包括第一至第2n扫描线的像素部分，其中，在表示彩色图像的第一种情况下，由第一至第n扫描线控制的第一像素被配置为表示 使用以第一旋转顺序提供的第一至第三色调中的至少一个色调的第一图像，以及由第（n + 1）至第2n扫描线控制的第二像素，被配置为使用至少一个 第一至第三色调以第二旋转顺序提供，其中，在表示单色图像的第二种情况下，由第一至第2n扫描线控制的第一和第二像素被配置为通过由 所述反射像素电极，并且其中所述第一旋转顺序与所述第二旋转顺序不同。
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公开(公告)号：US20240411134A1
公开(公告)日：2024-12-12
申请号：US18698873
申请日：2022-10-06
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Masashi FUJITA , Yoshiyuki KUROKAWA , Hiromichi GODO , Seiko INOUE , Kazuma FURUTANI , Kouhei TOYOTAKA
IPC: G02B27/01 , G02B27/00 , H04N13/344 , H04N13/383
Abstract: An optical device of the present invention includes a display apparatus (10) and an optical system (12). The display apparatus (10) includes a display region (60) and a sensor region (52). The optical system (12) includes a first mirror (21) and a second mirror (22). The first mirror (21) includes a first surface and a second surface. The display region (60) has a function of emitting first light (31). The first mirror (21) is provided on an optical path of the first light (31) and has a function of transmitting the first light (31) incident on the first surface to the second surface and a function of reflecting second light (33) incident on the second surface. The second mirror (22) is provided on an optical path of the second light (33) and has a function of reflecting the second light (33). The sensor region (52) has a function of detecting the second light (33) via the first mirror (21) and the second mirror (22).
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公开(公告)号：US20240212774A1
公开(公告)日：2024-06-27
申请号：US18596906
申请日：2024-03-06
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Seiko AMANO , Kouhei TOYOTAKA , Hiroyuki MIYAKE , Aya MIYAZAKI , Hideaki SHISHIDO , Koji KUSUNOKI
CPC classification number: G11C19/28 , G09G3/3677 , G09G3/3696 , G11C19/184 , H01L25/03 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/1251 , H01L27/127 , H01L27/1288 , H03K19/0013 , H05K7/02 , G09G2300/0809 , G09G2310/0286 , H01L2924/0002
Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.
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公开(公告)号：US20240105737A1
公开(公告)日：2024-03-28
申请号：US18534908
申请日：2023-12-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hisao IKEDA , Kouhei TOYOTAKA , Hideaki SHISHIDO , Hiroyuki MIYAKE , Kohei YOKOYAMA , Yasuhiro JINBO , Yoshitaka DOZEN , Takaaki NAGATA , Shinichi HIRASA
IPC: H01L27/12 , G09G3/20 , G09G3/3233 , H01L29/786 , H10K59/131 , H10K59/35
CPC classification number: H01L27/124 , G09G3/2003 , G09G3/3233 , H01L27/1225 , H01L27/1266 , H01L29/78648 , H10K59/131 , H10K59/352 , H10K59/353 , G09G3/3648 , G09G2300/0452 , G09G2300/0842 , G09G2320/0295 , G09G2320/043 , G09G2320/0693
Abstract: Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 3×2.
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公开(公告)号：US20240105732A1
公开(公告)日：2024-03-28
申请号：US18378740
申请日：2023-10-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Kouhei TOYOTAKA , Kei TAKAHASHI , Hideaki SHISHIDO , Koji KUSUNOKI
IPC: H01L27/12 , H01L29/04 , H01L29/49 , H01L29/786
CPC classification number: H01L27/1225 , H01L27/124 , H01L27/1266 , H01L29/045 , H01L29/4908 , H01L29/78648 , H01L29/7869 , H10K59/126
Abstract: A novel display device or the like in which a transistor connected to a scan line has small gate capacitance is provided. A novel display device or the like in which a scan line has low resistance is provided. A novel display device or the like in which pixels can be arranged with high density is provided. A novel display device or the like that can be manufactured without an increase in cost is provided. In a transistor including a first gate electrode and a second gate electrode, the first gate electrode is formed using a metal material with low resistance and the second gate electrode is formed using a metal oxide material that can reduce oxygen vacancies in an oxide semiconductor layer. The first gate electrode is connected to the scan line, and the second gate electrode is connected to a wiring to which a constant potential is supplied.
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