公开(公告)号：US06711950B1

公开(公告)日：2004-03-30

申请号：US09890236

申请日：2001-07-30

申请人： Takayuki Yamaura ,  Tomoyuki Tanaka ,  Akira Sakamaki

发明人： Takayuki Yamaura ,  Tomoyuki Tanaka ,  Akira Sakamaki

IPC分类号： G01F2332

CPC分类号： G01F23/363 ,  G01F23/36

摘要： There is provided a liquid level detecting apparatus capable of achieving miniaturization, which includes a float arm 2 provided with a float floating on a liquid surface, an arm holder 4 for holding the float arm 2 and provided with shaft portions 24 as rotation supporting points of the float arm 2, a main body frame 3 provided with two bearing portions 30 and 31 for axially supporting the shaft portions 24 of the arm holder 4, a circuit board 7 fixed to the main body frame 3, and a contact holding member 5 provided with a sliding contact 6 sliding on the circuit board 7 and fixed to the arm holder 4, and the arm holder 4 is positioned between the bearing portions 30 and 31 and holds the float arm 2 and the contact holding member 5.

摘要翻译： 提供了能够实现小型化的液面检测装置，其包括设置有浮置在液面上的浮子的浮臂2，用于保持浮臂2的臂保持件4，并且设置有作为旋转支撑点的旋转支撑点 浮动臂2，主体框架3，其设置有用于轴向支撑臂保持件4的轴部24的两个轴承部分30和31，固定到主体框架3的电路板7和设置在主体框架3上的接触保持部件5 滑动接触件6滑动在电路板7上并固定到臂保持件4上，并且臂保持件4位于支承部分30和31之间并保持浮臂2和接触保持构件5。

公开(公告)号：US5453570A

公开(公告)日：1995-09-26

申请号：US173682

申请日：1993-12-23

申请人： Toshihiko Umeda ,  Tomoyuki Tanaka ,  Masaaki Hamada ,  Yasuhiro Maruyama

发明人： Toshihiko Umeda ,  Tomoyuki Tanaka ,  Masaaki Hamada ,  Yasuhiro Maruyama

IPC分类号： G09B15/00 ,  G10H1/00 ,  G10H1/36 ,  G10K15/04 ,  G09B15/02 ,  G10H1/40

CPC分类号： G09B15/00 ,  G10H1/0066 ,  G10H1/361 ,  G10H2220/011 ,  Y10S84/12

摘要： Disclosed is a karaoke authoring apparatus for mixing or authoring karaoke music data based on an electronic music sound source. The invention can analyze chronologically, in a sound reproduction block, the musical performance data expressed by a code such as MIDI code and has a pre-inserted event code, and will generate an interrupt in a timer circuit at a time interval based on the tempo instruction on the code. The invention can also acquire, as an individual file at the timing of the event code, an integrated value given by the timer circuit in accordance with the type of event, and combine and arrange these files in chronological order to calculate a time difference between consecutive event codes, for producing time data. The authored data allows color turning of the words of the music, page turning, presentation of the title of the music and a video image update which is performed accurately to the timing as planned, in synchronism with the musical performance.

摘要翻译： 公开了一种用于根据电子音乐声源混合或创作卡拉OK音乐数据的卡拉OK制作装置。 本发明可以在声音再现块中按时间顺序分析由诸如MIDI代码的代码表示的演奏数据，并具有预插入的事件代码，并且将在基于节奏的时间间隔在定时器电路中产生中断 代码说明。 本发明还可以在事件代码的定时作为单个文件获取由定时器电路根据事件类型给出的积分值，并按时间顺序组合并排列这些文件以计算连续的时间差 事件代码，用于生成时间数据。 编辑的数据允许与音乐表演同步地使音乐的词语，翻页，音乐标题的呈现以及准确地按计划正确执行的视频图像更新的颜色转动。

公开(公告)号：US5285094A

公开(公告)日：1994-02-08

申请号：US921226

申请日：1992-07-29

申请人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda ,  Yasunori Nakano

发明人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda ,  Yasunori Nakano

IPC分类号： H01L21/225 ,  H01L21/331 ,  H01L21/336 ,  H01L29/739 ,  H01L29/78 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062

CPC分类号： H01L29/66333 ,  H01L21/2257 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802

摘要： The present invention relates to a semiconductor device having an n-type semiconductor region forming one of the main surfaces of a semiconductor substrate, with a plurality of p-type semiconductor regions formed in the n-type semiconductor region. Two exposed n-type semiconductor regions are formed on each of the p-type semiconductor regions, with a main electrode formed on the n-type semiconductor regions and the exposed p-type semiconductor region therebetween. An insulated gate extends from one of the n-type semiconductor regions in one of the p-type semiconductor regions to a closer one of the n-type semiconductor regions in an adjacent p-type semiconductor region. The length of the insulated gate is longer than a distance between adjacent insulated gates.

摘要翻译： 本发明涉及一种半导体器件，其具有形成半导体衬底的主表面之一的n型半导体区域，其中形成在n型半导体区域中的多个p型半导体区域。 在p型半导体区域的每一个上形成有两个暴露的n型半导体区域，其中主电极形成在n型半导体区域上，并且其间暴露的p型半导体区域。 绝缘栅极从p型半导体区域中的一个中的n型半导体区域中的一个延伸到相邻p型半导体区域中的更靠近的n型半导体区域中的一个。 绝缘栅极的长度大于相邻绝缘栅之间的距离。

公开(公告)号：US5274541A

公开(公告)日：1993-12-28

申请号：US631289

申请日：1990-12-20

申请人： Shin Kimura ,  Yasuo Matsuda ,  Norikazu Tokunaga ,  Mutsuhiro Mori ,  Toshiki Kurosu ,  Yutaka Suzuki ,  Naoki Sakurai ,  Yasumichi Yasuda ,  Tomoyuki Tanaka ,  Kenichi Onda

发明人： Shin Kimura ,  Yasuo Matsuda ,  Norikazu Tokunaga ,  Mutsuhiro Mori ,  Toshiki Kurosu ,  Yutaka Suzuki ,  Naoki Sakurai ,  Yasumichi Yasuda ,  Tomoyuki Tanaka ,  Kenichi Onda

IPC分类号： H01L25/07 ,  H01L25/18 ,  H02M7/00 ,  H02M7/48 ,  H02M7/5387 ,  H02P25/04 ,  H02P27/06 ,  H03K17/0814 ,  H03K17/567 ,  H02H7/122 ,  H03K17/687

CPC分类号： H02M7/487 ,  H01L25/072 ,  H02M7/003 ,  H03K17/08148 ,  H03K17/567 ,  H01L2224/48091 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/30107

摘要： In a module using a high-speed switching element such as an IGBT for a high-speed inverter, a matching condition is established between the switching characteristic of the IGBT and the recovery characteristic of the diode to be connected thereto in an anti-parallel fashion. As a result, the oscillating voltage appearing in the inverter circuit is suppressed to prevent erroneous operation of the inverter system.

摘要翻译： 在使用诸如用于高速逆变器的IGBT的高速开关元件的模块中，以反并联方式在IGBT的开关特性和与其连接的二极管的恢复特性之间建立匹配条件 。 结果，抑制逆变器电路中出现的振荡电压，以防止逆变器系统的错误操作。

公开(公告)号：US5126806A

公开(公告)日：1992-06-30

申请号：US442608

申请日：1989-11-29

申请人： Naoki Sakurai ,  Mutsuhiro Mori ,  Tomoyuki Tanaka

发明人： Naoki Sakurai ,  Mutsuhiro Mori ,  Tomoyuki Tanaka

IPC分类号： H01L29/68 ,  H01L29/739 ,  H01L29/74 ,  H01L29/749 ,  H01L29/78

CPC分类号： H01L29/7398 ,  H01L29/7393 ,  H01L29/7394

摘要： A lateral insulated gate bipolar transistor comprises a p layer and a p.sup.+ layer provided apart from each other and extending from a surface of an n.sup.- layer into the n.sup.- layer, an n.sup.+ layer provided extending from a surface of the p layer into the p layer, a first main electrode provided in ohmic contact with the n.sup.+ layer and the p layer, a second main electrode provided in ohmic contact with the p.sup.+ layer, and a control electrode provided through an insulating film on the n.sup.+ layer, the p layer and the n.sup.- layer on the side of the first main electrode away from the second main electrode.

公开(公告)号：US4935799A

公开(公告)日：1990-06-19

申请号：US285328

申请日：1988-12-13

申请人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda

发明人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda

IPC分类号： H01L27/06 ,  H01L21/8249 ,  H01L27/07 ,  H01L29/73

CPC分类号： H01L27/0716 ,  H01L29/7302

摘要： Disclosed is a composite semiconductor device which comprises: a second and a third semiconductor regions of a second conductivity type formed in a first semiconductor region of a first conductivity type independently of each other and so as to be exposed on one main surface of a semiconductor substrate; a fourth and a fifth semiconductor regions of the first conductivity type formed in the second semiconductor region independently of each other and so as to be exposed on the one main surface of the semiconductor substrate; a first insulated gate electrode formed on the second semiconductor region located between the fifth and first semiconductor regions and exposed on the one main surface; a second insulated gate electrode formed on the first semiconductor region located between the second and third semiconductor regions and exposed on the one main surface; an electrode which shorts the fourth and third semiconductor regions; another electrode which shorts the second and fifth semiconductor regions; and a further electrode provided in the first semiconductor region.

摘要翻译： 公开了一种复合半导体器件，其包括：第二导电类型的第二和第三半导体区域形成在第一导电类型的第一半导体区域中，并且彼此独立地暴露在半导体衬底的一个主表面上 ; 第一导电类型的第四和第五半导体区域彼此独立地形成在第二半导体区域中，并暴露在半导体衬底的一个主表面上; 第一绝缘栅电极，形成在位于第五半导体区域和第一半导体区域之间并暴露在一个主表面上的第二半导体区域上; 第二绝缘栅电极，形成在位于第二和第三半导体区之间的第一半导体区上并暴露在一个主表面上; 短路第四和第三半导体区域的电极; 另一个使第二和第五半导体区域短路的电极; 以及设置在所述第一半导体区域中的另一电极。

公开(公告)号：US4210464A

公开(公告)日：1980-07-01

申请号：US873774

申请日：1978-01-31

申请人： Tomoyuki Tanaka ,  Masahiro Okamura ,  Toshikatsu Shirasawa ,  Takuzo Ogawa

发明人： Tomoyuki Tanaka ,  Masahiro Okamura ,  Toshikatsu Shirasawa ,  Takuzo Ogawa

IPC分类号： H01L29/73 ,  H01L21/26 ,  H01L21/263 ,  H01L21/322 ,  H01L21/331 ,  H01L21/56 ,  H01L23/31 ,  H01L29/74 ,  H01L29/861 ,  C03C3/04

CPC分类号： H01L24/01 ,  H01L21/26 ,  H01L21/263 ,  H01L21/56 ,  H01L23/3171 ,  H01L23/3178 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12036 ,  H01L2924/1301 ,  H01L2924/3025

摘要： The whole body of a semiconductor device with its pn junction exposed ends covered by insulating glass is subjected to the exposure to radiation having an energy of higher than 0.5 MeV in terms of the reduced energy of electron beams while the semiconductor device is maintained at temperatures higher than 300.degree. C., and preferably higher than 350.degree. C. As a result, the life time of the minority carriers in the semiconductor device can be shortened without increasing the leakage current in the reverse direction.

摘要翻译： 以绝缘玻璃覆盖的其pn结露出端的半导体器件的整个体，由于电子束的能量减少而被照射到具有高于0.5MeV的能量的辐射，同时半导体器件保持在更高的温度 超过300℃，优选高于350℃。结果，半导体器件中的少数载流子的寿命可以缩短，而不会增加相反方向的泄漏电流。

公开(公告)号：US3967308A

公开(公告)日：1976-06-29

申请号：US451679

申请日：1974-03-15

申请人： Tsutomu Yatsuo ,  Tatsuya Kamei ,  Takuzo Ogawa ,  Tomoyuki Tanaka

发明人： Tsutomu Yatsuo ,  Tatsuya Kamei ,  Takuzo Ogawa ,  Tomoyuki Tanaka

IPC分类号： H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/74 ,  H01L29/747

CPC分类号： H01L29/747 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/42308 ,  H01L29/74

摘要： A thyristor with a gate electrode formed on the side of an anode electrode. An auxiliary region of a large lateral resistance is formed in a surface layer of the substrate between the anode and gate electrodes.

摘要翻译： 具有形成在阳极侧的栅电极的晶闸管。 在阳极和栅电极之间的衬底的表面层中形成有大的横向电阻的辅助区域。