Electrically isolated SiGe fin formation by local oxidation
    71.
    发明授权
    Electrically isolated SiGe fin formation by local oxidation 有权
    通过局部氧化电隔离SiGe鳍形成

    公开(公告)号:US09093326B2

    公开(公告)日:2015-07-28

    申请号:US14058341

    申请日:2013-10-21

    Abstract: A silicon germanium alloy layer is formed on a semiconductor material layer by epitaxy. An oxygen impermeable layer is formed on the silicon germanium alloy layer. The oxygen impermeable layer and the silicon germanium alloy layer are patterned to form stacks of a silicon germanium alloy fin and an oxygen impermeable cap. A shallow trench isolation structure is formed by deposition, planarization, and recessing or an oxygen permeable dielectric material. An oxygen impermeable spacer is formed around each stack of a silicon germanium alloy fin and an oxygen impermeable cap. A thermal oxidation process is performed to convert a lower portion of each silicon germanium alloy fin into a silicon germanium oxide. During the thermal oxidation process, germanium atoms diffuse into unoxidized portions of the silicon germanium alloy fins to increase the germanium concentration therein.

    Abstract translation: 通过外延在半导体材料层上形成硅锗合金层。 在硅锗合金层上形成不透氧层。 对不透氧层和硅锗合金层进行图案化以形成硅锗合金翅片和不透氧盖的叠层。 通过沉积,平坦化和凹陷形成浅沟槽隔离结构或透氧介电材料。 在硅锗合金翅片和不透氧盖的每个堆叠周围形成不透氧隔离物。 进行热氧化处理以将每个硅锗合金翅片的下部转换成硅氧化锗。 在热氧化过程中,锗原子扩散到硅锗合金翅片的未氧化部分,以增加其中的锗浓度。

    TRENCH SIDEWALL PROTECTION FOR SELECTIVE EPITAXIAL SEMICONDUCTOR MATERIAL FORMATION
    74.
    发明申请
    TRENCH SIDEWALL PROTECTION FOR SELECTIVE EPITAXIAL SEMICONDUCTOR MATERIAL FORMATION 有权
    用于选择性外延半导体材料形成的TRENCH侧壁保护

    公开(公告)号:US20150064884A1

    公开(公告)日:2015-03-05

    申请号:US14017443

    申请日:2013-09-04

    Abstract: A method of forming a semiconductor device includes forming an insulator layer over a substrate; opening a trench in the insulator layer so as to expose one or more semiconductor structures formed on the substrate; forming a protective layer on sidewalls of the trench; subjecting the substrate to a precleaning operation in preparation for epitaxial semiconductor formation, wherein the protective layer prevents expansion of the sidewalls of the trench as a result of the precleaning operation; and forming epitaxial semiconductor material within the trench and over the exposed one or more semiconductor structures.

    Abstract translation: 一种形成半导体器件的方法包括在衬底上形成绝缘体层; 在所述绝缘体层中打开沟槽,以暴露形成在所述衬底上的一个或多个半导体结构; 在沟槽的侧壁上形成保护层; 对衬底进行预清洗操作以准备外延半导体形成,其中由于预清洗操作,保护层防止沟槽的侧壁膨胀; 以及在所述沟槽内并在所暴露的一个或多个半导体结构之上形成外延半导体材料。

    CONTACT STRUCTURE EMPLOYING A SELF-ALIGNED GATE CAP

    公开(公告)号:US20140315379A1

    公开(公告)日:2014-10-23

    申请号:US14027315

    申请日:2013-09-16

    Abstract: After formation of a replacement gate structure, a template dielectric layer employed to pattern the replacement gate structure is removed. After deposition of a dielectric liner, a first dielectric material layer is deposited by an anisotropic deposition and an isotropic etchback. A second dielectric material layer is deposited and planarized employing the first dielectric material portion as a stopping structure. The first dielectric material portion is removed selective to the second dielectric material layer, and is replaced with gate cap dielectric material portion including at least one dielectric material different from the materials of the dielectric material layers. A contact via hole extending to a source/drain region is formed employing the gate cap dielectric material portion as an etch stop structure. A contact via structure is spaced from the replacement gate structure at least by remaining portions of the gate cap dielectric material portion.

    Inductor formation with sidewall image transfer
    78.
    发明授权
    Inductor formation with sidewall image transfer 有权
    具有侧壁图像转印的电感器形成

    公开(公告)号:US08859384B1

    公开(公告)日:2014-10-14

    申请号:US13957022

    申请日:2013-08-01

    CPC classification number: H01L28/10

    Abstract: Methods for forming inductors. The methods include forming sidewalls around a mandrel over a conductor layer; removing material from the conductor layer around a region defined by the sidewalls; removing the mandrel; partially etching the conductor layer in a region between the sidewalls; etching the partially etched conductor layer to form separate metal segments; depositing a dielectric material in and around the metal segments; and forming conductive lines between exposed contacts of adjacent metal segments.

    Abstract translation: 电感器形成方法。 所述方法包括在导体层上形成围绕心轴的侧壁; 在由侧壁限定的区域周围从导体层去除材料; 去除心轴; 在侧壁之间的区域中部分地蚀刻导体层; 蚀刻部分蚀刻的导体层以形成分离的金属段; 在金属片段内和周围沉积电介质材料; 以及在相邻金属段的暴露的触点之间形成导电线。

Patent Agency Ranking