公开(公告)号：US20120187575A1

公开(公告)日：2012-07-26

申请号：US13014418

申请日：2011-01-26

申请人： Yoshitaka SASAKI ,  Hiroyuki ITO ,  Hiroshi IKEJIMA ,  Atsushi IIJIMA

发明人： Yoshitaka SASAKI ,  Hiroyuki ITO ,  Hiroshi IKEJIMA ,  Atsushi IIJIMA

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L22/22 ,  H01L21/6835 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/92 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05011 ,  H01L2224/05013 ,  H01L2224/05569 ,  H01L2224/05644 ,  H01L2224/06155 ,  H01L2224/06165 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/9202 ,  H01L2224/96 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/07802 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/0105 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2224/05552

摘要： A layered chip package includes a main body and wiring. The main body includes a main part including a plurality of stacked layer portions, and a plurality of terminals disposed on the top and bottom surfaces of the main part. The wiring includes a plurality of lines electrically connected to the plurality of terminals. The plurality of lines include a plurality of common lines and a plurality of layer-dependent lines. Each of the plurality of layer portions includes a plurality of common electrodes electrically connected to the plurality of common lines, and a selective connection electrode selectively electrically connected to only the layer-dependent line that the layer portion uses among the plurality of layer-dependent lines. The selective connection electrode varies in shape depending on which of the layer-dependent lines it is electrically connected to.

摘要翻译： 分层芯片封装包括主体和布线。 主体包括主要部分，其包括多个堆叠层部分，以及设置在主要部分的顶表面和底表面上的多个端子。 布线包括电连接到多个端子的多条线。 多条线包括多条公共线和多个依赖于层的线。 多个层部分中的每一个包括电连接到多个公共线的多个公共电极，以及选择性连接电极，其选择性地电连接到多个层相关线之间的层部分使用的与层相关的线 。 选择性连接电极根据与电连接的层相关线路的形状而变化。

公开(公告)号：US20120126427A1

公开(公告)日：2012-05-24

申请号：US12949279

申请日：2010-11-18

申请人： Yoshitaka SASAKI ,  Hiroyuki ITO ,  Atsushi IIJIMA

发明人： Yoshitaka SASAKI ,  Hiroyuki ITO ,  Atsushi IIJIMA

IPC分类号： H01L23/52 ,  H01L21/768

CPC分类号： H01L25/0657 ,  H01L21/76232 ,  H01L24/24 ,  H01L24/82 ,  H01L24/95 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/03 ,  H01L2224/05554 ,  H01L2224/0556 ,  H01L2224/24101 ,  H01L2224/24145 ,  H01L2224/25175 ,  H01L2224/8385 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05552

摘要： A memory device has a laminated chip package and a controller chip. In the laminated chip package, a plurality of memory chips are laminated. An interposed chip is laminated between the laminated chip package and the controller chip. The memory chips have a plurality of first wiring electrodes. The interposed chip has a plurality of second wiring electrodes. The second wiring electrodes are formed with a common arrangement pattern common with an arrangement pattern of a plurality of wiring electrodes for controller which are formed in the controller chip. The controller chip is laid on the interposed chip.

摘要翻译： 存储器件具有层叠芯片封装和控制芯片。 在层叠芯片封装中，层叠多个存储芯片。 在层压芯片封装和控制器芯片之间层压插入的芯片。 存储芯片具有多个第一布线电极。 插入的芯片具有多个第二布线电极。 第二布线电极形成有与形成在控制器芯片中的多个用于控制器的布线电极的布置图案相同的共同布置图案。 控制器芯片放置在插入的芯片上。

公开(公告)号：US20120056333A1

公开(公告)日：2012-03-08

申请号：US12875710

申请日：2010-09-03

申请人： Yoshitaka SASAKI ,  Hiroyuki ITO ,  Hiroshi IKEJIMA ,  Atsushi IIJIMA

发明人： Yoshitaka SASAKI ,  Hiroyuki ITO ,  Hiroshi IKEJIMA ,  Atsushi IIJIMA

IPC分类号： H01L25/00 ,  H01L21/50

CPC分类号： H01L21/6835 ,  H01L21/563 ,  H01L23/3192 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/95 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54453 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02321 ,  H01L2224/02371 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05008 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1146 ,  H01L2224/13144 ,  H01L2224/16148 ,  H01L2224/24011 ,  H01L2224/24145 ,  H01L2224/24146 ,  H01L2224/245 ,  H01L2224/2746 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/32148 ,  H01L2224/81121 ,  H01L2224/8113 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/82106 ,  H01L2224/83005 ,  H01L2224/8313 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83444 ,  H01L2224/83815 ,  H01L2224/8385 ,  H01L2224/9202 ,  H01L2224/92244 ,  H01L2224/95001 ,  H01L2224/96 ,  H01L2225/06551 ,  H01L2225/06558 ,  H01L2225/06565 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2221/68304

摘要： A layered chip package includes a main body, and wiring that includes a plurality of wires disposed on a side surface of the main body. The main body includes: a main part including first and second layer portions; and a plurality of first and second terminals that are disposed on the top and bottom surfaces of the main part, respectively, and are electrically connected to the plurality of wires. Each layer portion includes a semiconductor chip having a first surface and a second surface opposite thereto, and includes a plurality of electrodes. The electrodes are disposed on a side of the semiconductor chip opposite to the second surface. The first and second layer portions are bonded to each other such that the respective second surfaces face each other. The first terminals are formed by using the electrodes of the first layer portion, and the second terminals are formed by using the electrodes of the second layer portion.

摘要翻译： 分层芯片封装包括主体和布线，其包括布置在主体的侧表面上的多根导线。 主体包括：主要部分，包括第一和第二层部分; 以及多个第一和第二端子，其分别设置在主要部分的顶表面和底表面上，并且电连接到多个导线。 每个层部分包括具有第一表面和与其相对的第二表面的半导体芯片，并且包括多个电极。 电极设置在与第二表面相对的半导体芯片的一侧上。 第一和第二层部分彼此接合，使得相应的第二表面彼此面对。 通过使用第一层部分的电极形成第一端子，并且通过使用第二层部分的电极形成第二端子。

公开(公告)号：US20100200959A1

公开(公告)日：2010-08-12

申请号：US12368643

申请日：2009-02-10

申请人： Yoshitaka SASAKI ,  Hiroyuki ITO ,  Atsushi IIJIMA

发明人： Yoshitaka SASAKI ,  Hiroyuki ITO ,  Atsushi IIJIMA

IPC分类号： H01L23/544 ,  H01L23/538 ,  H01L21/50

CPC分类号： H01L25/0657 ,  H01L23/3114 ,  H01L23/3178 ,  H01L24/24 ,  H01L2224/24145 ,  H01L2225/06551 ,  H01L2225/06582 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00

摘要： A semiconductor substrate has a plurality of groove portions formed along scribe lines. The semiconductor substrate includes: insulating layers formed in the plurality of groove portions; a rectangular unit region in contact with at least any one of the plurality of groove portions; and a wiring electrode including an extended terminal portion extended from the unit region to the inside of the groove portion. The semiconductor substrate is manufactured by forming a plurality of groove portions along scribe lines; embedding an insulating material in the plurality of groove portions and planarizing a surface to form insulating layers; and forming a wiring electrode including an extended terminal portion extended from a rectangular unit region in contact with at least any one of the plurality of groove portions to the inside of the groove portion.

摘要翻译： 半导体基板具有沿划线形成的多个槽部。 半导体基板包括：形成在多个槽部中的绝缘层; 与所述多个槽部中的至少任一个接触的矩形单位区域; 以及布线电极，其包括从所述单元区域延伸到所述槽部的内部的延伸端子部。 通过沿着划线形成多个槽部来制造半导体衬底; 在多个凹槽部分中嵌入绝缘材料并使表面平坦化以形成绝缘层; 以及形成布线电极，所述布线电极包括从与所述多个槽部中的至少任一个接触的矩形单位区域延伸到所述槽部的内部的延伸端子部。

公开(公告)号：US20090296275A1

公开(公告)日：2009-12-03

申请号：US12132368

申请日：2008-06-03

申请人： Yoshitaka SASAKI ,  Hiroyuki ITO ,  Atsushi IIJIMA

发明人： Yoshitaka SASAKI ,  Hiroyuki ITO ,  Atsushi IIJIMA

IPC分类号： G11B5/127

CPC分类号： G11B5/3116 ,  G11B5/1278 ,  G11B5/3163

摘要： A thin-film magnetic head is constructed such that a main magnetic pole layer having a magnetic pole end face on a side of a medium-opposing surface opposing a recording medium, a write shield layer opposing the main magnetic pole layer on the medium-opposing surface side, a gap layer formed between the main magnetic pole layer and write shield layer, and a thin-film coil wound about the write shield layer or main magnetic pole layer are laminated on a substrate. This thin-film magnetic head has an equidistant two-stage structure in which a first turn part of a first conductor layer and a second turn part of a second conductor layer overlap vertically along the medium-opposing surface while having the same front distance from respective front side faces closer to the medium-opposing surface to the medium-opposing surface.

摘要翻译： 薄膜磁头被构造成使得在与介质相对的介质相对表面的侧面上具有磁极端面的主磁极层，与介质相对的主磁极层相对的写入屏蔽层 在主磁极层和写入屏蔽层之间形成的间隙层和缠绕在写入屏蔽层或主磁极层上的薄膜线圈层叠在基板上。 这种薄膜磁头具有等距离的两级结构，其中第一导体层的第一匝部分和第二导体层的第二匝部分沿着介质相对表面垂直重叠，同时具有与其相同的前部距离 前侧面靠近与介质相对表面的介质相对表面。

公开(公告)号：US20130088677A1

公开(公告)日：2013-04-11

申请号：US13269057

申请日：2011-10-07

申请人： Takuo KINOSHITA ,  Hiroyuki ITO

发明人： Takuo KINOSHITA ,  Hiroyuki ITO

IPC分类号： G02F1/1333

CPC分类号： H01L27/1288 ,  G02F1/134363 ,  G02F1/136286 ,  G02F2001/133388

摘要： A liquid crystal display device includes a pair of substrates of which one substrate is provided with a plurality of scanning lines and a plurality of common wirings, a first insulation film covering the scanning lines, the common wirings, and the one substrate, a plurality of signal lines provided on the first insulation film, a thin film transistor provided near an intersection part of the scanning lines and the signal lines, a lower electrode formed below the first insulation film and connected to the common wirings, a second insulation film formed on surfaces of the thin film transistor, the signal lines, and the first insulation film, and an upper electrode formed on the second insulation film and having a slit, a display region in which the liquid crystal layer is driven by an electric field, and a non-display region that is formed outside the display region.

公开(公告)号：US20110291973A1

公开(公告)日：2011-12-01

申请号：US13117781

申请日：2011-05-27

申请人： Hiroyuki ITO ,  Masami ITO ,  Nobuko ITO

发明人： Hiroyuki ITO ,  Masami ITO ,  Nobuko ITO

IPC分类号： G06F3/041

CPC分类号： G06F3/0416 ,  G06F3/047

摘要： An electronic device includes a touch panel, a position detecting portion, an operating control portion and a detection sensitivity control portion. The position detecting portion detects a close coordinate when sensing that a pointing means comes close to a position on a close plane away from the touch panel by a first distance, and detects a contact coordinate when sensing that the pointing means comes close to a position on a contact plane lying closer to the touch panel than the position on the close plane. The operating control portion controls an operation of a controlled unit based on the close coordinate and the contact coordinate. The detection sensitivity control portion switches detection sensitivity of the position detecting portion from close detection sensitivity to contact detection sensitivity when the position detecting portion senses that the pointing means comes close to the position on the close plane.

摘要翻译： 电子设备包括触摸面板，位置检测部分，操作控制部分和检测灵敏度控制部分。 当检测到指示装置靠近距离触摸面板的近平面上的位置靠近第一距离时，位置检测部分检测到接近坐标，并且当感测到指示装置接近于位置时，检测接触坐标 靠近触摸面板的接触平面比靠近平面上的位置。 操作控制部分基于紧密坐标和接触坐标来控制被控制单元的操作。 当位置检测部分感测到指示装置接近靠近平面上的位置时，检测灵敏度控制部分将位置检测部分的检测灵敏度从接近检测灵敏度切换到接触检测灵敏度。

公开(公告)号：US20090160921A1

公开(公告)日：2009-06-25

申请号：US12339254

申请日：2008-12-19

申请人： Hiroyuki ITO ,  Hideya YOKOUCHI

发明人： Hiroyuki ITO ,  Hideya YOKOUCHI

IPC分类号： B41J2/19 ,  B01D19/02

CPC分类号： B41J2/19 ,  B01D19/0031 ,  B01D19/02 ,  B41J2/175 ,  B41J2/17509

摘要： A liquid supply device includes a liquid supply path for supplying liquid from an upstream, liquid supply side toward a downstream side where the liquid is consumed. A defoaming chamber in the middle of the liquid supply path causes bubbles to escape from the liquid. A decompression chamber adjacent to the defoaming chamber has a partition wall interposed therebetween and is decompressed to have lower pressure than the defoaming chamber. The partition wall allows gas to permeate therethrough by decompression of the decompression chamber and regulates permeation of liquid. The partition wall is formed by a separate member from a decompression chamber forming member that forms the decompression chamber. The partition wall forms a part of an inner surface of the liquid supply path, and the liquid supply path passes along the inside of a wall portion of the decompression chamber in the decompression chamber forming member.

摘要翻译： 液体供给装置包括：液体供给路径，用于将液体从上游侧，液体供给侧向液体消耗的下游侧供给。 在液体供应路径中间的消泡室使气泡从液体中逸出。 与消泡室相邻的减压室具有插入其间的隔壁并且被减压以具有比消泡室低的压力。 分隔壁允许气体通过减压室的减压渗透到其中并调节液体的渗透。 分隔壁由形成减压室的减压室形成构件的分离构件形成。 分隔壁形成液体供给路径的内表面的一部分，液体供给路径沿减压室形成构件的减压室的壁部的内部通过。

公开(公告)号：US20090147060A1

公开(公告)日：2009-06-11

申请号：US12331995

申请日：2008-12-10

申请人： Hiroyuki ITO ,  Hideya YOKOUCHI

发明人： Hiroyuki ITO ,  Hideya YOKOUCHI

IPC分类号： B41J2/175

CPC分类号： B41J2/17509 ,  B41J2/19

摘要： Provided is a liquid supply apparatus including: a liquid supply path which supplies a liquid from an upstream side, which is a liquid supply source, to a downstream side in which the liquid is consumed; a defoaming chamber which is provided in the liquid supply path and defoams air bubbles included in the liquid; and a depressurization chamber which is provided at a position adjacent to the defoaming chamber with a partition wall interposed therebetween and is depressurized such that the pressure thereof becomes lower than the pressure of the defoaming chamber, wherein the partition wall allows permeation of gas by the depressurization of the depressurization chamber and restricts permeation of the liquid, wherein the partition wall has rigidity, and wherein the defoaming chamber is arranged in plurality and at least two of the defoaming chambers overlap with one depressurization chamber in an upper and lower direction.

摘要翻译： 本发明提供一种液体供给装置，包括：液体供给路径，其将液体从作为液体供给源的上游侧供给到液体被消耗的下游侧; 设置在液体供给路径中的消泡室，使包含在液体中的气泡脱泡; 以及减压室，其设置在与所述消泡室相邻的位置处，隔着隔壁插入其间并被减压，使得其压力变得低于所述消泡室的压力，其中所述隔壁允许通过所述减压 并限制所述液体的渗透，其中所述分隔壁具有刚性，并且其中所述消泡室布置成多个，并且所述消泡室中的至少两个在上下方向上与一个减压室重叠。

公开(公告)号：US20100199568A1

公开(公告)日：2010-08-12

申请号：US12699414

申请日：2010-02-03

申请人： Tomonori KONDO ,  Hiroyuki ITO ,  Tatsuya TAMURA

发明人： Tomonori KONDO ,  Hiroyuki ITO ,  Tatsuya TAMURA

IPC分类号： B60J1/17 ,  E06B7/16 ,  B23P17/00

CPC分类号： B60J10/76 ,  B29C45/14467 ,  B29C2045/0093 ,  B60J10/36 ,  Y10T29/4998

摘要： A glass run channel assembly which is made of an elastic polymeric material and which is capable of being mounted to a vehicle, including: a first long glass run channel, a second long glass run channel and a connecting glass run channel which connects the first and second glass run channels, the connecting glass run channel comprising a base bottom portion. The base bottom portion is provided with a projection portion which projects from an outer circumferential side surface of the base bottom portion. The projection portion includes at least a portion of a reinforcing member. The reinforcing member is molded in advance from a material which is harder and more rigid than the elastic polymeric material of the connecting glass run channel, and the reinforcing member includes a base portion arranged at the base bottom portion and a trunk portion which projects towards an outer circumferential side.

摘要翻译： 一种由弹性聚合物材料制成并且能够安装在车辆上的玻璃导槽组件，包括：第一长玻璃导槽，第二长玻璃导槽和连接玻璃导槽，其连接第一和第 第二玻璃运行通道，连接玻璃运行通道包括底部底部。 基部底部设置有从底部底部的外周侧表面突出的突出部。 突出部分包括加强构件的至少一部分。 加强构件预先从比连接玻璃导槽的弹性聚合物材料更硬且更刚性的材料成型，并且加强构件包括布置在底部底部的基部和向基部底部突出的主体部分 外周侧。