公开(公告)号：US07144829B2

公开(公告)日：2006-12-05

申请号：US10822722

申请日：2004-04-13

申请人： Kenji Yoneda

发明人： Kenji Yoneda

IPC分类号： H01L21/26

CPC分类号： H01L21/28185 ,  H01L21/28202 ,  H01L21/3225 ,  H01L29/518

摘要： A first thermal treatment, which is performed at a temperature within 650–750° C. for 30–240 minutes, and thereafter a second thermal treatment, which is performed at a temperature within 900–1100° C. for 30–120 minutes, are performed as the initial thermal treatments on a semiconductor wafer composed of silicon. Further, before forming a gate insulating film, the temperature is increased to 1000° C. at a temperature increasing rate of 8° C./min in a nitrogen ambient, and a thermal treatment is performed at a temperature of 1000° C. for 30 minutes as a third thermal treatment.

公开(公告)号：US20060263967A1

公开(公告)日：2006-11-23

申请号：US11436688

申请日：2006-05-18

申请人： Robert Falster ,  Vladimir Voronkov ,  Galina Voronkova ,  Anna Batunina

发明人： Robert Falster ,  Vladimir Voronkov ,  Galina Voronkova ,  Anna Batunina

IPC分类号： H01L21/8238

CPC分类号： H01L21/324 ,  C30B29/06 ,  C30B33/00 ,  C30B33/02 ,  H01L21/3225

摘要： The present invention generally relates to a high resistivity CZ silicon wafer, or a high resistivity silicon structure derived therefrom, and a process for the preparation thereof. In particular, the high resistivity silicon structure comprises a large diameter CZ silicon wafer as the substrate thereof, wherein the resistivity of the substrate wafer is decoupled from the concentration of acceptor atoms (e.g., boron) therein, the resistivity of the substrate being substantially greater than the resistivity as calculated based on the concentration of said acceptor atoms therein.

公开(公告)号：US07011717B2

公开(公告)日：2006-03-14

申请号：US10929480

申请日：2004-08-31

申请人： Norihiro Kobayashi ,  Shoji Akiyama ,  Yuuichi Matsumoto ,  Masaro Tamatsuka

发明人： Norihiro Kobayashi ,  Shoji Akiyama ,  Yuuichi Matsumoto ,  Masaro Tamatsuka

IPC分类号： H01L31/036

CPC分类号： H01L21/3225 ,  Y10S438/913 ,  Y10S438/935 ,  Y10S438/955 ,  Y10S438/974

摘要： According to the present invention, there are provided a method for heat treatment of silicon wafers wherein a silicon wafer is subjected to a heat treatment at a temperature of from 1000° C. to the melting point of silicon in an inert gas atmosphere, and temperature decreasing in the heat treatment is performed in an atmosphere containing 1–60% by volume of hydrogen, a method for heat treatment of silicon wafers under a reducing atmosphere containing hydrogen by using a rapid heating and rapid cooling apparatus, wherein temperature decreasing rate from the maximum temperature in the heat treatment to 700° C. is controlled to be 20° C./sec or less, and a silicon wafer which has a crystal defect density of 1.0×104 defects/cm3 or more in a wafer bulk portion, a crystal defect density of 1.0×104 defects/cm3 or less in a wafer surface layer of a depth of 0.5 μm from the surface, a crystal defect density of 0.15 defects/cm2 or less on a wafer surface and surface roughness of 1.0 nm or less in terms of the P-V value. By these, crystal defects in wafer surface layers can be reduced by a simple method with a small amount of hydrogen used without degrading microroughness of wafers.

摘要翻译： 根据本发明，提供了一种硅晶片的热处理方法，其中硅晶片在惰性气体气氛中在1000℃至硅熔点下进行热处理，温度 热处理的降低在含有1-60体积％的氢气的气氛中进行，通过使用快速加热和快速冷却装置在含氢气的还原气氛下热处理硅晶片的方法，其中从 控制到700℃的热处理的最高温度为20℃/秒以下，晶体缺陷密度为1.0×4×4×缺陷/ cm 2的硅晶片 在晶片本体部分中> 3 <或更多，在深度的晶片表面层中的晶体缺陷密度为1.0×4×4×3/3或更小 0.5μm以下的晶体缺陷密度为0.15个/ cm 2以下 在P-V值方面为1.0nm以下的表面粗糙度。 通过这些，可以通过使用少量氢气的简单方法来降低晶片表面层中的晶体缺陷，而不降低晶片的微观粗糙度。

公开(公告)号：US20060027897A1

公开(公告)日：2006-02-09

申请号：US11200233

申请日：2005-08-10

申请人： Tatsumi Kusaba ,  Hidehiko Okuda

发明人： Tatsumi Kusaba ,  Hidehiko Okuda

IPC分类号： H01L29/167 ,  H01L29/30

CPC分类号： H01L21/02008 ,  H01L21/3225

摘要： This p-type silicon wafer was subjected to heat treatment to have a resistivity of 10 Ω·cm or more, a BMD density of 5×107 defects/cm3 or more, and an n-type impurity concentration of 1×1014 atoms/cm3 or less at a depth of within 5 μm from a surface of the wafer. This method for heat-treating p-type silicon wafers, the method includes the steps of: loading p-type silicon wafers onto a wafer boat, inserting into a vertical furnace, and holding in an argon gas ambient atmosphere at a temperature of 1100 to 1300° C. for one hour; moving the wafer boat to a transfer chamber and discharging the silicon wafers; and transferring to the wafer boat silicon wafers to be heat treated next, wherein after the discharge of the heat-treated silicon wafers, the silicon wafers to be heat-treated next are transferred to the wafer boat within a waiting time of less than two hours.

摘要翻译： 对该p型硅晶片进行热处理以具有10Ω·cm或更大的电阻率，5×10 7缺陷/ cm 3或更高的BMD密度， 并且在离晶片表面5微米深度的1×10 14原子/ cm 3或更小的n型杂质浓度。 这种用于热处理p型硅晶片的方法，该方法包括以下步骤：将p型硅晶片装载到晶片舟皿上，插入立式炉中，并在氩气环境气氛中保持在1100〜 1300℃1小时; 将晶片舟移动到转移室并排出硅晶片; 并转移到接下来要进行热处理的晶片舟状硅晶片上，其中在经过热处理的硅晶片放电之后，接下来要热处理的硅晶片在小于2小时的等待时间内转移到晶片舟皿 。

公开(公告)号：US20050253221A1

公开(公告)日：2005-11-17

申请号：US10512405

申请日：2003-04-16

申请人： Nobumitsu Takase ,  Hideshi Nishikawa ,  Makoto Ito ,  Koji Sueoka ,  Shinsuke Sadamitsu

发明人： Nobumitsu Takase ,  Hideshi Nishikawa ,  Makoto Ito ,  Koji Sueoka ,  Shinsuke Sadamitsu

IPC分类号： H01L21/26 ,  H01L21/322 ,  H01L29/167 ,  H01L21/22

CPC分类号： H01L21/3225

摘要： A high-resistance silicon wafer is manufactured in which a gettering ability, mechanical strength, and economical efficiency are excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is implemented on the side of a device maker. A heat treatment for forming an oxygen precipitate nucleus is performed at 500 to 900° C. for 5 hours or more in a non-oxidizing atmosphere and a heat treatment for growing an oxygen precipitate is performed at 950 to 1050° C. for 10 hours or more on a high-oxygen and carbon-doped high-resistance silicon wafer in which resistivity is 100 Ωcm or more, an oxygen concentration is 14×1017 atoms/cm3 (ASTM F-121, 1979) or more and a carbon concentration is 0.5×1016 atoms/cm3 or more. By these heat treatments, a remaining oxygen concentration in the wafer is controlled to be 12×1017 atoms/cm3 (ASTM F-121, 1979) or less. Thus, there is provided a high-resistance, low-oxygen and high-strength silicon wafer in which resistivity is 100 Ωcm or more and an oxygen precipitate (BMD) having a size of 0.2 μm is formed so as to have high density of 1×104/cm2 or more.

摘要翻译： 制造高电阻硅晶片，其中吸收能力，机械强度和经济效率优异，并且在用于形成电路的热处理中有效地防止了氧热供体的产生，该电路在 设备制造商。 在非氧化性气氛中，在500〜900℃下进行形成氧沉淀核的热处理5小时以上，在950〜1050℃下进行氧沉淀的热处理10小时 以上，电阻率为100Ωm以上的高氧和碳掺杂高电阻硅晶片，氧浓度为14×10 17原子/ cm 3（以下） ASTM F-121,1979）或更高，碳浓度为0.5×10 16原子/ cm 3以上。 通过这些热处理，将晶片中的剩余氧浓度控制为12×10 17原子/ cm 3（ASTM F-121,1979）或更小。 因此，提供了电阻率为100Ωm或更大的高电阻，低氧和高强度硅晶片，并且形成具有0.2μm大小的氧沉淀物（BMD），以便具有高密度的1×10 4/4以上。

公开(公告)号：US06958092B2

公开(公告)日：2005-10-25

申请号：US10400594

申请日：2003-03-25

申请人： Gregory M. Wilson ,  Jon A. Rossi ,  Charles C. Yang

发明人： Gregory M. Wilson ,  Jon A. Rossi ,  Charles C. Yang

IPC分类号： H01L21/205 ,  C30B25/10 ,  C30B33/00 ,  H01L21/322 ,  C30B15/02

CPC分类号： C30B29/06 ,  C30B25/10 ,  C30B33/00 ,  H01L21/3225 ,  Y10S257/913 ,  Y10T428/249961 ,  Y10T428/249978

摘要： A wafer is characterized in that the wafer has a non-uniform distribution of crystal lattice vacancies, wherein the concentration of crystal lattice vacancies in the bulk layer are greater than the concentration of crystal lattice vacancies in the front surface layer. In addition, the front surface of the wafer has an epitaxial layer, having a thickness of less than about 2.0 çm, deposited thereon. A process comprises heating a surface of a wafer starting material to remove a silicon oxide layer from the surface and depositing an epitaxial layer onto the surface to form an epitaxial wafer. The epitaxial wafer is then heated to a soak temperature of at least about 1175C. while exposing the epitaxial layer to an oxidizing atmosphere comprising an oxidant, and the wafer is cooled at a rate of at least about 10C./sec.

摘要翻译： 晶片的特征在于晶片具有不均匀的晶格空位分布，其中体层中晶格空位的浓度大于前表面层中晶格空位的浓度。 此外，晶片的前表面具有沉积在其上的厚度小于约2.0μm的外延层。 一种方法包括加热晶片起始材料的表面以从表面除去氧化硅层并在表面上沉积外延层以形成外延晶片。 然后将外延晶片加热至至少约1175℃的保温温度。 同时将外延层暴露于包含氧化剂的氧化气氛中，并且晶片以至少约10℃/秒的速率被冷却。

公开(公告)号：US20050205000A1

公开(公告)日：2005-09-22

申请号：US11131148

申请日：2005-05-17

申请人： Robert Falster ,  Joseph Holzer

发明人： Robert Falster ,  Joseph Holzer

IPC分类号： C30B29/06 ,  C30B15/00 ,  C30B15/14 ,  C30B15/20 ,  C30B15/22 ,  C30B21/06 ,  C30B27/02 ,  C30B28/10 ,  C30B30/04 ,  C30B33/00 ,  H01L21/322 ,  H01L21/324

CPC分类号： C30B29/06 ,  C30B15/00 ,  C30B15/14 ,  C30B15/203 ,  C30B15/206 ,  C30B33/00 ,  H01L21/3225 ,  Y10T117/1004 ,  Y10T428/21

摘要： The present invention relates to single crystal silicon, in ingot or wafer form, which contains an axially symmetric region which is free of agglomerated intrinsic point defects, and a process for the preparation thereof. The process comprises controlling growth conditions, such as growth velocity, v, instantaneous axial temperature gradient, G0, and the cooling rate, within a range of temperatures at which silicon self-interstitials are mobile, in order to prevent the formation of these agglomerated defects. In ingot form, the axially symmetric region has a width, as measured from the circumferential edge of the ingot radially toward the central axis, which is at least about 30% the length of the radius of the ingot. The axially symmetric region additionally has a length, as measured along the central axis, which is at least about 20% the length of the constant diameter portion of the ingot.

摘要翻译： 本发明涉及晶锭或晶片形式的单晶硅，其包含不具有附聚固有点缺陷的轴对称区域及其制备方法。 该方法包括在硅自填隙可移动的温度范围内控制生长条件，例如生长速度，v，瞬时轴向温度梯度，G <0>和冷却速率，按顺序 以防止这些团聚缺陷的形成。 在锭状形式中，轴向对称区域具有从铸块径向向中心轴线的圆周边缘测量的宽度，其至少为铸块半径的大约30％。 轴向对称区域还具有沿着中心轴测量的长度，该长度至少为锭的恒定直径部分的长度的约20％。

公开(公告)号：US20050130394A1

公开(公告)日：2005-06-16

申请号：US10963137

申请日：2004-10-12

申请人： Robert Falster

发明人： Robert Falster

IPC分类号： C30B15/00 ,  H01L21/02 ,  H01L21/322 ,  H01L21/762 ,  H01L27/12 ,  H01L21/66 ,  H01L21/20 ,  H01L21/76

CPC分类号： C30B15/203 ,  C30B15/206 ,  C30B29/06 ,  H01L21/3225 ,  H01L21/3226 ,  H01L21/7624 ,  H01L21/76251 ,  Y10S257/913 ,  Y10T428/21

摘要： The present invention relates to a process for the preparation of a silicon on insulator wafer. The process includes implanting oxygen into a single crystal silicon wafer which is substantially free of agglomerated vacancy-type defects. The present invention further relates to a process for the preparation of a silicon on insulator wafer wherein oxygen is implanted into a single crystal silicon wafer having an axially symmetric region in which there is a predominant intrinsic point defect which is substantially free of agglomerated intrinsic point defects. Additionally, the present invention relates to a silicon on insulator (“SOI”) structure in which the device layer is substantially free of agglomerated intrinsic point defects.

摘要翻译： 本发明涉及一种制备绝缘体上硅晶片的方法。 该方法包括将氧气注入到基本上没有附聚空位型缺陷的单晶硅晶片中。 本发明还涉及一种用于制备绝缘体上硅晶片的方法，其中将氧注入到具有轴向对称区域的单晶硅晶片中，其中存在基本上没有附聚固有点缺陷的主要固有点缺陷 。 另外，本发明涉及绝缘体上硅（“SOI”）结构，其中器件层基本上没有聚集的固有点缺陷。

公开(公告)号：US20050048247A1

公开(公告)日：2005-03-03

申请号：US10963340

申请日：2004-10-12

申请人： Luciano Mule'Stagno ,  Jeffrey Libbert ,  Richard Phillips ,  Milind Kulkarni ,  Mohsen Banan ,  Stephen Brunkhorst

发明人： Luciano Mule'Stagno ,  Jeffrey Libbert ,  Richard Phillips ,  Milind Kulkarni ,  Mohsen Banan ,  Stephen Brunkhorst

IPC分类号： H01L21/322 ,  B32B3/02

CPC分类号： H01L21/3226 ,  H01L21/3225 ,  Y10T428/21

摘要： A process for imparting controlled oxygen precipitation behavior to a single crystal silicon wafer. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon, and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing, such as an epitaxial deposition process, while maintaining the ability to dissolve any grown-in nucleation centers.

摘要翻译： 将受控氧析出行为赋予单晶硅晶片的方法。 具体地，在形成氧沉淀物之前，晶片本体包括掺杂剂稳定的氧沉淀成核中心。 掺杂剂选自氮和碳组成，掺杂剂的浓度足以使氧沉淀成核中心承受诸如外延沉积工艺之类的热处理，同时保持溶解任何生长的能力 成核中心。

公开(公告)号：US20050032337A1

公开(公告)日：2005-02-10

申请号：US10940824

申请日：2004-09-14

申请人： Gregory Wilson ,  Michael Ries

发明人： Gregory Wilson ,  Michael Ries

IPC分类号： H01L21/20 ,  H01L21/322 ,  H01L21/683

CPC分类号： H01L21/3225 ,  H01L21/6838

摘要： An apparatus and method are provided for forming an epitaxial layer on and denuded zone in a semiconductor wafer used in manufacturing electronic components. The denuded zone and epitaxial layer are formed in one apparatus. The apparatus includes a Bernoulli wand that is used to support the wafer in a cooling position to effect fast cooling of the wafer and formation of the denuded zone.

摘要翻译： 提供了一种用于在用于制造电子部件的半导体晶片中形成外延层和裸露区的装置和方法。 裸露区和外延层在一个装置中形成。 该设备包括用于在冷却位置支撑晶片以实现晶片的快速冷却和形成裸露区域的伯努利棒。