公开(公告)号：US12033876B2

公开(公告)日：2024-07-09

申请号：US17269831

申请日：2020-06-15

申请人： Beijing BOE Display Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

发明人： Bohua Chu ,  Bo Zhou ,  Yanming Liu

IPC分类号： H01L21/673 ,  H01L33/00

CPC分类号： H01L21/67333 ,  H01L33/0093

摘要： This disclosure discloses a mass transfer method and mass transfer device thereof for micro-LED devices, wherein the mass transfer method includes: coating a surface, provided with micro-LED devices, of an epitaxial substrate with a flexible covering solution; curing the flexible covering solution to form a flexible covering layer wrapping the micro-LED devices; turning over the epitaxial substrate with the flexible covering layer wrapping the micro-LED devices, for locating the epitaxial substrate on an upper side of the flexible covering layer; separating the epitaxial substrate from the micro-LED devices; butting a surface, provided with the micro-LED devices, of the flexible covering layer against a receiving substrate; turning over the receiving substrate in butt joint with the micro-LED devices, for locating the flexible covering layer on an upper side of the receiving substrate; and separating the flexible covering layer from the micro-LED devices.

公开(公告)号：US11823920B2

公开(公告)日：2023-11-21

申请号：US17124475

申请日：2020-12-16

申请人： JMJ Korea Co., Ltd.

发明人： Yun Hwa Choi ,  Jung Min Park

IPC分类号： H01L21/67 ,  B22F7/06 ,  B23K1/00 ,  B23K1/005 ,  B23K1/012 ,  B23K3/06 ,  B23K37/04 ,  H01L21/673 ,  H01L21/677 ,  H01L21/68 ,  B23K103/12 ,  B23K101/40

CPC分类号： H01L21/67144 ,  B22F7/064 ,  B23K1/0016 ,  B23K1/0056 ,  B23K1/012 ,  B23K3/0607 ,  B23K37/04 ,  H01L21/67034 ,  H01L21/67333 ,  H01L21/67754 ,  H01L21/681 ,  B22F2301/10 ,  B22F2301/255 ,  B23K2101/40 ,  B23K2103/12

摘要： Provided is an apparatus for attaching semiconductor parts. The apparatus includes a substrate loading unit, at least one semiconductor part loader, a first vision examination unit, at least one semiconductor part picker, at least one adhesive hardening unit, and a substrate unloading unit, wherein the substrate loading unit supplies a substrate on which semiconductor units are arranged, the at least one semiconductor part loader supplies semiconductor parts, the first vision examination unit examines arrangement states of the semiconductor units, the at least one semiconductor part picker mounts semiconductor parts in the semiconductor units, the at least one adhesive hardening unit hardens and attaches adhesives interposed between the semiconductor units and the semiconductor parts, and the substrate unloading unit releases the substrate on which semiconductor parts are mounted. The adhesive hardening units restrictively transmit a heat source only to at least one semiconductor unit, which is to be hardened.

公开(公告)号：US20230340298A1

公开(公告)日：2023-10-26

申请号：US18344635

申请日：2023-06-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Ming Kuo ,  Jing Ruei Lu ,  Pei-Haw Tsao

IPC分类号： C09J5/00 ,  H01L21/683 ,  C09J7/38 ,  C09J7/20 ,  H01L21/673

CPC分类号： C09J5/00 ,  H01L21/6836 ,  C09J7/381 ,  C09J7/20 ,  H01L21/67333 ,  C09J2427/00 ,  C09J2203/326 ,  C09J2301/416 ,  C09J2301/502 ,  H05K13/0084

摘要： The current disclosure describes carrier tape systems, which include a carrier tape including a plurality of pockets. Each pocket contains a semiconductor device adhered to a bottom surface of the pocket by an adhesive. In some embodiments, the adhesive is a reversible adhesive. Use of the adhesive reduces the likelihood the semiconductor device will be damaged due to movement of the semiconductor device in the pocket during shipment of the carrier tape. Methods of forming a semiconductor device carrier systems and methods of supplying semiconductor devices are also described.

公开(公告)号：US11764090B2

公开(公告)日：2023-09-19

申请号：US17690121

申请日：2022-03-09

申请人： CHIPBOND TECHNOLOGY CORPORATION

发明人： Hsu-Chi Lee ,  Pi-Yu Peng ,  Chun-Te Lee

IPC分类号： H01L21/673

CPC分类号： H01L21/67333

摘要： A tray includes a body for placement of a component (e.g. electronic component) and a taker disposed on a bottom surface of the body. The taker is used to take a spacer and includes a first taking element and a second taking element. The first taking element includes a first connection portion and a first confinement portion, and the second taking element includes a second connection portion and a second confinement portion. An accommodation space is provided between the first and second connection portions and a passageway is provided between the first and second confinement portions. While the spacer is moved through the passageway and into the accommodation space, it is confined in the accommodation space by the first and second confinement portions such that the taker can take away the spacer to show another tray located under the spacer as the tray is removed.

公开(公告)号：US20230253226A1

公开(公告)日：2023-08-10

申请号：US18094428

申请日：2023-01-09

申请人： Po-Hsiang CHANG ,  Sheng-Hung WANG

发明人： Po-Hsiang CHANG ,  Sheng-Hung WANG

IPC分类号： H01L21/673 ,  G01R31/28

CPC分类号： H01L21/67333 ,  G01R31/2893

摘要： The present invention provides a chip carrier that selectively carries a chip under test or a standard chip. The chip carrier comprises a body and a load board. The body defines a test area located on an upper surface of the body, and a first chip position is defined in the test area. The load board is detachably located in the test area, and a second chip position is defined in the load board. A standard chip is disposed within the second chip position. When the load board is located in the test area, the load board covers the first chip position and the chip under test is not disposed within the first chip position. When the chip under test is disposed within the first chip position, the load board is not located in the test area.

公开(公告)号：US20230141485A1

公开(公告)日：2023-05-11

申请号：US17735747

申请日：2022-05-03

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Hyunjoon KIM ,  Dongkyun Kim ,  Joonyong Park ,  Seogwoo Hong ,  Kyungwook Hwang ,  Junsik Hwang

IPC分类号： H01L25/13 ,  H01L21/673

CPC分类号： H01L25/13 ,  H01L21/67333

摘要： A device transfer substrate includes a plurality of recesses, wherein each of the plurality of recesses includes a first region having a shape of a first figure, a second region having a shape of a second figure, and an overlapping region formed as a portion of the first region partially overlaps a portion of the second region, wherein a maximum width of the overlapping region in a direction intersecting with a straight line passing through a center of the first figure and a center of the second figure is less than a diameter or a diagonal length of the first figure and less than a diameter or a diagonal length of the second figure.

公开(公告)号：US09818632B2

公开(公告)日：2017-11-14

申请号：US14981781

申请日：2015-12-28

申请人： Yu-Nan Lo

发明人： Yu-Nan Lo

IPC分类号： B65D85/30 ,  H01L21/673

CPC分类号： H01L21/67333

摘要： A tray for semiconductor devices includes a base with a positioning unit. The positioning unit includes a plurality of tiered projections which jointly define and surround an enclosed space for receiving a semiconductor device. Each tiered projection is a two-tier structure including an inclined surface portion and an upright surface portion connected to the inclined surface portion, and a semiconductor device can be received, and limited in position, between the upright surface portions. When the tray bounces due external vibrations such that the semiconductor device received in the enclosed space is moved away from the upright surface portions to the inclined surface portions, the inclined surface portions of the tiered projections can guide and adjust the semiconductor device, returning the semiconductor device to between the upright surface portions, in order for the tray to carry the semiconductor device stably.

公开(公告)号：US09805980B2

公开(公告)日：2017-10-31

申请号：US14995185

申请日：2016-01-13

申请人： Renesas Electronics Corporation

发明人： Tadashi Munakata ,  Shingo Oosaka ,  Mitsuru Kinoshita ,  Yoshihiko Yamaguchi ,  Noriyuki Takahashi

IPC分类号： H01L21/78 ,  H01L21/56 ,  H01L21/67 ,  H01L23/00 ,  H01L21/02 ,  H01L21/673 ,  H01L21/683 ,  H01L23/31

CPC分类号： H01L21/78 ,  H01L21/02076 ,  H01L21/561 ,  H01L21/565 ,  H01L21/67092 ,  H01L21/67126 ,  H01L21/67333 ,  H01L21/6838 ,  H01L23/3128 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.

公开(公告)号：US20170186636A1

公开(公告)日：2017-06-29

申请号：US14981781

申请日：2015-12-28

申请人： Yu-Nan LO

发明人： Yu-Nan LO

IPC分类号： H01L21/673

CPC分类号： H01L21/67333

摘要： A tray for semiconductor devices includes a base with a positioning unit. The positioning unit includes a plurality of tiered projections which jointly define and surround an enclosed space for receiving a semiconductor device. Each tiered projection is a two-tier structure including an inclined surface portion and an upright surface portion connected to the inclined surface portion, and a semiconductor device can be received, and limited in position, between the upright surface portions. When the tray bounces due external vibrations such that the semiconductor device received in the enclosed space is moved away from the upright surface portions to the inclined surface portions, the inclined surface portions of the tiered projections can guide and adjust the semiconductor device, returning the semiconductor device to between the upright surface portions, in order for the tray to carry the semiconductor device stably.

公开(公告)号：US09532470B2

公开(公告)日：2016-12-27

申请号：US14223170

申请日：2014-03-24

申请人： KEIHIN CORPORATION

发明人： Hirokazu Yamana

IPC分类号： B65D43/02 ,  H05K5/00 ,  H01L21/673

CPC分类号： H05K5/0047 ,  B65D43/0212 ,  H01L21/67333

摘要： A resin casing includes a resin case and a resin cover attached to the resin case. A plurality of depressions is formed respectively on an outer surface and an inner surface of a top plate of the resin cover. The depressions are alternately arranged on the outer surface and the inner surface along a predetermined direction as seen in a plan view.

摘要翻译： 树脂壳体包括树脂壳体和附接到树脂壳体的树脂盖。 分别在树脂盖的顶板的外表面和内表面上形成多个凹部。 在平面图中看到的凹陷沿着预定方向交替布置在外表面和内表面上。