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    Apparatus and method for decoding SECAM chrominance signal
    81.
    发明申请
    Apparatus and method for decoding SECAM chrominance signal 有权

    公开(公告)号：US20060109379A1

    公开(公告)日：2006-05-25

    申请号：US11259758

    申请日：2005-10-25

    Applicant: Deuk-Geun Ahn ,  Bong-Soon Kang ,  Joo-Young Ha ,  Ju-Hyun Kim

    Inventor： Deuk-Geun Ahn ,  Bong-Soon Kang ,  Joo-Young Ha ,  Ju-Hyun Kim

    IPC: H04N11/18

    CPC classification number: H04N11/186

    Abstract: We describe an apparatus and method for decoding a SECAM chrominance signal. The apparatus may include a band-pass filter to separate the chrominance signal from the composite video baseband signal. A down-mixer down mixes the chrominance signal from a high to a low frequency band to generate two signals having a substantially 90° phase difference. A cloche filter filters the two signals. A differentiator differentiates the cloche filtered signals. A multiplier squares each differentiated signal. An adder sums the squared result while a square root takes the square root of the sum.

    Color temperature conversion apparatus for variably changing color temperature of input image and method thereof
    82.
    发明授权
    Color temperature conversion apparatus for variably changing color temperature of input image and method thereof 失效
    用于可变地改变输入图像的色温的色温转换装置及其方法

    公开(公告)号：US07035455B2

    公开(公告)日：2006-04-25

    申请号：US10208795

    申请日：2002-08-01

    Applicant: Hyung-Jin Choi ,  Bong-Soon Kang

    Inventor： Hyung-Jin Choi ,  Bong-Soon Kang

    IPC: G06K9/00

    CPC classification number: H04N9/73

    Abstract: A color temperature conversion apparatus capable of varying and outputting a color temperature of an input image, and a method thereof. The color temperature conversion apparatus has a color temperature detect unit that detects an input color temperature of an input image, a color temperature determine unit that calculates an output color temperature from the input color temperature based on a target color temperature, a coefficient calculate unit that calculates a color temperature conversion coefficient to convert the input color temperature into the output color temperature, and a color temperature conversion unit that converts the input color temperature into the output color temperature.

    Abstract translation: 能够改变和输出输入图像的色温的色温转换装置及其方法。 色温转换装置具有检测输入图像的输入色温的色温检测部，基于目标色温从输入色温计算输出色温的色温决定部， 计算将输入色温转换为输出色温的色温转换系数，以及将输入色温转换成输出色温的色温转换部。

    Structure of semiconductor rectifier
    84.
    发明授权
    Structure of semiconductor rectifier 失效
    半导体整流器结构

    公开(公告)号：US06396084B1

    公开(公告)日：2002-05-28

    申请号：US09374442

    申请日：1999-08-13

    Applicant: Hyi-jeong Park ,  Hyun-soon Kang

    Inventor： Hyi-jeong Park ,  Hyun-soon Kang

    IPC: H01L2928

    CPC classification number: H01L29/861 ,  H01L29/872

    Abstract: A semiconductor rectifier includes a substrate of a first conductivity type; a current path layer of the first conductivity type formed near the surface of the substrate; a current block layer of a second conductivity type laterally enclosing the current path layer and extending to a depth deeper than the current path layer; and first and second metal layers formed respectively contacting upper and lower surfaces of the substrate. The current path layer has an impurity concentration higher than that of the substrate, and the current block layer has an impurity concentration higher than that of the current path layer. The current path layer is small enough for the portion below the current path layer to be completely blocked by the depletion region formed around the current block layer when a reverse bias or no is applied to the rectifier. The current path layer and the current block layer can be formed in an epitaxial layer of the first conductivity type overlying a high-concentration substrate of the first conductivity type, and a buried layer of the second conductivity type below the current block layer can further reduce reverse bias current.

    Abstract translation: 半导体整流器包括第一导电类型的衬底; 形成在基板的表面附近的第一导电类型的电流通路层; 横向包围电流通路层并延伸到比电流通路层更深的深度的第二导电类型的当前阻挡层; 并且形成分别接触所述基板的上表面和下表面的第一和第二金属层。 电流通路层的杂质浓度高于衬底的杂质浓度，并且电流阻挡层的杂质浓度高于电流通路层的杂质浓度。 电流通路层足够小，当电流通路层下方的部分完全被形成在当前阻挡层周围形成的耗尽区域时，当反向偏置或不对整流器施加时。 电流通路层和电流阻挡层可以形成在覆盖第一导电类型的高浓度衬底的第一导电类型的外延层中，并且在当前阻挡层下方的第二导电类型的掩埋层可以进一步减少 反向偏置电流。

    Synchronous semiconductor memory device having input buffers and latch circuits
    85.
    发明授权
    Synchronous semiconductor memory device having input buffers and latch circuits 有权
    具有输入缓冲器和锁存电路的同步半导体存储器件

    公开(公告)号：US06256260B1

    公开(公告)日：2001-07-03

    申请号：US09570729

    申请日：2000-05-12

    Applicant: Young-Bo Shim ,  Woo-Soon Kang

    Inventor： Young-Bo Shim ,  Woo-Soon Kang

    IPC: G11C800

    CPC classification number: G11C7/109 ,  G11C7/1066 ,  G11C7/1072 ,  G11C7/1078 ,  G11C7/22 ,  G11C7/225 ,  G11C8/06 ,  G11C11/4093

    Abstract: A synchronous semiconductor memory device having a plurality of external signal input buffer and a plurality of latch circuits, includes: a clock buffer for receiving an external clock signal to generate a buffered clock signal; a chip select buffer for receiving an external chip select signal and the buffered clock signal from said clock buffer to generate a buffered chip select signal, an inverted buffered chip select signal and a latch control signal, wherein the latch control signal is activated when the external clock signal is at the rising edge and the external chip select signal is low; a plurality of external signal buffers for receiving external signals to generate buffered signals and inverted buffered signals; and a plurality of latch circuits for latching and outputting the buffered signals and the inverted buffer signals to an internal logic circuit in response to the latch control signal.

    Abstract translation: 一种具有多个外部信号输入缓冲器和多个锁存电路的同步半导体存储器件，包括：时钟缓冲器，用于接收外部时钟信号以产生缓冲的时钟信号; 芯片选择缓冲器，用于接收来自所述时钟缓冲器的外部芯片选择信号和缓冲的时钟信号，以产生缓冲芯片选择信号，反相缓冲芯片选择信号和锁存控制信号，其中当外部 时钟信号处于上升沿，外部芯片选择信号为低电平; 多个外部信号缓冲器，用于接收外部信号以产生缓冲信号和反相缓冲信号; 以及多个锁存电路，用于响应于锁存控制信号而将缓冲信号和反相缓冲器信号锁存并输出到内部逻辑电路。

    CMOS operational amplifiers having reduced power consumption requirements and improved phase margin characteristics
    86.
    发明授权
    CMOS operational amplifiers having reduced power consumption requirements and improved phase margin characteristics 失效
    CMOS运算放大器具有降低的功耗要求和改进的相位裕度特性

    公开(公告)号：US6052025A

    公开(公告)日：2000-04-18

    申请号：US124599

    申请日：1998-07-29

    Applicant: Dong-Young Chang ,  You-Mi Lee ,  Seung-Hoon Lee ,  Geun-Soon Kang ,  Hee-Cheol Choi

    Inventor： Dong-Young Chang ,  You-Mi Lee ,  Seung-Hoon Lee ,  Geun-Soon Kang ,  Hee-Cheol Choi

    IPC: H01L21/8234 ,  H01L27/088 ,  H03F3/45

    CPC classification number: H03F3/45219 ,  H03F3/45654 ,  H03F2203/45398

    Abstract: Operational amplifier integrated circuits include a differential input stage, a cascode current mirror, a cascode current source and a preferred bias signal generator which is responsive to a clock signal and is electrically coupled to the differential input stage, the cascode current mirror and the cascode current source. This preferred bias signal generator sequentially enables the cascode current mirror and then the differential input stage in response to a rising edge of the clock signal and disables the cascode current mirror and the cascode current source in response to a falling edge of the clock signal. This sequential enablement of the cascode current mirror before the differential input stage improves the unity gain phase margin characteristics of the circuit and the disablement of the cascode current mirror and the cascode current source in response to the falling edge of the clock signal decreases the power consumption requirements of the circuit.

    Abstract translation: 运算放大器集成电路包括差分输入级，共源共栅电流镜，共源共栅电流源和优选的偏置信号发生器，其响应于时钟信号并电耦合到差分输入级，共源共栅电流镜和共源共栅电流 资源。 该优选的偏置信号发生器响应于时钟信号的上升沿而依次启用共源共栅电流镜和差分输入级，并响应时钟信号的下降沿禁用共源共栅电流反射镜和共源共栅电流源。 在差分输入级之前，级联电流镜的这种顺序启用提高了电路的单位增益相位裕度特性，并且响应于时钟信号的下降沿，共源共栅电流反射镜和共源共栅电流源的禁用降低了功耗 电路要求。

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