公开(公告)号：US20070020870A1

公开(公告)日：2007-01-25

申请号：US11495655

申请日：2006-07-28

申请人： Gurtej Sandhu

发明人： Gurtej Sandhu

IPC分类号： H01L21/20

CPC分类号： H01L27/10852 ,  H01L21/28518 ,  H01L21/28568 ,  H01L27/10817 ,  H01L27/1085 ,  H01L28/84 ,  H01L28/90

摘要： A semiconductor capacitor structure comprising sidewalls of conductive hemispherical grained material, a base of metal silicide material, and a metal nitride material overlying the conductive hemispherical grained material and the metal silicide material. The semiconductor capacitor structure is fabricated by forming a base of metal silicide material along the sidewalls of an insulative material having an opening therein, forming sidewalls of conductive hemispherical grained material on the metal silicide material, and forming a metal nitride material overlying the conductive hemispherical grained material and the metal silicide material.

摘要翻译： 一种半导体电容器结构，包括导电半球形颗粒材料的侧壁，金属硅化物材料的基底和覆盖在导电半球形颗粒材料和金属硅化物材料上的金属氮化物材料。 半导体电容器结构通过沿着其中具有开口的绝缘材料的侧壁形成金属硅化物材料的基底来制造，在金属硅化物材料上形成导电半球状晶粒材料的侧壁，并且形成覆盖导电半球形晶粒的金属氮化物材料 材料和金属硅化物材料。

公开(公告)号：US20060263997A1

公开(公告)日：2006-11-23

申请号：US11495435

申请日：2006-07-28

申请人： Gurtej Sandhu

发明人： Gurtej Sandhu

IPC分类号： H01L21/44 ,  H01L21/8242

CPC分类号： H01L27/10852 ,  H01L21/28518 ,  H01L21/28568 ,  H01L27/10817 ,  H01L27/1085 ,  H01L28/84 ,  H01L28/90

摘要： A semiconductor capacitor structure comprising sidewalls of conductive hemispherical grained material, a base of metal silicide material, and a metal nitride material overlying the conductive hemispherical grained material and the metal silicide material. The semiconductor capacitor structure is fabricated by forming a base of metal silicide material along the sidewalls of an insulative material having an opening therein, forming sidewalls of conductive hemispherical grained material on the metal silicide material, and forming a metal nitride material overlying the conductive hemispherical grained material and the metal silicide material.

公开(公告)号：US20060263947A1

公开(公告)日：2006-11-23

申请号：US11496315

申请日：2006-07-31

申请人： Mark Fischer ,  Zhiping Yin ,  Thomas Glass ,  Kunal Parekh ,  Gurtej Sandhu

发明人： Mark Fischer ,  Zhiping Yin ,  Thomas Glass ,  Kunal Parekh ,  Gurtej Sandhu

IPC分类号： H01L21/82

CPC分类号： H01L23/5256 ,  H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention relates to a laser fuse. The laser fuse comprises an element comprising a heat conductive material. The fuse also includes an absorption element comprising a material with an adjustable capacity for heat or light absorption that overlays the heat conductive element. The fuse also includes an outer insulating element that overlays and encloses the heat conductive element and the absorption element.

公开(公告)号：US20060258131A1

公开(公告)日：2006-11-16

申请号：US11418582

申请日：2006-05-04

申请人： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Cem Basceri ,  Eric Blomiley

发明人： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Cem Basceri ,  Eric Blomiley

IPC分类号： H01L21/44

CPC分类号： H01L29/66787 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/66742 ,  H01L29/78642

摘要： This invention includes methods of forming layers comprising epitaxial silicon, and field effect transistors. In one implementation, a method of forming a layer comprising epitaxial silicon comprises epitaxially growing a silicon-comprising layer from an exposed monocrystalline material. The epitaxially grown silicon comprises at least one of carbon, germanium, and oxygen present at a total concentration of no greater than 1 atomic percent. In one implementation, the layer comprises a silicon germanium alloy comprising at least 1 atomic percent germanium, and further comprises at least one of carbon and oxygen at a total concentration of no greater than 1 atomic percent. Other aspects and implementations are contemplated.

公开(公告)号：US20060258113A1

公开(公告)日：2006-11-16

申请号：US11460021

申请日：2006-07-26

申请人： Gurtej Sandhu ,  Guy Blalock

发明人： Gurtej Sandhu ,  Guy Blalock

IPC分类号： H01L29/94 ,  H01L21/20

CPC分类号： H01L27/10852 ,  H01L21/02183 ,  H01L21/02197 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/31637 ,  H01L21/31654 ,  H01L27/10811 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/56 ,  H01L28/65 ,  H01L28/91

摘要： A capacitor structure and method of forming it are described. In particular, a high-K dielectric oxide is provided as the capacitor dielectric. The high-K dielectric is deposited in a series of thin layers and oxidized in a series of oxidation steps, as opposed to a depositing a single thick layer. Further, at least one of the oxidation steps is less aggressive than the oxidation environment or environments that would be used to deposit the single thick layer. This allows greater control over oxidizing the dielectric and other components beyond the dielectric.

摘要翻译： 描述电容器结构及其形成方法。 特别地，提供高K电介质氧化物作为电容器电介质。 与沉积单个厚层相反，高K电介质沉积在一系列薄层中并在一系列氧化步骤中被氧化。 此外，至少一个氧化步骤比用于沉积单个厚层的氧化环境或环境更不具有侵蚀性。 这允许更好地控制电介质和超过电介质的其它组件的氧化。

公开(公告)号：US20060258086A1

公开(公告)日：2006-11-16

申请号：US11486512

申请日：2006-07-13

申请人： H. Manning ,  Kunal Parekh ,  Cem Basceri ,  Gurtej Sandhu

发明人： H. Manning ,  Kunal Parekh ,  Cem Basceri ,  Gurtej Sandhu

IPC分类号： H01L21/8242 ,  H01L21/336 ,  H01L21/8238

CPC分类号： H01L29/66787 ,  H01L27/10808 ,  H01L27/10876

摘要： The invention includes methods in which an angled implant is utilized to self-align a source/drain region implant with the top edge of a gateline of a vertical transistor structure. The invention also includes methods in which an angled implant is utilized to implant dopant beneath the gateline of a vertical transistor structure. Vertical transistor structures formed in accordance with methodology of the present invention can be incorporated into various types of integrated circuitry, including, for example, DRAM arrays.

公开(公告)号：US20060257570A1

公开(公告)日：2006-11-16

申请号：US11490622

申请日：2006-07-21

申请人： Garo Derderian ,  Gurtej Sandhu

发明人： Garo Derderian ,  Gurtej Sandhu

IPC分类号： C23C16/00

CPC分类号： C23C16/45525 ,  B05D1/185 ,  C23C16/04 ,  C23C16/045 ,  C23C16/403 ,  C23C16/45531 ,  C30B25/18 ,  H01L21/02178 ,  H01L21/0228 ,  H01L21/3141 ,  H01L21/3162

摘要： A deposition method includes contacting a substrate with a first initiation precursor and forming a first portion of an initiation layer on the substrate. At least a part of the substrate is contacted with a second initiation precursor different from the first initiation precursor and a second portion of the initiation layer is formed on the substrate. The substrate may be simultaneously contacted with a plurality of initiation precursors, forming on the substrate and initiation layer comprising components, derived from each of the plurality of initiation precursors. An initiation layer may be contacted with a deposition precursor, forming a deposition layer on the initiation layer. The deposition layer may be contacted with a second initiation precursor different from the first initiation precursor forming a second initiation layer over the substrate. Also, a first initiation layer may be formed substantially selectively on a first-type substrate surface relative to a second-type substrate surface and contacted with a deposition precursor, forming a deposition layer substantially selectively over the first-type substrate surface.

摘要翻译： 沉积方法包括使基底与第一起始前体接触，并在基底上形成起始层的第一部分。 基板的至少一部分与不同于第一起始前体的第二起始前体接触，并且在基板上形成起始层的第二部分。 衬底可以与多个起始前体同时接触，在衬底上形成并且起始层包含衍生自多个引发前体中的每一个的组分。 引发层可以与沉积前体接触，在引发层上形成沉积层。 沉积层可以与不同于第一起始前体的第二引发前体接触，从而在衬底上形成第二起始层。 此外，第一起始层可以基本上选择性地形成在相对于第二类型衬底表面的第一类型衬底表面上，并与沉积前体接触，在第一类型衬底表面上基本上选择性地形成沉积层。

公开(公告)号：US20060255400A1

公开(公告)日：2006-11-16

申请号：US11489880

申请日：2006-07-20

申请人： Cem Basceri ,  Gurtej Sandhu

发明人： Cem Basceri ,  Gurtej Sandhu

IPC分类号： H01L29/792

CPC分类号： G11C11/5671 ,  G11C8/12 ,  G11C16/0416 ,  G11C16/0466 ,  H01L29/513 ,  H01L29/792

摘要： One-transistor memory devices facilitate nonvolatile data storage through the manipulation of oxygen vacancies within a trapping layer of a field-effect transistor (FET), thereby providing control and variation of threshold voltages of the transistor. Various threshold voltages may be assigned a data value, providing the ability to store one or more bits of data in a single memory cell. To control the threshold voltage, the oxygen vacancies may be manipulated by trapping electrons within the vacancies, freeing trapped electrons from the vacancies, moving the vacancies within the trapping layer and annihilating the vacancies.

公开(公告)号：US20060228084A1

公开(公告)日：2006-10-12

申请号：US11424401

申请日：2006-06-15

申请人： Gurtej Sandhu ,  Guy Blalock

发明人： Gurtej Sandhu ,  Guy Blalock

IPC分类号： G02B6/10

CPC分类号： G02B6/125 ,  G02F1/0102 ,  G02F1/0147 ,  G02F1/2257 ,  G02F2201/30 ,  G02F2201/307 ,  G02F2202/104

摘要： Resistive heaters formed in two mask counts on a surface of a grating of a thermo optic device thereby eliminating one mask count from prior art manufacturing methods. The resistive heater is comprised of a heater region and a conductive path region formed together in a first mask count from a relatively high resistance material. A conductor formed from a relatively low resistance material is formed directly on the conductive path region in a second mask count. Thermo optic devices formed by these two mask count methods are also described.

摘要翻译： 在热光器件的光栅的表面上形成两个掩模计数的电阻加热器，从而从现有技术的制造方法中消除一个掩模计数。 电阻加热器包括加热器区域和形成在来自相对高电阻材料的第一掩模计数中的导电路径区域。 由相对低电阻材料形成的导体以第二掩模计数直接形成在导电路径区域上。 还描述了通过这两种掩模计数方法形成的热光学器件。

公开(公告)号：US20060220184A1

公开(公告)日：2006-10-05

申请号：US11214376

申请日：2005-08-29

申请人： Zhiping Yin ,  Gurtej Sandhu

发明人： Zhiping Yin ,  Gurtej Sandhu

IPC分类号： H01L23/58

CPC分类号： H01L27/10888 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/76802 ,  H01L27/10811 ,  H01L27/10852 ,  H01L28/90

摘要： An antireflective layer formed from boron-doped amorphous carbon may be removed using a process which is less likely to over etch a dielectric layer than conventional technology. This layer may be removed by exposing the layer to an oxygen plasma (i.e. an “ashing” process), preferably concurrently with the ashing and removal of an overlying photoresist layer. An inventive process which uses the inventive antireflective layer is also described.

摘要翻译： 可以使用与常规技术相比不太可能过蚀刻电介质层的方法来去除由硼掺杂的非晶碳形成的抗反射层。 可以通过将层暴露于氧等离子体（即，“灰化”工艺），优选地与上覆的光致抗蚀剂层的灰化和去除同时地去除该层。 还描述了使用本发明的抗反射层的本发明的方法。