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    Deposition methods
    1.
    发明申请
    Deposition methods 审中-公开
    沉积方法

    公开(公告)号：US20060257570A1

    公开(公告)日：2006-11-16

    申请号：US11490622

    申请日：2006-07-21

    申请人： Garo Derderian ,  Gurtej Sandhu

    发明人： Garo Derderian ,  Gurtej Sandhu

    IPC分类号： C23C16/00

    CPC分类号： C23C16/45525 ,  B05D1/185 ,  C23C16/04 ,  C23C16/045 ,  C23C16/403 ,  C23C16/45531 ,  C30B25/18 ,  H01L21/02178 ,  H01L21/0228 ,  H01L21/3141 ,  H01L21/3162

    摘要： A deposition method includes contacting a substrate with a first initiation precursor and forming a first portion of an initiation layer on the substrate. At least a part of the substrate is contacted with a second initiation precursor different from the first initiation precursor and a second portion of the initiation layer is formed on the substrate. The substrate may be simultaneously contacted with a plurality of initiation precursors, forming on the substrate and initiation layer comprising components, derived from each of the plurality of initiation precursors. An initiation layer may be contacted with a deposition precursor, forming a deposition layer on the initiation layer. The deposition layer may be contacted with a second initiation precursor different from the first initiation precursor forming a second initiation layer over the substrate. Also, a first initiation layer may be formed substantially selectively on a first-type substrate surface relative to a second-type substrate surface and contacted with a deposition precursor, forming a deposition layer substantially selectively over the first-type substrate surface.

    摘要翻译： 沉积方法包括使基底与第一起始前体接触，并在基底上形成起始层的第一部分。 基板的至少一部分与不同于第一起始前体的第二起始前体接触，并且在基板上形成起始层的第二部分。 衬底可以与多个起始前体同时接触，在衬底上形成并且起始层包含衍生自多个引发前体中的每一个的组分。 引发层可以与沉积前体接触，在引发层上形成沉积层。 沉积层可以与不同于第一起始前体的第二引发前体接触，从而在衬底上形成第二起始层。 此外，第一起始层可以基本上选择性地形成在相对于第二类型衬底表面的第一类型衬底表面上，并与沉积前体接触，在第一类型衬底表面上基本上选择性地形成沉积层。

    Atomic layer deposition methods, and methods of forming materials over semiconductor substrates
    3.
    发明申请
    Atomic layer deposition methods, and methods of forming materials over semiconductor substrates 有权
    原子层沉积方法以及在半导体衬底上形成材料的方法

    公开(公告)号：US20050159018A1

    公开(公告)日：2005-07-21

    申请号：US11078537

    申请日：2005-03-10

    申请人： Garo Derderian ,  Gurtej Sandhu

    发明人： Garo Derderian ,  Gurtej Sandhu

    IPC分类号： C23C16/44 ,  C23C16/455 ,  H01L21/285 ,  H01L21/31 ,  H01L21/44 ,  H01L21/469

    CPC分类号： C23C16/45536 ,  C23C16/44 ,  H01L21/28562

    摘要： The invention includes methods in which at least two different precursors are flowed into a reaction chamber at different and substantially non-overlapping times relative to one another to form a material over at least a portion of a substrate, and in which at least one of the precursors is asymmetric with respect to a physical property. A field influencing the asymmetric physical property is oriented within the reaction chamber, and is utilized to affect alignment of the precursor having the asymmetric property as the material is formed. The asymmetric physical property can, for example, be an anisotropic charge distribution associated with the precursor, and in such aspect, the field utilized to influence the asymmetric physical property can be an electric field provided within the reaction chamber and/or a magnetic field provided within the reaction chamber. The methodology of the present invention can be utilized in atomic layer deposition processes.

    摘要翻译： 本发明包括这样的方法，其中至少两种不同的前体相对于彼此以不同的和基本上不重叠的时间流入反应室，以在基底的至少一部分上形成材料，并且其中至少一个 前体在物理性质方面是不对称的。 影响不对称物理性质的场定向在反应室内，并且用于影响形成材料时具有不对称性质的前体的取向。 不对称物理性质可以是例如与前体相关的各向异性电荷分布，在这种方面，用于影响不对称物理性质的场可以是在反应室内提供的电场和/或提供的磁场 在反应室内。 本发明的方法可用于原子层沉积工艺。

    Capacitor fabrication methods and capacitor constructions
    4.
    发明申请
    Capacitor fabrication methods and capacitor constructions 审中-公开
    电容器制造方法和电容器结构

    公开(公告)号：US20070178640A1

    公开(公告)日：2007-08-02

    申请号：US11732201

    申请日：2007-04-02

    申请人： Garo Derderian ,  Gurtej Sandhu

    发明人： Garo Derderian ,  Gurtej Sandhu

    IPC分类号： H01L21/8242

    CPC分类号： H01L28/56 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02189 ,  H01L21/02197 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/28568 ,  H01L21/31604 ,  H01L28/75 ,  H01L28/84

    摘要： A capacitor fabrication method may include atomic layer depositing a conductive barrier layer to oxygen diffusion over the first electrode. A method may instead include chemisorbing a layer of a first precursor at least one monolayer thick over the first electrode and chemisorbing a layer of a second precursor at least one monolayer thick on the first precursor layer, a chemisorption product of the first and second precursor layers being comprised by a layer of a conductive barrier material. The barrier layer may be sufficiently thick and dense to reduce oxidation of the first electrode by oxygen diffusion from over the barrier layer. An alternative method may include forming a first capacitor electrode over a substrate, the first electrode having an inner surface area per unit area and an outer surface area per unit area that are both greater than an outer surface area per unit area of the substrate. A capacitor dielectric layer and a second capacitor electrode may be formed over the dielectric layer. The method may further include forming rugged polysilicon over the substrate, the first electrode being over the rugged polysilicon. Accordingly, the outer surface area of the first electrode can be at least 30% greater than the outer surface area of the substrate without the first electrode including polysilicon.

    摘要翻译： 电容器制造方法可以包括在第一电极上的氧扩散的原子层沉积导电阻挡层。 一种方法可以包括在第一电极上化学吸附至少一层单层的第一前体层，并化学吸附第一前体层上至少一层单层的第二前体层，第一和第二前体层的化学吸附产物 由导电阻挡材料层组成。 阻挡层可以是足够厚且致密的，以通过从阻挡层上方的氧扩散来减少第一电极的氧化。 替代方法可以包括在衬底上形成第一电容器电极，第一电极具有每单位面积的内表面积和每单位面积的外表面积，其大于衬底每单位面积的外表面积。 可以在电介质层上形成电容器电介质层和第二电容器电极。 该方法还可以包括在衬底上形成坚固的多晶硅，第一电极在坚固的多晶硅之上。 因此，第一电极的外表面积可以比不含第一电极包括多晶硅的衬底的外表面积大至少30％。

    Deposition methods and apparatuses providing surface activation
    5.
    发明申请
    Deposition methods and apparatuses providing surface activation 审中-公开

    公开(公告)号：US20060183322A1

    公开(公告)日：2006-08-17

    申请号：US11394971

    申请日：2006-03-30

    申请人： Gurtej Sandhu ,  Garo Derderian ,  Guy Blalock ,  Terry Gilton

    发明人： Gurtej Sandhu ,  Garo Derderian ,  Guy Blalock ,  Terry Gilton

    IPC分类号： H01L21/44

    CPC分类号： C23C16/45544 ,  C23C16/44 ,  C23C16/45527 ,  C23C16/45534 ,  C30B25/02 ,  C30B25/18

    摘要： A deposition method includes, at a first temperature, contacting a substrate with a surface activation agent and adsorbing a first layer over the substrate. At a second temperature greater than the first temperature, the first layer may be contacted with a first precursor, chemisorbing a second layer at least one monolayer thick over the substrate. The first layer may enhance a chemisorption rate of the first precursor compared to the substrate without the surface activation agent adsorbed thereon. One deposition apparatus includes a deposition chamber with a precursor gas dispenser in a contacting zone and a cooling gas dispenser in a cooling zone. A substrate chuck moves by linear translational motion from the contacting zone to the cooling zone. The substrate chuck includes a substrate lift that positions a deposition substrate at an elevation above a heated surface of the substrate chuck when dispensing a cooling gas or surface activation agent. Another deposition apparatus includes a cooling chamber with a cooled substrate chuck and a contacting chamber with a heated substrate chuck. The contacting chamber also has a precursor gas dispenser and the heated substrate chuck includes a substrate lift. A robotic substrate handler moves a substrate from the cooled substrate chuck to the heated substrate chuck.

    Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers
    6.
    发明申请
    Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers 审中-公开

    公开(公告)号：US20060076597A1

    公开(公告)日：2006-04-13

    申请号：US11235866

    申请日：2005-09-26

    申请人： Vishnu Agarwal ,  Garo Derderian ,  Gurtej Sandhu ,  Weimin Li ,  Mark Visokay ,  Cem Basceri ,  Sam Yang

    发明人： Vishnu Agarwal ,  Garo Derderian ,  Gurtej Sandhu ,  Weimin Li ,  Mark Visokay ,  Cem Basceri ,  Sam Yang

    IPC分类号： H01L29/94

    CPC分类号： H01L28/84 ,  H01L21/02183 ,  H01L21/02197 ,  H01L21/31637 ,  H01L28/55 ,  H01L28/65

    摘要： Capacitors having increased capacitance include an enhanced-surface-area (rough-surfaced) electrically conductive layer or other layers that are compatible with the high-dielectric constant materials. In one approach, an enhanced-surface-area electrically conductive layer for such capacitors is formed by processing a ruthenium oxide layer at high temperature at or above 500° C. and low pressure 75 torr or below, most desirably 5 torr or below, to produce a roughened ruthenium layer having a textured surface with a mean feature size of at least about 100 Angstroms. The initial ruthenium oxide layer may be provided by chemical vapor deposition techniques or sputtering techniques or the like. The layer may be formed over an underlying electrically conductive layer. The processing may be performed in an inert ambient or in a reducing ambient. A nitrogen-supplying ambient or nitrogen-supplying reducing ambient may be used during the processing or afterwards to passivate the ruthenium for improved compatibility with high-dielectric-constant dielectric materials. Processing in an oxidizing ambient may also be performed to passivate the roughened layer. The roughened layer of ruthenium may be used to form an enhanced-surface-area electrically conductive layer. The resulting enhanced-surface-area electrically conductive layer may form a plate of a storage capacitor in an integrated circuit, such as in a memory cell of a DRAM or the like. In another approach, a tungsten nitride layer is provided as an first electrode of such a capacitor. The capacitor, or at least the tungsten nitride layer, is annealed to increase the capacitance of the capacitor.

    Deposition chamber surface enhancement and resulting deposition chambers
    7.
    发明申请
    Deposition chamber surface enhancement and resulting deposition chambers 审中-公开
    沉积室表面增强和沉积室

    公开(公告)号：US20060065635A1

    公开(公告)日：2006-03-30

    申请号：US11271673

    申请日：2005-11-09

    申请人： Garo Derderian ,  Gurtej Sandhu ,  Ross Dando ,  Craig Carpenter ,  Philip Campbell

    发明人： Garo Derderian ,  Gurtej Sandhu ,  Ross Dando ,  Craig Carpenter ,  Philip Campbell

    IPC分类号： C23C16/52 ,  C03C15/00

    CPC分类号： H01J37/32477 ,  C23C16/4404 ,  H01J37/3244 ,  H01J2237/022

    摘要： Methods for passivating exposed surfaces within an apparatus for depositing thin films on a substrate are disclosed. Interior surfaces of a deposition chamber and conduits in communication therewith are passivated to prevent reactants used in a deposition process and reaction products from adsorbing or chemisorbing to the interior surfaces. The surfaces may be passivated for this purpose by surface treatments, lining, temperature regulation, or combinations thereof. A method for determining a temperature or temperature range at which to maintain a surface to minimize accumulation of reactants and reaction products is also disclosed. A deposition apparatus with passivated surfaces within the deposition chamber and gas flow paths is also disclosed.

    摘要翻译： 公开了在用于在衬底上沉积薄膜的装置中的暴露表面钝化的方法。 沉积室的内表面和与其连通的导管被钝化以防止在沉积过程中使用的反应物和反应产物吸附或化学吸附到内表面。 表面可以通过表面处理，衬里，温度调节或其组合来钝化。 还公开了用于确定维持表面以使反应物和反应产物的积聚最小化的温度或温度范围的方法。 还公开了在沉积室和气体流动路径内具有钝化表面的沉积设备。

    Atomic layer deposition apparatus
    8.
    发明申请
    Atomic layer deposition apparatus 审中-公开
    原子层沉积装置

    公开(公告)号：US20050048792A1

    公开(公告)日：2005-03-03

    申请号：US10954845

    申请日：2004-09-29

    申请人： Garo Derderian ,  Cem Basceri ,  Gurtej Sandhu ,  Demetrius Sarigiannis

    发明人： Garo Derderian ,  Cem Basceri ,  Gurtej Sandhu ,  Demetrius Sarigiannis

    IPC分类号： C30B25/00 ,  C30B35/00 ,  H01L21/31

    CPC分类号： C30B35/00 ,  C30B25/00 ,  C30B29/68

    摘要： An atomic layer deposition method includes positioning a semiconductor substrate within an atomic layer deposition chamber. A fixed volume first precursor gas charge is provided within a gas flow path to the deposition chamber. A fixed volume purge gas charge is provided within the gas flow path serially upstream of the first precursor gas charge. The first precursor gas charge and the purge gas charge are serially flowed along the gas flow path to the substrate within the deposition chamber effective to form a monolayer on the substrate and purge at least some of the first precursor gas from the substrate. Apparatus are also disclosed.

    摘要翻译： 原子层沉积方法包括将半导体衬底定位在原子层沉积室内。 在到达沉积室的气体流动路径内提供固定体积的第一前体气体进料。 在第一前体气体装料的串联的气体流动路径内提供固定体积的吹扫气体装料。 第一前体气体装料和吹扫气体装料沿着气体流动路径顺序地流动到沉积室内的基板，有效地在基板上形成单层，并且从基板清除至少一些第一前体气体。 还公开了装置。

    Atomic layer deposition method
    9.
    发明申请
    Atomic layer deposition method 失效
    原子层沉积法

    公开(公告)号：US20050039674A1

    公开(公告)日：2005-02-24

    申请号：US10956925

    申请日：2004-09-30

    申请人： Paul Castovillo ,  Cem Basceri ,  Garo Derderian ,  Gurtej Sandhu

    发明人： Paul Castovillo ,  Cem Basceri ,  Garo Derderian ,  Gurtej Sandhu

    IPC分类号： C23C16/34 ,  C23C14/06 ,  C23C14/08 ,  C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  C30B25/14 ,  H01L21/285 ,  H01L21/316 ,  H01L21/768 ,  C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14 ,  H01L21/8238

    CPC分类号： C30B25/14 ,  C23C14/0641 ,  C23C14/081 ,  C23C16/34 ,  C23C16/403 ,  C23C16/45527 ,  C23C16/45531

    摘要： An atomic layer deposition method includes positioning a semiconductor substrate within an atomic layer deposition chamber. A first precursor gas is flowed to the substrate within the atomic layer deposition chamber effective to form a first monolayer on the substrate. After forming the first monolayer, a reactive intermediate gas is flowed to the substrate within the deposition chamber. The reactive intermediate gas is capable of reaction with an intermediate reaction by-product from the first precursor flowing under conditions of the reactive intermediate gas flowing. After flowing the reactive intermediate gas, a second precursor gas is flowed to the substrate within the deposition chamber effective to form a second monolayer on the first monolayer. Other aspects and implementations are contemplated.

    摘要翻译： 原子层沉积方法包括将半导体衬底定位在原子层沉积室内。 第一前体气体流到原子层沉积室内的衬底，有效地在衬底上形成第一单层。 在形成第一单层之后，反应性中间气体流到沉积室内的衬底。 反应性中间体气体能够与在反应性中间体气体流动的条件下流动的第一前体的中间反应副产物反应。 在流动反应性中间气体之后，第二前体气体流到沉积室内的衬底，有效地在第一单层上形成第二单层。 考虑了其他方面和实现。