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    Semiconductor memory device and method of fabricating the same
    81.
    发明授权
    Semiconductor memory device and method of fabricating the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US06243286B1

    公开(公告)日：2001-06-05

    申请号：US09361095

    申请日：1999-07-26

    申请人： Takashi Kumagai ,  Junichi Karasawa ,  Kazuo Tanaka ,  Kunio Watanabe

    发明人： Takashi Kumagai ,  Junichi Karasawa ,  Kazuo Tanaka ,  Kunio Watanabe

    IPC分类号： G11C1100

    CPC分类号： H01L27/11 ,  H01L27/1104 ,  Y10S257/903

    摘要： An SRAM comprises first, second and third conductive layers. The first conductive layer is a gate electrode for a first load transistor and a first driver transistor. The second conductive layer branches from the first conductive layer on a field oxide region and is electrically connected to a second driver transistor active region. The third conductive layer is a gate electrode for a second load transistor and a second driver transistor. The third conductive layer is electrically connected to a first load transistor active region. The width of part of the second conductive layer on the field oxide region is less than the width of the first conductive layer.

    摘要翻译： SRAM包括第一，第二和第三导电层。 第一导电层是用于第一负载晶体管和第一驱动晶体管的栅电极。 第二导电层在场氧化物区域上从第一导电层分支并且电连接到第二驱动晶体管有源区。 第三导电层是用于第二负载晶体管的栅电极和第二驱动晶体管。 第三导电层电连接到第一负载晶体管有源区。 场氧化物区域上的第二导电层的一部分的宽度小于第一导电层的宽度。

    CMOS device with improved wiring density
    82.
    发明授权
    CMOS device with improved wiring density 有权
    具有改善布线密度的CMOS器件

    公开(公告)号：US6081016A

    公开(公告)日：2000-06-27

    申请号：US282035

    申请日：1999-03-30

    申请人： Kazuo Tanaka ,  Takashi Kumagai ,  Junichi Karasawa ,  Kunio Watanabe

    发明人： Kazuo Tanaka ,  Takashi Kumagai ,  Junichi Karasawa ,  Kunio Watanabe

    IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/60 ,  H01L21/768 ,  H01L21/8238 ,  H01L21/8244 ,  H01L27/092 ,  H01L27/11 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC分类号： H01L27/11 ,  H01L21/28518 ,  H01L21/76895 ,  H01L21/76897 ,  H01L27/1104

    摘要： A method of manufacturing a semiconductor device comprising the following steps: forming first, second, and third wiring layers on a semiconductor substrate; forming first, second, and third cover dielectric layers for covering these wiring layers; forming a first impurity diffusion layer of a P type and a second impurity diffusion layer of an N type in an active region, and forming a third impurity diffusion layer of a P type and a fourth impurity diffusion layer cf an N type in an active region; self-alignably forming a first local wiring layer for connecting the first impurity diffusion layer with the second wiring layer, and self-alignably forming a second local wiring layer for connecting the fourth impurity diffusion layer with the third wiring layer; in an interlayer dielectric layer, self-alignably forming a first contact hole by using the first and third cover dielectric layers as masking layers, and self-alignably forming a second contact hole by using the second cover dielectric layer as a masking layer; and forming fourth and fifth wiring layers in these contact holes, respectively.

    摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在半导体衬底上形成第一，第二和第三布线层; 形成用于覆盖这些布线层的第一，第二和第三覆盖电介质层; 在有源区中形成P型和N型的第二杂质扩散层的第一杂质扩散层，在有源区中形成N型的P型和第四杂质扩散层的第三杂质扩散层 ; 自对准地形成用于将第一杂质扩散层与第二布线层连接的第一局部布线层，并自对准地形成用于将第四杂质扩散层与第三布线层连接的第二局部布线层; 在层间电介质层中，通过使用第一和第三覆盖电介质层作为掩蔽层自对准地形成第一接触孔，并且通过使用第二覆盖电介质层作为掩蔽层自对准地形成第二接触孔; 并且在这些接触孔中分别形成第四和第五布线层。

    Semiconductor memory device and a method for stepping up its word lines
    83.
    发明授权
    Semiconductor memory device and a method for stepping up its word lines 失效
    半导体存储器件及其字线升高的方法

    公开(公告)号：US5875133A

    公开(公告)日：1999-02-23

    申请号：US809383

    申请日：1997-06-19

    申请人： Koji Miyashita ,  Takashi Kumagai ,  Yasunobu Tokuda

    发明人： Koji Miyashita ,  Takashi Kumagai ,  Yasunobu Tokuda

    IPC分类号： G11C8/08 ,  G11C8/14 ,  G11C16/04

    CPC分类号： G11C8/14 ,  G11C8/08

    摘要： A semiconductor memory device that steps up word lines, each of whose length is short enough to stay within one of the blocks that is formed by dividing a memory cell array into multiple blocks. The device includes multiple memory cells connected to pairs of bit lines and word lines at intersections of the pairs of bit lines and the word lines. Multiple memory cell array blocks are formed by dividing the region where the memory cells are arranged into blocks. A first step-up line is commonly used in stepping-up the word lines. A step-up circuit is constructed of a step-up capacitor, which is connected to the first step-up line and a switching transistor, which precharges the step-up capacitor. The semiconductor memory device also has a step-up control circuit that outputs a precharge control signal, which precharges the step-up capacitor by ON driving the switching transistor, and a step-up driving signal, which changes the potential of the negative terminal of the step-up capacitor of the step-up circuit. Further, a second step-up line is provided in each memory cell array block. During operation, a single memory cell array block is selected by a block selective circuit and a single word line is selected by row selective circuits. In this manner, the single selected word line within the single selected memory cell array block is stepped up by means of the first and second step-up lines.

    摘要翻译： PCT No.PCT / JP96 / 02018 Sec。 371日期：1997年6月19日 102（e）日期1996年6月19日PCT PCT 1996年7月19日PCT公布。 出版物WO97 / 04458 日期1997年2月6日一种半导体存储器件，其加长字线，其长度足够短以保持在通过将存储器单元阵列分割成多个块而形成的块之一内。 该装置包括多个存储器单元，连接到位线对和字线对，位线对和字线对的交点处。 多个存储单元阵列块通过将存储单元排列成块的区域进行划分而形成。 第一个升压线通常用于加紧字线。 升压电路由与第一升压线连接的升压电容器和对升压电容器进行预充电的开关晶体管构成。 半导体存储器件还具有升压控制电路，其输出通过ON驱动开关晶体管对升压电容器进行预充电的预充电控制信号，以及升压驱动信号，其使负极端子的电位变化 升压电路的升压电容器。 此外，在每个存储单元阵列块中提供第二升压线。 在操作期间，通过块选择电路选择单个存储单元阵列块，并且通过行选择电路选择单个字线。 以这种方式，单个选择的存储单元阵列块内的单个选定字线通过第一和第二升压线被升高。

    Shape detecting device
    85.
    发明授权
    Shape detecting device 失效
    形状检测装置

    公开(公告)号：US4484080A

    公开(公告)日：1984-11-20

    申请号：US402411

    申请日：1982-07-27

    申请人： Takashi Kumagai

    发明人： Takashi Kumagai

    IPC分类号： G03B13/36 ,  G01B11/24 ,  G01B11/245 ,  G02B7/28 ,  G03B3/00 ,  G01N21/86

    CPC分类号： G01B11/245

    摘要： A detecting device comprising a projecting optical system for focusing the image of an object to be examined on a focusing glass, a plurality of photoelectric elements which can be set in proper positions on the focusing glass, circuits including level adjusting circuits and for converting outputs from the respective photoelectric elements to binary logical outputs and circuits for converting these binary logical inputs to octonary logical outputs so that the slightest variations of the shape and state of the object can be easily and accurately detected. The respective photoelectric elements can be moved out of the projecting light path as required. The projecting optical system consists of an objective lens system and a projecting lens system so that a magnified erecting image of the object can be obtained on the focusing glass.

    摘要翻译： 一种检测装置，包括用于将待检查对象的图像聚焦在聚焦玻璃上的投影光学系统，可以设置在聚焦玻璃上的适当位置的多个光电元件，包括电平调节电路的电路， 各个光电元件到二进制逻辑输出和用于将这些二进制逻辑输入转换成八进制逻辑输出的电路，使得可以容易且精确地检测对象的形状和状态的最微小的变化。 各光电元件可根据需要移出投影光路。 投影光学系统由物镜系统和投影透镜系统组成，从而可以在聚焦玻璃上获得物体的放大的立体图像。

    Data processing system having data reproduction independent of data processing
    87.
    发明授权
    Data processing system having data reproduction independent of data processing 有权
    具有独立于数据处理的数据再现的数据处理系统

    公开(公告)号：US08345365B2

    公开(公告)日：2013-01-01

    申请号：US13358297

    申请日：2012-01-25

    申请人： Toshiyuki Arai ,  Takashi Kumagai ,  Hajime Inai ,  Hiroaki Sato ,  Fumitake Yodo ,  Masami Oyama

    发明人： Toshiyuki Arai ,  Takashi Kumagai ,  Hajime Inai ,  Hiroaki Sato ,  Fumitake Yodo ,  Masami Oyama

    IPC分类号： G11B5/00

    CPC分类号： G11B31/00 ,  G11B20/00007 ,  G11B20/10527 ,  G11B27/005 ,  G11B27/034 ,  G11B27/105 ,  G11B27/11 ,  G11B27/329 ,  G11B27/34 ,  G11B2220/213 ,  G11B2220/2525 ,  G11B2220/2545 ,  G11B2220/2562 ,  H04R5/02

    摘要： A processing unit performs a method including controlling a reading-out of data from a first storage medium at a predetermined read-out data rate to produce inputted data, and controlling a compression of the inputted data to produce first compressed data of a first compressed format. The method includes controlling a storage of the first compressed data in a second storage medium at a faster writing data rate than the predetermined read-out data rate, controlling a reading-out of second compressed data of a second compressed format from the second storage medium, and controlling a decompression of the second compressed data to produce decompressed data. The method also includes controlling simultaneously the storage of the first compressed data in the second storage medium, the reading-out of the second compressed data from the second storage medium, and audibly reproducing the decompressed data. The first compressed format is different from the second compressed format.

    摘要翻译： 处理单元执行包括以预定的读出数据速率控制从第一存储介质读出数据以产生输入数据并且控制输入数据的压缩以产生第一压缩格式的第一压缩数据的方法 。 该方法包括以比预定读出数据速率更快的写入数据速率控制第二存储介质中的第一压缩数据的存储，控制从第二存储介质读出第二压缩格式的第二压缩数据 并且控制第二压缩数据的解压缩以产生解压缩数据。 该方法还包括同时控制第二存储介质中的第一压缩数据的存储，从第二存储介质读出第二压缩数据，以及可听再现解压缩的数据。 第一种压缩格式与第二种压缩格式不同。

    Apparatus for automatically separating and detecting noise radio waves
    88.
    发明授权
    Apparatus for automatically separating and detecting noise radio waves 有权
    用于自动分离和检测噪声无线电波的装置

    公开(公告)号：US08249516B2

    公开(公告)日：2012-08-21

    申请号：US12681222

    申请日：2008-08-29

    申请人： Hideki Kumagai ,  Takashi Kumagai

    发明人： Hideki Kumagai ,  Takashi Kumagai

    IPC分类号： H04B17/00

    CPC分类号： H04B1/12 ,  G01V3/12

    摘要： An output signal SHS is secondarily amplified by a high-frequency amplifier AMP3 and an output signal SHR is secondarily amplified by an AMP4 for which high-frequency side amplitude reducing means is taken. In this case, the AMP4 has small gain of a high-frequency region and its output SHR-2 is reduced in amplitude. However, a high-frequency noise has a frequency higher than that of a carrier wave SH and the amplitude of a noise NzB becomes smaller. The other output signal SHS is directly amplified by the wideband amplifier AMP3. The width of an SHS-2 and the width of the SHR-2 are adjusted by amplitude adjusting means throughout the whole region and then mutually added by both signals addition amplifying means again so that the amplitude of the output signal SHS is adjusted to the SHR-2, and a predetermined threshold value is set to extract the noises.

    摘要翻译： 输出信号SHS被高频放大器AMP3二次放大，并且输出信号SHR由被采用高频侧振幅降低装置的AMP4二次放大。 在这种情况下，AMP4具有高频区域的小增益，并且其输出SHR-2的振幅减小。 然而，高频噪声的频率高于载波SH的频率，并且噪声的振幅NzB变小。 另一个输出信号SHS由宽带放大器AMP3直接放大。 SHS-2的宽度和SHR-2的宽度通过振幅调整装置在整个区域中进行调整，然后由两个信号加法放大装置再次相加，使得输出信号SHS的振幅被调整到SHR -2，并且设置预定阈值以提取噪声。

    IMAGE PROCESSING APPARATUS AND IMAGE PROCESSING METHOD
    89.
    发明申请
    IMAGE PROCESSING APPARATUS AND IMAGE PROCESSING METHOD 审中-公开
    图像处理装置和图像处理方法

    公开(公告)号：US20120154539A1

    公开(公告)日：2012-06-21

    申请号：US13300254

    申请日：2011-11-18

    申请人： Tamotsu Hasegawa ,  Takashi Kumagai ,  Nobuyuki Ikeda

    发明人： Tamotsu Hasegawa ,  Takashi Kumagai ,  Nobuyuki Ikeda

    IPC分类号： H04N13/02

    CPC分类号： H04N13/128 ,  H04N13/156 ,  H04N13/178 ,  H04N13/183

    摘要： According to one embodiment, an image processing apparatus including a background image generator which generates a background image, a receiver which receives additional information, a depth memory which stores in advance a depth for each of types of the additional information, a depth decide module which determines a type of the additional information received by the receiver, and reads a depth which is associated with the determined type from the depth memory, a three-dimensional image generator which generates an object image based on the additional information, and generates a three-dimensional image based on the object image and the depth which is read by the depth decide module, an image composite module which generates a video signal by displaying the background image and displaying the three-dimensional image in front of the displayed background image, and an output module which outputs the video signal generated by the image composite module.

    摘要翻译： 根据一个实施例，一种图像处理装置，包括产生背景图像的背景图像生成器，接收附加信息的接收器，预先存储每种附加信息的深度的深度存储器，深度决定模块， 确定由接收器接收的附加信息的类型，并且从深度存储器读取与所确定的类型相关联的深度，基于附加信息生成对象图像的三维图像生成器， 基于由深度决定模块读取的对象图像和深度的三维图像，通过显示背景图像并在显示的背景图像的前方显示三维图像来生成视频信号的图像合成模块，以及 输出模块，其输出由图像复合模块生成的视频信号。

    Dust box and electric tool with the dust box
    90.
    发明授权
    Dust box and electric tool with the dust box 有权
    防尘盒和电动工具与集尘箱

    公开(公告)号：US08197310B2

    公开(公告)日：2012-06-12

    申请号：US13273570

    申请日：2011-10-14

    申请人： Yukio Yamashiro ,  Hirokazu Hagiwara ,  Yoshifumi Morita ,  Takashi Kumagai

    发明人： Yukio Yamashiro ,  Hirokazu Hagiwara ,  Yoshifumi Morita ,  Takashi Kumagai

    IPC分类号： B24B55/06

    CPC分类号： B23Q11/0042 ,  B23Q11/0046 ,  B24B55/102 ,  Y02P70/171

    摘要： A dust box includes: an attachment portion configured to be attached to a dust-discharging nozzle extending from a housing of an electric tool; and a dust-collecting portion connected to the attachment portion and configured to store dust particles to be discharged from the nozzle. The dust-collecting portion mainly consists of a box which is made of synthetic resin and configured to be detachably connected to the attachment portion, and a paper bag received in the box and configured to store the dust particles to be discharged from the nozzle.

    摘要翻译： 集尘盒包括：附接部，其构造成附接到从电动工具的壳体延伸的排尘喷嘴; 以及集尘部，其连接到所述安装部，并且构造成存储要从所述喷嘴排出的灰尘颗粒。 集尘部分主要由合成树脂制成的盒子构成，其可拆卸地连接到安装部分，纸箱容纳在盒子中，用于存储要从喷嘴排出的灰尘颗粒。