公开(公告)号：US09922869B2

公开(公告)日：2018-03-20

申请号：US15687504

申请日：2017-08-27

Applicant: Micron Technology, Inc.

Inventor： David H. Wells

IPC: H01L21/76 ,  H01L21/764 ,  H01L21/02 ,  H01L21/20

CPC classification number: H01L21/764 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/2015

Abstract: Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

公开(公告)号：US20170372943A1

公开(公告)日：2017-12-28

申请号：US15687506

申请日：2017-08-27

Applicant: Micron Technology, Inc.

Inventor： David H. Wells

IPC: H01L21/764 ,  H01L21/02 ,  H01L21/20

CPC classification number: H01L21/764 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/2015

Abstract: Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

公开(公告)号：US20170372941A1

公开(公告)日：2017-12-28

申请号：US15684741

申请日：2017-08-23

Applicant: Micron Technology, Inc.

Inventor： David H. Wells

IPC: H01L21/764 ,  H01L21/02 ,  H01L21/20

CPC classification number: H01L21/764 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/2015

Abstract: Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

公开(公告)号：US20170358627A1

公开(公告)日：2017-12-14

申请号：US15665577

申请日：2017-08-01

Applicant: Micron Technology, Inc.

Inventor： David H. Wells ,  Christopher D. Cardon ,  Caner Onal

IPC: H01L27/24 ,  H01L45/00 ,  H01L27/22 ,  G11C13/00

CPC classification number: H01L27/2427 ,  G11C13/0007 ,  G11C13/0021 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2213/33 ,  G11C2213/35 ,  G11C2213/52 ,  H01L27/224 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/14 ,  H01L45/141 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1608

Abstract: The present disclosure includes select devices and methods of using select device for memory cell applications. An example select device includes a first electrode having a particular geometry, a semiconductor material formed on the first electrode and a second electrode having the particular geometry with formed on the semiconductor material, wherein the select device is configured to snap between resistive states in response to signals that are applied to the select device.

公开(公告)号：US20170352579A1

公开(公告)日：2017-12-07

申请号：US15687504

申请日：2017-08-27

Applicant: Micron Technology, Inc.

Inventor： David H. Wells

IPC: H01L21/764 ,  H01L21/02 ,  H01L21/20

CPC classification number: H01L21/764 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/2015

Abstract: Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

公开(公告)号：US09735200B2

公开(公告)日：2017-08-15

申请号：US15215659

申请日：2016-07-21

Applicant: Micron Technology, Inc.

Inventor： David H. Wells ,  Christopher D. Cardon ,  Caner Onal

IPC: G11C11/00 ,  H01L27/24 ,  G11C13/00 ,  H01L45/00 ,  H01L27/22

CPC classification number: H01L27/2427 ,  G11C13/0007 ,  G11C13/0021 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2213/33 ,  G11C2213/35 ,  G11C2213/52 ,  H01L27/224 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/14 ,  H01L45/141 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1608

Abstract: The present disclosure includes select devices and methods of using select device for memory cell applications. An example select device includes a first electrode having a particular geometry, a semiconductor material formed on the first electrode and a second electrode having the particular geometry with formed on the semiconductor material, wherein the select device is configured to snap between resistive states in response to signals that are applied to the select device.

公开(公告)号：US20160329377A1

公开(公告)日：2016-11-10

申请号：US15215659

申请日：2016-07-21

Applicant: Micron Technology, Inc.

Inventor： David H. Wells ,  Christopher D. Cardon ,  Caner Onal

IPC: H01L27/24 ,  G11C13/00 ,  H01L45/00

CPC classification number: H01L27/2427 ,  G11C13/0007 ,  G11C13/0021 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2213/33 ,  G11C2213/35 ,  G11C2213/52 ,  H01L27/224 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/14 ,  H01L45/141 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1608

Abstract: The present disclosure includes select devices and methods of using select device for memory cell applications. An example select device includes a first electrode having a particular geometry, a semiconductor material formed on the first electrode and a second electrode having the particular geometry with formed on the semiconductor material, wherein the select device is configured to snap between resistive states in response to signals that are applied to the select device.

公开(公告)号：US20150325791A1

公开(公告)日：2015-11-12

申请号：US14754172

申请日：2015-06-29

Applicant: MICRON TECHNOLOGY, INC.

Inventor： David H. Wells

IPC: H01L45/00

CPC classification number: H01L45/1691 ,  H01L21/0337 ,  H01L21/31122 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76885 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/1052 ,  H01L27/112 ,  H01L27/11206 ,  H01L27/115 ,  H01L45/06 ,  H01L45/085 ,  H01L45/124 ,  H01L45/144 ,  H01L45/149 ,  H01L45/1608 ,  H01L45/1683

Abstract: Methods of forming arrays of small, densely spaced holes or pillars for use in integrated circuits are disclosed. Various pattern transfer and etching steps can be used, in combination with pitch-reduction techniques, to create densely-packed features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed patterns of crossing elongate features with pillars at the intersections. Spacers are simultaneously applied to sidewalls of both sets of crossing lines to produce a pitch-doubled grid pattern. The pillars facilitate rows of spacers bridging columns of spacers.

公开(公告)号：US20150325645A1

公开(公告)日：2015-11-12

申请号：US14803662

申请日：2015-07-20

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Song Guo ,  Yushi Hu ,  Roy Meade ,  Sanh D. Tang ,  Michael P. Violette ,  David H. Wells

IPC: H01L29/06

CPC classification number: H01L29/0649 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/76224 ,  H01L21/76283 ,  H01L21/76286 ,  H01L29/04 ,  H01L29/32

Abstract: Disclosed are methods and resulting structures which provide an opening for epitaxial growth, the opening having an associated projection for reducing the size of the contact area on a substrate at which growth begins. During growth, the epitaxial material grows vertically from the contact area and laterally over the projection. The projection provides a stress relaxation region for the lateral growth to reduce dislocation and stacking faults at the side edges of the grown epitaxial material.

公开(公告)号：US09136472B2

公开(公告)日：2015-09-15

申请号：US14302792

申请日：2014-06-12

Applicant: Micron Technology, Inc.

Inventor： David H. Wells

IPC: H01L21/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/126 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/144 ,  H01L45/16

Abstract: Resistive memory and methods of processing resistive memory are described herein. One or more method embodiments of processing resistive memory include forming a resistive memory cell material on an electrode having an access device contact, and forming a heater electrode on the resistive memory cell material after forming the resistive memory cell material on the electrode such that the heater electrode is self-aligned to the resistive memory cell material.

Abstract translation: 本文描述了电阻存储器和处理电阻性存储器的方法。 处理电阻性存储器的一个或多个方法实施例包括在具有存取装置接触的电极上形成电阻性存储单元材料，以及在电阻上形成电阻式存储单元材料之后，在电阻式存储单元材料上形成加热器电极，使得加热器 电极与电阻式存储单元材料自对准。