Air cooled oil cooler
    81.
    发明授权
    Air cooled oil cooler 失效
    风冷式油冷却器

    公开(公告)号:US07367386B2

    公开(公告)日:2008-05-06

    申请号:US11332288

    申请日:2006-01-17

    IPC分类号: F28D1/02

    摘要: An air cooled oil cooler has an upper plate, a lower plate and a plurality of tubes and outer fins disposed therebetween. Each tube contains an inner offset fin, and the outer fins formed in a corrugated shape and each having one return louver on an intermediate portion between a top portion and a bottom portion of the outer fin. The outer fins is disposed between the tubes so that the tubes and the outer fins are arranged alternatively and stacked in a pile between the upper and lower plates. The tubes are formed to be flat tubes having a height-width ratio of the tube to be 4.8-7.4%.

    摘要翻译: 空气冷却油冷却器具有上板,下板和设置在它们之间的多个管和外部翅片。 每个管包括内部偏置翅片,并且外部翅片形成为波纹形状,并且每个具有在外部翅片的顶部和底部之间的中间部分上的一个返回百叶窗。 外翅片设置在管之间,使得管和外翅片交替布置并堆叠在上板和下板之间的堆中。 管形成为管的高度 - 宽度比为4.8-7.4%的扁平管。

    Defect-signal generating circuit and optical disk reproducing device having the same
    87.
    发明申请
    Defect-signal generating circuit and optical disk reproducing device having the same 失效
    缺陷信号发生电路和具有该缺陷信号产生电路的光盘再现装置

    公开(公告)号:US20050185550A1

    公开(公告)日:2005-08-25

    申请号:US11057339

    申请日:2005-02-11

    IPC分类号: G11B7/005 G11B20/10

    CPC分类号: G11B20/10203

    摘要: An optical disk reproducing device has a defect-signal generating circuit including a peak-holding-signal generating circuit for generating a peak-hold signal based on an RF signal read from a recording medium, an intermediate-signal generating circuit for generating an intermediate signal based on the peak-hold signal, a signal-level adjusting circuit for generating a threshold signal based on the intermediate signal, a threshold-signal adjusting circuit for adjusting the level of the threshold signal, and a comparator for generating a defect signal based on the peak-hold signal and threshold signal. The threshold-signal adjusting circuit includes at least one of: a first adjusting circuit for raising the threshold signal in the event the peak-hold signal falls below the threshold signal due to the peak-hold signal and the threshold signal being reversed; and a second adjusting circuit for lowering the threshold signal in the event the peak-hold signal exceeds the threshold signal, due to the reversal.

    摘要翻译: 光盘再现装置具有缺陷信号发生电路,该缺陷信号产生电路包括:峰值保持信号产生电路,用于根据从记录介质读取的RF信号产生峰值保持信号;产生中间信号的中间信号产生电路 基于所述峰值保持信号,生成基于所述中间信号的阈值信号的信号电平调整电路,用于调整所述阈值信号的电平的阈值信号调整电路,以及基于 峰值保持信号和阈值信号。 阈值信号调整电路包括以下至少一个:第一调整电路,用于在峰值保持信号由于峰值保持信号和阈值信号反相而在阈值信号下降的情况下提升阈值信号; 以及第二调整电路,用于在峰值保持信号超过阈值信号的情况下,由于反转而降低阈值信号。

    Field effect transistor having a MIS structure and method of fabricating the same
    88.
    发明授权
    Field effect transistor having a MIS structure and method of fabricating the same 有权
    具有MIS结构的场效应晶体管及其制造方法

    公开(公告)号:US06914312B2

    公开(公告)日:2005-07-05

    申请号:US10396416

    申请日:2003-03-26

    摘要: A MIS type field effect transistor including gate dielectrics having a rare-earth metal oxynitride layer with a high dielectric constant, which can maintain good interface characteristics, can be provided. A field effect transistor according to one aspect of this invention includes a gate dielectric having a substantially crystalline rare-earth metal oxynitride layer containing one or more metals selected from rare-earth metals, oxygen, and nitrogen. The rare-earth metal oxynitride layer contacts a predetermined region of a Si semiconductor substrate, and the nitrogen exists at the interface between the rare-earth metal oxynitride layer and the Si semiconductor substrate, and in the bulk of the rare-earth metal oxynitride. The transistor further includes a gate electrode formed on the gate dielectrics and source and drain regions, one being formed at one side of the gate electrode and the other being formed at the other side of the gate electrode in the Si semiconductor substrate.

    摘要翻译: 可以提供包括能够保持良好的界面特性的具有高介电常数的稀土金属氧氮化物层的栅极电介质的MIS型场效应晶体管。 根据本发明的一个方面的场效应晶体管包括具有基本上结晶的稀土金属氧氮化物层的栅极电介质,所述稀土金属氧氮化物层含有选自稀土金属,氧和氮的一种或多种金属。 稀土金属氮氧化物层与Si半导体衬底的预定区域接触,并且氮存在于稀土金属氧氮化物层和Si半导体衬底之间的界面处,并且在大部分稀土金属氧氮化物中。 晶体管还包括形成在栅极电介质和源极和漏极区上的栅极,一个形成在栅电极的一侧,另一个形成在Si半导体衬底中的栅电极的另一侧。

    Means for detecting the integrated value of current flow, a means for
detecting the value of current flow and a battery pack employing those
means
    89.
    发明授权
    Means for detecting the integrated value of current flow, a means for detecting the value of current flow and a battery pack employing those means 失效
    用于检测电流的积分值的装置,用于检测电流值的装置和使用这些装置的电池组

    公开(公告)号:US6157170A

    公开(公告)日:2000-12-05

    申请号:US275027

    申请日:1999-03-24

    IPC分类号: G01R31/36 H02J7/00

    CPC分类号: G01R31/361 G01R31/3648

    摘要: The present invention provides apparatus for detecting the integrated value of current flow, apparatus for detecting the value of current flow and a battery pack employing those apparatus each of which becomes insensitive to the offset in an operational amplifier. Each apparatus and the battery pack includes: a current sensor resistor inserted in series with a current path; an integrator; an input status selector; an integration capacitor connected to the integrator; and a connection-polarity inverter of the integration capacitor provided between the integrator and the integration capacitor. The input status selector switches alternately so as to provide two statuses of a status a and a status b at intervals of a predetermined time which are equal to one another, and in the status a, introduces therethrough the voltage which corresponds to the battery current value and which is developed across terminals of the current sensor resistor into an input of the integrator, while in the status b, inverts the polarity of the current sensor voltage developed across the terminals of the current sensor resistor to introduce therethrough the resultant voltage into the input of the integrator, or to introduce therethrough the voltage of zero to the input of the integrator.

    摘要翻译: 本发明提供了用于检测电流的积分值的装置,用于检测电流值的装置和使用对运算放大器的偏移不敏感的那些装置的电池组的装置。 每个装置和电池组包括:与电流路径串联插入的电流传感器电阻器; 集成商 输入状态选择器; 连接到积分器的积分电容器; 以及设置在积分器和积分电容器之间的积分电容器的连接极性反相器。 输入状态选择器交替地切换,以便以相互相等的预定时间的间隔提供状态a和状态b的两种状态,并且在状态a中引入对应于电池电流值的电压 并且其在电流传感器电阻器的端子上被开发成积分器的输入,而在状态b中,反转在电流传感器电阻器的端子两端产生的电流传感器电压的极性,从而将所得到的电压引入到输入端 或者将零电压引入积分器的输入端。

    Readback circuit for an optical information reading and recording
apparatus
    90.
    发明授权
    Readback circuit for an optical information reading and recording apparatus 失效
    用于光学信息读取和记录装置的回读电路

    公开(公告)号:US5675569A

    公开(公告)日:1997-10-07

    申请号:US567429

    申请日:1995-12-05

    摘要: A recorded signal reproduction circuit in an optical disc information reading and recording apparatus converts a recorded signal recovered from an optical disc to PR (1, 2, 1) characteristics through a equalizer circuit, digitizes it through an A/D converter and at the same time also generates a clock signal synchronized in phase with the equalizer circuit output signal by using a binary edcoder circuit and a PLL circuit. This clock signal is then provided to an A/D converter as the sampling clock. The A/D converter output signal is then decoded to the original channel bit stream based on the clock signal. Because the equalizer circuit output signal is provided to both the binary encoder/PLL circuit and the A/D converter together, additional circuity for converting signals into a binary series of pulses is unnecessary and reduction of circuit scale is possible. Moreover, in case of a change-over in the frequency characteristics of the equalizer circuit, due to a change in recording and reproduction frequency, the change-over will not affect the phase relationship between an input signal to the A/D converter and a sampling clock. In addition, it becomes simple to adjust this phase relation.

    摘要翻译: 光盘信息读取和记录装置中的记录信号再现电路通过均衡器电路将从光盘恢复的记录信号转换为PR(1,2,1)特性,通过A / D转换器将其数字化 时间还通过使用二进制编码器电路和PLL电路产生与均衡器电路输出信号同相的时钟信号。 该时钟信号随后作为采样时钟提供给A / D转换器。 然后,A / D转换器输出信号基于时钟信号被解码为原始通道位流。 由于均衡器电路输出信号同时提供给二进制编码器/ PLL电路和A / D转换器,所以用于将信号转换成二进制脉冲串的附加电路是不必要的,并且可以减小电路规模。 此外,在均衡器电路的频率特性的转换的情况下,由于记录和再现频率的变化,转换不会影响到A / D转换器的输入信号与A / D转换器之间的相位关系 采样时钟。 此外,调整该相位关系变得简单。