公开(公告)号：US20140329337A1

公开(公告)日：2014-11-06

申请号：US14333180

申请日：2014-07-16

申请人： Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Uday Shah ,  Kaan Oguz ,  Mark L. Doczy ,  Satyarth Suri ,  Clair Webb

发明人： Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Uday Shah ,  Kaan Oguz ,  Mark L. Doczy ,  Satyarth Suri ,  Clair Webb

IPC分类号： H01L43/12

CPC分类号： H01L43/12 ,  G11C11/161 ,  G11C11/1659 ,  H01L27/222 ,  H01L27/228 ,  H01L29/66007 ,  H01L29/82 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

摘要： Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are described. For example, a spin torque transfer memory (STTM) array includes a first load line disposed above a substrate and having only a first STTM device. The STTM array also includes a second load line disposed above the substrate, adjacent the first load line, and having only a second STTM device, the second STTM device non-co-planar with the first STTM device.

摘要翻译： 描述具有偏移单元的垂直自旋转移转矩存储器（STTM）器件和制造具有偏置单元的垂直STTM器件的方法。 例如，自旋转矩传递存储器（STTM）阵列包括设置在衬底上方并且仅具有第一STTM器件的第一负载线。 STTM阵列还包括设置在基板上方的第二负载线，与第一负载线相邻，并且仅具有第二STTM器件，与第一STTM器件非共面的第二STTM器件。

公开(公告)号：US10541014B2

公开(公告)日：2020-01-21

申请号：US15779029

申请日：2015-12-24

申请人： Brian S. Doyle ,  Elijah V. Karpov ,  Kaan Oguz ,  Kevin P. O'Brien ,  Charles C. Kuo ,  Mark L. Doczy ,  Uday Shah ,  Yih Wang

发明人： Brian S. Doyle ,  Elijah V. Karpov ,  Kaan Oguz ,  Kevin P. O'Brien ,  Charles C. Kuo ,  Mark L. Doczy ,  Uday Shah ,  Yih Wang

IPC分类号： G11C11/16 ,  H01L43/08 ,  G11C11/56 ,  H01L27/22

摘要： Memory cells with improved tunneling magnetoresistance ratio (TMR) are disclosed. In some embodiments such devices may include a magnetoresistive tunnel junction (MTJ) element coupled in series with a tunneling magnetoresistance enhancement element (TMRE). The MTJ element and TMRE may each be configured to transition between high and low resistance states, e.g., in response to a voltage. In some embodiments, the MTJ and TMRE are configure such that when a read voltage is applied to the cell while the MTJ is in its low resistance state the TMRE is driven to is low resistance state, and when such voltage is applied while the MTJ is in its high resistance state, the TMRE remains in its high resistance state. Devices and systems including such memory cells are also disclosed.

公开(公告)号：US20150333252A1

公开(公告)日：2015-11-19

申请号：US14812655

申请日：2015-07-29

申请人： Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Uday Shah ,  Kaan Oguz ,  Mark L. Doczy ,  Satyarth Suri ,  Clair Webb

发明人： Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Uday Shah ,  Kaan Oguz ,  Mark L. Doczy ,  Satyarth Suri ,  Clair Webb

IPC分类号： H01L43/02 ,  H01L43/08 ,  H01L27/22 ,  H01L43/10 ,  G11C11/16

CPC分类号： H01L43/12 ,  G11C11/161 ,  G11C11/1659 ,  H01L27/222 ,  H01L27/228 ,  H01L29/66007 ,  H01L29/82 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

摘要： Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are described. For example, a spin torque transfer memory (STTM) array includes a first load line disposed above a substrate and having only a first STTM device. The STTM array also includes a second load line disposed above the substrate, adjacent the first load line, and having only a second STTM device, the second STTM device non-co-planar with the first STTM device.

摘要翻译： 描述具有偏移单元的垂直自旋转移转矩存储器（STTM）器件和制造具有偏置单元的垂直STTM器件的方法。 例如，自旋转矩传递存储器（STTM）阵列包括设置在衬底上方并且仅具有第一STTM器件的第一负载线。 STTM阵列还包括设置在基板上方的第二负载线，与第一负载线相邻，并且仅具有第二STTM器件，与第一STTM器件非共面的第二STTM器件。

公开(公告)号：US09105839B2

公开(公告)日：2015-08-11

申请号：US14333180

申请日：2014-07-16

申请人： Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Uday Shah ,  Kaan Oguz ,  Mark L. Doczy ,  Satyarth Suri ,  Clair Webb

发明人： Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Uday Shah ,  Kaan Oguz ,  Mark L. Doczy ,  Satyarth Suri ,  Clair Webb

IPC分类号： H01L21/00 ,  H01L43/12 ,  H01L29/82 ,  H01L43/08 ,  H01L27/22

CPC分类号： H01L43/12 ,  G11C11/161 ,  G11C11/1659 ,  H01L27/222 ,  H01L27/228 ,  H01L29/66007 ,  H01L29/82 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

摘要： Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are described. For example, a spin torque transfer memory (STTM) array includes a first load line disposed above a substrate and having only a first STTM device. The STTM array also includes a second load line disposed above the substrate, adjacent the first load line, and having only a second STTM device, the second STTM device non-co-planar with the first STTM device.

摘要翻译： 描述具有偏移单元的垂直自旋转移转矩存储器（STTM）器件和制造具有偏置单元的垂直STTM器件的方法。 例如，自旋转矩传递存储器（STTM）阵列包括设置在衬底上方并且仅具有第一STTM器件的第一负载线。 STTM阵列还包括设置在基板上方的第二负载线，与第一负载线相邻，并且仅具有第二STTM器件，与第一STTM器件非共面的第二STTM器件。

公开(公告)号：US08786040B2

公开(公告)日：2014-07-22

申请号：US13723866

申请日：2012-12-21

申请人： Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Uday Shah ,  Kaan Oguz ,  Mark L. Doczy ,  Satyarth Suri ,  Clair Webb

发明人： Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Uday Shah ,  Kaan Oguz ,  Mark L. Doczy ,  Satyarth Suri ,  Clair Webb

IPC分类号： H01L27/22

CPC分类号： H01L43/12 ,  G11C11/161 ,  G11C11/1659 ,  H01L27/222 ,  H01L27/228 ,  H01L29/66007 ,  H01L29/82 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

摘要： Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are described. For example, a spin torque transfer memory (STTM) array includes a first load line disposed above a substrate and having only a first STTM device. The STTM array also includes a second load line disposed above the substrate, adjacent the first load line, and having only a second STTM device, the second STTM device non-co-planar with the first STTM device.

摘要翻译： 描述具有偏移单元的垂直自旋转移转矩存储器（STTM）器件和制造具有偏置单元的垂直STTM器件的方法。 例如，自旋转矩传递存储器（STTM）阵列包括设置在衬底上方并且仅具有第一STTM器件的第一负载线。 STTM阵列还包括设置在基板上方的第二负载线，与第一负载线相邻，并且仅具有第二STTM器件，与第一STTM器件非共面的第二STTM器件。

公开(公告)号：US20140175583A1

公开(公告)日：2014-06-26

申请号：US13723866

申请日：2012-12-21

申请人： Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Uday Shah ,  Kaan Oguz ,  Mark L. Doczy ,  Satyarth Suri ,  Clair Webb

发明人： Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Uday Shah ,  Kaan Oguz ,  Mark L. Doczy ,  Satyarth Suri ,  Clair Webb

IPC分类号： H01L29/82 ,  H01L29/66

CPC分类号： H01L43/12 ,  G11C11/161 ,  G11C11/1659 ,  H01L27/222 ,  H01L27/228 ,  H01L29/66007 ,  H01L29/82 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

摘要： Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are described. For example, a spin torque transfer memory (STTM) array includes a first load line disposed above a substrate and having only a first STTM device. The STTM array also includes a second load line disposed above the substrate, adjacent the first load line, and having only a second STTM device, the second STTM device non-co-planar with the first STTM device.

公开(公告)号：US20060183277A1

公开(公告)日：2006-08-17

申请号：US10742678

申请日：2003-12-19

申请人： Justin Brask ,  Mark Doczy ,  Jack Kavalieros ,  Uday Shah ,  Matthew Metz ,  Chris Barns ,  Suman Datta ,  Christopher Thomas ,  Robert Chau

发明人： Justin Brask ,  Mark Doczy ,  Jack Kavalieros ,  Uday Shah ,  Matthew Metz ,  Chris Barns ,  Suman Datta ,  Christopher Thomas ,  Robert Chau

IPC分类号： H01L21/8234 ,  H01L21/31

CPC分类号： H01L21/823857 ,  H01L21/28079 ,  H01L21/31691 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/51 ,  H01L29/66545

摘要： A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, and forming a sacrificial layer on the high-k gate dielectric layer. After etching the sacrificial layer, first and second spacers are formed on opposite sides of the sacrificial layer. After removing the sacrificial layer to generate a trench that is positioned between the first and second spacers, a metal layer is formed on the high-k gate dielectric layer.

摘要翻译： 描述制造半导体器件的方法。 该方法包括在衬底上形成高k栅极电介质层，并在高k栅极电介质层上形成牺牲层。 在蚀刻牺牲层之后，在牺牲层的相对侧上形成第一和第二间隔物。 在去除牺牲层以产生位于第一和第二间隔物之间​​的沟槽之后，在高k栅介质层上形成金属层。

公开(公告)号：US20060071275A1

公开(公告)日：2006-04-06

申请号：US10956279

申请日：2004-09-30

申请人： Justin Brask ,  Brian Doyle ,  Jack Kavalieros ,  Mark Doczy ,  Uday Shah ,  Robert Chau

发明人： Justin Brask ,  Brian Doyle ,  Jack Kavalieros ,  Mark Doczy ,  Uday Shah ,  Robert Chau

IPC分类号： H01L27/12

CPC分类号： H01L29/785 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/41791 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66795 ,  Y10S438/926 ,  Y10S438/974

摘要： A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of the semiconductor body. A gate electrode is then formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the first and second laterally opposite sidewalls of the semiconductor body. The gate electrode comprises a metal film formed directly adjacent to the gate dielectric layer. A pair of source and drain regions are then formed in the semiconductor body on opposite sides of the gate electrode.

公开(公告)号：US20060057808A1

公开(公告)日：2006-03-16

申请号：US10939227

申请日：2004-09-10

申请人： Robert Turkot ,  Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Uday Shah ,  Suman Datta ,  Robert Chau

发明人： Robert Turkot ,  Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Uday Shah ,  Suman Datta ,  Robert Chau

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/3205

CPC分类号： H01L21/28079 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/82345 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517

摘要： A metal layer is formed on a dielectric layer, which is formed on a substrate. After forming a masking layer on the metal layer, the exposed sides of the dielectric layer are covered with a polymer diffusion barrier.

摘要翻译： 在形成在基板上的电介质层上形成金属层。 在金属层上形成掩模层之后，介电层的暴露侧面被聚合物扩散阻挡层覆盖。

公开(公告)号：US20060051957A1

公开(公告)日：2006-03-09

申请号：US10936114

申请日：2004-09-07

申请人： Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Uday Shah ,  Brian Doyle ,  Robert Chau

发明人： Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Uday Shah ,  Brian Doyle ,  Robert Chau

IPC分类号： H01L21/4763

CPC分类号： H01L21/82385 ,  H01L21/28114 ,  H01L21/30608 ,  H01L21/823828 ,  H01L29/42376 ,  H01L29/66545 ,  Y10S438/926

摘要： A method for making a semiconductor device is described. That method comprises forming on a substrate a dielectric layer and a sacrificial structure that comprises a first layer and a second layer, such that the second layer is formed on the first layer and is wider than the first layer. After the sacrificial structure is removed to generate a trench, a metal gate electrode is formed within the trench.

摘要翻译： 描述制造半导体器件的方法。 该方法包括在衬底上形成介电层和包括第一层和第二层的牺牲结构，使得第二层形成在第一层上并且比第一层更宽。 在除去牺牲结构以产生沟槽之后，在沟槽内形成金属栅电极。