Clock synchronization NIC offload
    82.
    发明公开

    公开(公告)号:US20240146431A1

    公开(公告)日:2024-05-02

    申请号:US17973575

    申请日:2022-10-26

    CPC classification number: H04J3/0638

    Abstract: In one embodiment, a system includes a network interface controller including a device interface to connect to a processing device and receive a time synchronization marker message from an application running on the processing device, a network interface to send packets over a network, and packet processing circuitry to process the time synchronization marker message for sending via the network interface over the network to a slave clock device, generate a time synchronization follow-up message including a timestamp indicative of when the synchronization marker message egressed the network interface, and process the time synchronization follow-up message for sending via the network interface over the network to the slave clock device.

    Ad-hoc allocation of in-network compute-resources

    公开(公告)号:US11973694B1

    公开(公告)日:2024-04-30

    申请号:US18192688

    申请日:2023-03-30

    CPC classification number: H04L47/76 H04L47/829

    Abstract: In one embodiment, an in-network compute resource assignment system includes a network device to receive a request to select resources to perform a processing job, wherein the request includes at least one resource requirement of the processing job, and end point devices assigned to perform the processing job, a memory to store a state of in-network compute-resources indicating resource usage of the in-network compute-resources by other processing jobs, and a processor to manage the stored state, and responsively to receiving the request, selecting ones of the in-network compute-resources to perform the processing job based on: (a) a network topology of a network including the in-network compute-resources; (b) the state of the in-network compute-resources; and (c) the at least one resource requirement of the processing job.

    Out-of-order packet processing
    90.
    发明公开

    公开(公告)号:US20240098034A1

    公开(公告)日:2024-03-21

    申请号:US18524010

    申请日:2023-11-30

    CPC classification number: H04L47/34 H04L1/18

    Abstract: In one embodiment, a communication apparatus, including a network interface configured to receive over a network a sequence of data packets of a network flow having a defined packet order, wherein the network interface is configured to receive an out-of-order data packet instead of multiple missing data packets according to the defined packet order, a timer, and packet processing circuitry configured to activate the timer responsively to receiving the out-of-order data packet, and set the time period over which the timer is activated responsively to a quantity of the multiple missing data packets.

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