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81.发明授权公开(公告)号：US12117908B2
公开(公告)日：2024-10-15
申请号：US17111832
申请日：2020-12-04
Applicant: Intel Corporation
Inventor： Aravinda Prasad , Sreenivas Subramoney
IPC: G06F11/07 , G06F11/14 , G06F12/1009 , G06F12/1036 , G06F12/109
CPC classification number: G06F11/1471 , G06F12/1009 , G06F12/1036 , G06F12/109 , G06F2212/1032
Abstract: Systems, apparatuses and methods may provide for technology that associates a unique identifier with an application, creates an entry in a metadata table, wherein the metadata table is at a fixed location in persistent system memory, populates the entry with the unique identifier, a user identifier, and a pointer to a root of a page table tree, and recovers in-use data pages after a system crash. In one example, the in-use data pages are recovered from the persistent system memory based on the metadata table and include one or more of application heap information or application stack information.
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82.发明公开公开(公告)号：US20240323114A1
公开(公告)日：2024-09-26
申请号：US18678040
申请日：2024-05-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Anthony Michael Ford , Timothy J. Johnson , Abdulla M. Bataineh
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/28 , H04L69/40
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A data-driven intelligent networking system that can facilitate tracing of data flow packets is provided. The system add tracer packets to data flow packets arriving at an ingress point of the network. As the tracer packets progress through network in-band with the data flow packets, the system can copy, at each switch, trace data into pre-defined fields in the tracer packets. When the data flow packets arrive at an egress point of the network the system can separate the trace data from the data flow packet for analysis. Based on the analysis of the trace data, the system can adopt one or more policies to mitigate the impact of congestion on time-sensitive applications.
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公开(公告)号：US12079141B2
公开(公告)日：2024-09-03
申请号：US18170093
申请日：2023-02-16
Applicant: Red Hat, Inc.
Inventor： Gal Hammer , Marcel Apfelbaum
IPC: G06F12/00 , G06F9/455 , G06F12/06 , G06F12/1009 , G06F12/1036 , G06F12/1072
CPC classification number: G06F12/1036 , G06F9/45558 , G06F12/0646 , G06F12/1009 , G06F12/1072 , G06F2009/45583
Abstract: Disclosed is a method of managing memory of a virtual machine (VM), including providing a physical IOMMU device on a host, and performing a memory translation using the physical IOMMU device on the host.
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公开(公告)号：US20240259302A1
公开(公告)日：2024-08-01
申请号：US18631217
申请日：2024-04-10
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Edwin L. Froese
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/28 , H04L69/40
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: Systems and methods are provided for managing a data communication within a multi-level network having a plurality of switches organized as groups, with each group coupled to all other groups via global links, including: at each switch within the network, maintaining a global fault table identifying the links which lead only to faulty global paths, and when the data communication is received at a port of a switch, determine a destination for the data communication and, route the communication across the network using the global fault table to avoid selecting a port within the switch that would result in the communication arriving at a point in the network where its only path forward is across a global link that is faulty; wherein the global fault table is used for both a global minimal routing methodology and a global non-minimal routing methodology.
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公开(公告)号：US11989136B2
公开(公告)日：2024-05-21
申请号：US17483136
申请日：2021-09-23
Applicant: International Business Machines Corporation
Inventor： Mohit Karve , Brian W. Thompto
IPC: G06F12/1036 , G06F12/0882 , G06F12/1009 , G06F13/16
CPC classification number: G06F12/1036 , G06F12/0882 , G06F12/1009 , G06F13/1668 , G06F2212/7201
Abstract: An information handling system and method for translating virtual addresses to real addresses including a processor for processing data; memory devices for storing the data; and a memory controller configured to control accesses to the memory devices, where the processor is configured, in response to a request to translate a first virtual address to a second physical address, to send from the processor to the memory controller a page directory base and a plurality of memory offsets. The memory controller is configured to: read from the memory devices a first level page directory table using the page directory base and a first level memory offset; combine the first level page directory table with a second level memory offset; and read from the memory devices a second level page directory table using the first level page directory table and the second level memory offset.
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Patent Agency Ranking
公开(公告)号：US11968116B2
公开(公告)日：2024-04-23
申请号：US17594806
申请日：2020-03-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Jonathan P. Beecroft , Anthony Michael Ford
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , H04L69/28
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: Methods and systems are provided for performing lossy dropping and ECN marking in a flow-based network. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and perform per-flow packet dropping and ECN marking.
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87.发明公开公开(公告)号：US20240121182A1
公开(公告)日：2024-04-11
申请号：US18545808
申请日：2023-12-19
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Abdulla M. Bataineh , Thomas L. Court , Hess M. Hodge
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A network interface controller (NIC) capable of facilitating efficient memory address translation is provided. The NIC can be equipped with a host interface, a cache, and an address translation unit (ATU). During operation, the ATU can determine an operating mode. The operating mode can indicate whether the ATU is to perform a memory address translation at the NIC. The ATU can then determine whether a memory address indicated in the memory access request is available in the cache. If the memory address is not available in the cache, the ATU can perform an operation on the memory address based on the operating mode.
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88.发明公开公开(公告)号：US20240121179A1
公开(公告)日：2024-04-11
申请号：US18542412
申请日：2023-12-15
Applicant: Hewlett Packard Enterprise Development LP
Inventor： David Charles Hewson , Abdulla M. Bataineh , Thomas L. Court , Duncan Roweth
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A network interface controller (NIC) capable of facilitating fine-grain flow control (FGFC) is provided. The NIC can be equipped with a network interface, an FGFC logic block, and a traffic management logic block. During operation, the network interface can determine that a control frame from a switch is associated with FGFC. The network interface can then identify a data flow indicated in the control frame for applying the FGFC. The FGFC logic block can insert information from the control frame into an entry of a data structure stored in the NIC. The traffic management logic block can identify the entry in the data structure based on one or more fields of a packet belonging to the flow. Subsequently, the traffic management logic block can determine whether the packet is allowed to be forwarded based on the information in the entry.
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公开(公告)号：US11929919B2
公开(公告)日：2024-03-12
申请号：US17594798
申请日：2020-03-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Jonathan P. Beecroft , Robert Alverson , Edward J. Turner
IPC: H04L45/028 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/021 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/28 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , H04L69/28
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A switch equipped with a self-managing reduction engine is provided. During operation, the reduction engine can use a timeout mechanism to manage itself in different latency-induced or error scenarios. As a result, the network can facilitate an efficient and scalable environment for high performance computing.
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公开(公告)号：US11876701B2
公开(公告)日：2024-01-16
申请号：US17594627
申请日：2020-03-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Duncan Roweth , Andrew S. Kopser , Igor Gorodetsky , Laurence Scott Kaplan , Krishna Chaitanya Kandalla
IPC: H04L45/28 , H04L45/02 , H04L45/028 , H04L45/125 , H04L45/00 , H04L45/122 , H04L47/76 , H04L49/15 , H04L49/00 , H04L69/40 , H04L47/10 , H04L49/9005 , H04L47/34 , H04L67/1097 , G06F13/16 , H04L45/021 , H04L47/12 , G06F13/42 , H04L47/2441 , H04L47/30 , H04L47/62 , H04L47/24 , H04L49/90 , G06F13/38 , G06F13/40 , H04L45/745 , H04L47/2483 , H04L47/629 , H04L47/80 , H04L49/101 , H04L45/12 , H04L47/122 , G06F12/1036 , G06F15/173 , H04L43/10 , H04L45/42 , H04L47/11 , G06F12/0862 , G06F12/1045 , H04L47/32 , G06F9/54 , G06F13/14 , G06F9/50 , H04L47/22 , H04L47/52 , H04L47/6275 , H04L45/24 , H04L45/7453 , H04L45/16 , H04L69/22 , H04L47/762 , H04L47/78 , H04L47/20 , H04L49/9047 , H04L1/00 , H04L43/0876 , H04L47/2466 , H04L47/625 , H04L69/28
CPC classification number: H04L45/02 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/626 , H04L47/629 , H04L47/6235 , H04L47/6275 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A network interface controller (NIC) capable of efficient operation management for host accelerators is provided. The NIC can be equipped with a host interface and triggering logic block. During operation, the host interface can couple the NIC to a host device. The triggering logic block can obtain, via the host interface from the host device, an operation associated with an accelerator of the host device. The triggering logic block can determine whether a triggering condition has been satisfied for the operation based on an indicator received from the accelerator. If the triggering condition has been satisfied, the triggering logic block can obtain a piece of data generated from the accelerator from a memory location and execute the operation using the piece of data.
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