Nonvolatile semiconductor memory device and method of erasing and programming the same
    1.
    发明申请
    Nonvolatile semiconductor memory device and method of erasing and programming the same 有权
    非易失性半导体存储器件及其擦除和编程方法

    公开(公告)号:US20080239817A1

    公开(公告)日:2008-10-02

    申请号:US12078446

    申请日:2008-03-31

    CPC classification number: H01L29/4983 H01L21/28273 H01L29/42324 H01L29/7885

    Abstract: A nonvolatile semiconductor memory device includes a semiconductor substrate having a source, a drain, and a channel region between the source and the drain. The channel region has a first end portion near the drain, a second end portion near the source, and a middle portion between the first and second end portions. The first and second end portions having approximately same width. The memory device is electrically erased by using a hot carrier generated in the first end portion due to avalanche breakdown. The channel region includes a first channel extending from the drain and a second channel adjacent to the first channel. An impurity concentration of the second channel is higher than that of the first channel. An interface between the first and second channels is located in the middle portion between the first and second end portions.

    Abstract translation: 非易失性半导体存储器件包括在源极和漏极之间具有源极,漏极和沟道区域的半导体衬底。 沟道区域具有靠近漏极的第一端部,靠近源极的第二端部,以及第一和第二端部之间的中间部分。 第一和第二端部具有大致相同的宽度。 通过使用由于雪崩击穿而在第一端部中产生的热载体来电存储器件。 沟道区域包括从漏极延伸的第一通道和邻近第一通道的第二通道。 第二通道的杂质浓度高于第一通道的杂质浓度。 第一和第二通道之间的界面位于第一和第二端部之间的中间部分。

    Semiconductor device having first and second insulation separation regions
    2.
    发明申请
    Semiconductor device having first and second insulation separation regions 有权
    具有第一和第二绝缘分离区域的半导体器件

    公开(公告)号:US20060278950A1

    公开(公告)日:2006-12-14

    申请号:US11447021

    申请日:2006-06-06

    Applicant: Akira Tai

    Inventor: Akira Tai

    CPC classification number: H01L23/345 H01L21/76264 H01L2924/0002 H01L2924/00

    Abstract: A semiconductor device includes: a semiconductor substrate having a first surface and a second surface; a first insulation separation region disposed on the first surface of the semiconductor substrate; a second insulation separation region surrounded with the first insulation separation region and electrically isolated from the first insulation separation region; a semiconductor element disposed in the second insulation separation region; and an electrode connecting to the first insulation separation region for energizing and generating heat in the first insulation separation region. The first insulation separation region functions as a heater so that the semiconductor element in the second insulation separation region is locally heated.

    Abstract translation: 半导体器件包括:具有第一表面和第二表面的半导体衬底; 设置在所述半导体基板的第一表面上的第一绝缘分离区域; 第二绝缘分离区,被所述第一绝缘分离区包围并与所述第一绝缘分离区电绝缘; 设置在所述第二绝缘分离区域中的半导体元件; 以及连接到第一绝缘分离区域的电极,用于在第一绝缘分离区域中激发和产生热量。 第一绝缘分离区域用作加热器,使得第二绝缘分离区域中的半导体元件被局部加热。

    Semiconductor accelerometer with damperless structure
    4.
    发明授权
    Semiconductor accelerometer with damperless structure 失效
    具有无阻尼结构的半导体加速度计

    公开(公告)号:US5507182A

    公开(公告)日:1996-04-16

    申请号:US198052

    申请日:1994-02-18

    CPC classification number: G01P15/123 G01P1/003 G01P1/023

    Abstract: A semiconductor accelerometer which can satisfy the requirements of both the sensitivity and the fracture strength without any contrivance for providing viscous liquid and beam stopper material is provided. A casing comprises a stem and a shell. The casing houses an accelerometer chip. The silicon accelerometer chip is of double cantilever beam structure. Each beam is provided with piezo resistance layers. The motion of the beams due to the action of acceleration is converted into electrical signals. The resonant frequency of the beams of the accelerometer chip is above the resonant frequency of the casing itself, so that the acceleration components above this resonant frequency are damped by the casing and therefore most acceleration components in the resonant frequency of the beam are damped. As a result, the beams of the accelerometer chip can be protected from the impacts due to the dropping of the accelerometer, or the like.

    Abstract translation: 提供了能够满足灵敏度和断裂强度要求的半导体加速度计,而没有任何设计提供粘性液体和束塞材料。 壳体包括杆和壳。 外壳装有加速度计芯片。 硅加速度计芯片是双悬臂梁结构。 每个梁都设有压电电阻层。 由于加速度的作用,梁的运动被转换为电信号。 加速度计芯片的光束的谐振频率高于壳体本身的谐振频率,使得高于该谐振频率的加速度分量被壳体阻尼,因此波束的谐振频率中的大多数加速度分量被衰减。 结果,可以防止加速度计芯片的梁由于加速度计的掉落等而受到冲击。

    Semiconductor device having first and second insulation separation regions
    6.
    发明授权
    Semiconductor device having first and second insulation separation regions 有权
    具有第一和第二绝缘分离区域的半导体器件

    公开(公告)号:US07906829B2

    公开(公告)日:2011-03-15

    申请号:US11447021

    申请日:2006-06-06

    Applicant: Akira Tai

    Inventor: Akira Tai

    CPC classification number: H01L23/345 H01L21/76264 H01L2924/0002 H01L2924/00

    Abstract: A semiconductor device includes: a semiconductor substrate having a first surface and a second surface; a first insulation separation region disposed on the first surface of the semiconductor substrate; a second insulation separation region surrounded with the first insulation separation region and electrically isolated from the first insulation separation region; a semiconductor element disposed in the second insulation separation region; and an electrode connecting to the first insulation separation region for energizing and generating heat in the first insulation separation region. The first insulation separation region functions as a heater so that the semiconductor element in the second insulation separation region is locally heated.

    Abstract translation: 半导体器件包括:具有第一表面和第二表面的半导体衬底; 设置在所述半导体基板的第一表面上的第一绝缘分离区域; 第二绝缘分离区,被所述第一绝缘分离区包围并与所述第一绝缘分离区电绝缘; 设置在所述第二绝缘分离区域中的半导体元件; 以及连接到第一绝缘分离区域的电极,用于在第一绝缘分离区域中激发和产生热量。 第一绝缘分离区域用作加热器,使得第二绝缘分离区域中的半导体元件被局部加热。

    Fixing device with pulling rollers
    7.
    发明授权
    Fixing device with pulling rollers 失效
    固定装置与拉辊

    公开(公告)号:US5325164A

    公开(公告)日:1994-06-28

    申请号:US962986

    申请日:1992-10-16

    CPC classification number: G03G15/2064

    Abstract: In a device for fixing a toner image on a sheet in an image forming apparatus, a pair of pulling rollers is disposed downstream of a heating roller in the direction to convey the sheet and is rotated at a peripheral speed higher than that of the heating roller.

    Abstract translation: 在用于将图像形成装置中的片材上的调色剂图像定影的装置中,一对牵引辊设置在加热辊的下游,沿着输送片材的方向,并以比加热辊的圆周速度更高的圆周速度旋转 。

    Developing apparatus
    8.
    发明授权
    Developing apparatus 失效
    开发设备

    公开(公告)号:US4881103A

    公开(公告)日:1989-11-14

    申请号:US114867

    申请日:1987-10-30

    Abstract: This invention discloses a developing apparatus wherein a brush of a developing agent is formed on a developing sleeve by a magnetic field of a permanent magnet disposed inside the developing sleeve, and at least the developing sleeve is rotated while the brush is kept in contact with a photosensitive body, thereby developing an electrostatic latent image formed on the photosensitive body. In this apparatus, an agitating member having magnetic ring portions which abut against the developing sleeve and an agitating portion for agitating the developing agent is pivotally disposed in a developing vessel to be parallel to the developing sleeve, and a rotation detecting unit for outputting a signal corresponding to a rotational speed of the agitating member and a residual amount detecting unit for detecting a residual amount of the developing agent in the developing vessel in accordance with an output from the rotation detecting unit are provided.

    Abstract translation: 本发明公开了一种显影装置,其中通过设置在显影套筒内部的永磁体的磁场在显影套筒上形成显影剂刷,并且至少显影套筒旋转,同时刷子保持与一个 感光体,从而显影形成在感光体上的静电潜像。 在该装置中,具有与显影套筒抵接的磁环部分的搅拌部件和用于搅拌显影剂的搅拌部分可转动地设置在显影容器中以与显影套筒平行;旋转检测单元,用于输出信号 相应于搅拌构件的旋转速度和残留量检测单元,用于根据旋转检测单元的输出检测显影槽中的显影剂残留量。

    MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
    9.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 审中-公开
    半导体器件的制造方法

    公开(公告)号:US20110207264A1

    公开(公告)日:2011-08-25

    申请号:US12905395

    申请日:2010-10-15

    CPC classification number: H01L21/304 H01L29/66333 H01L2924/0002 H01L2924/00

    Abstract: A method of manufacturing a semiconductor device includes cutting a part of a resin insulating layer formed on a surface of a semiconductor substrate with a cutting tool. The cutting the part of the resin insulating layer includes cutting a portion of the resin insulating layer that has a surface on which a metal layer is disposed. The cutting the portion of the resin insulating layer is performed in such a manner that, in a stress distribution inside the resin insulating layer along an edge portion of the cutting tool and a peripheral portion of the edge portion, a width at 90% of a maximum value is not more than 1.3 μm.

    Abstract translation: 半导体器件的制造方法包括:利用切削工具切断形成在半导体基板的表面上的树脂绝缘层的一部分。 切割树脂绝缘层的一部分包括切割具有设置有金属层的表面的树脂绝缘层的一部分。 切割树脂绝缘层的部分是这样一种方式进行的:在树脂绝缘层沿着切削工具的边缘部分和边缘部分的周边部分的应力分布中,90%的宽度 最大值不大于1.3μm。

    Semiconductor device having SOI construction
    10.
    发明授权
    Semiconductor device having SOI construction 有权
    具有SOI结构的半导体器件

    公开(公告)号:US07105910B2

    公开(公告)日:2006-09-12

    申请号:US10994294

    申请日:2004-11-23

    Abstract: A semiconductor device includes: a semiconductor substrate including a first semiconductor layer, an insulation layer and a second semiconductor layer, which are laminated in this order; a trench penetrating both of the second semiconductor layer and the insulation layer and reaching the first semiconductor layer; and a third semiconductor layer. The trench has a ring shape on a principal surface of the substrate so that a part of the second semiconductor layer and a part of the insulation layer are surrounded with the trench. The third semiconductor layer is disposed in the trench through a first insulation film disposed on a sidewall of the trench so that the third semiconductor layer contacts the first semiconductor layer at a bottom of the trench.

    Abstract translation: 半导体器件包括:依次层叠的包括第一半导体层,绝缘层和第二半导体层的半导体衬底; 穿过所述第二半导体层和所述绝缘层的沟槽并到达所述第一半导体层的沟槽; 和第三半导体层。 沟槽在基板的主表面上具有环形形状,使得第二半导体层的一部分和绝缘层的一部分被沟槽包围。 第三半导体层通过布置在沟槽的侧壁上的第一绝缘膜设置在沟槽中,使得第三半导体层在沟槽的底部接触第一半导体层。

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