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8 条记录 (耗时 0.011 秒)

    Semiconductor interferometer
    2.
    发明授权
    Semiconductor interferometer 失效
    半导体干涉仪

    公开(公告)号：US4550330A

    公开(公告)日：1985-10-29

    申请号：US626499

    申请日：1984-06-29

    申请人： Alan B. Fowler

    发明人： Alan B. Fowler

    IPC分类号： H01L29/812 ,  H01L21/338 ,  H01L29/66 ,  H01L29/775 ,  H01L29/778 ,  H01L29/80 ,  H01L29/161

    CPC分类号： B82Y10/00 ,  H01L29/66977 ,  H01L29/775

    摘要： An interferometer is constructed by providing a bifurcated branch conductive path coplanar with a heterojunction in a semiconductor with a band discontinuity that produces a potential well so that electron wave conduction at the heterojunction can be locally influence with an electric field applied to one branch of the bifurcated path.

    摘要翻译： 通过在半导体中提供与异质结共面的分叉分支导电路径来构造干涉仪，所述分支导电路径具有产生势阱的带不连续性，使得异质结的电子波传导可以局部地受到施加到分叉的一个分支的电场的影响 路径。

    Tunnel emitter upper valley transistor
    3.
    发明授权
    Tunnel emitter upper valley transistor 失效
    隧道发射极上谷晶体管

    公开(公告)号：US4396931A

    公开(公告)日：1983-08-02

    申请号：US272874

    申请日：1981-06-12

    申请人： William P. Dumke ,  Alan B. Fowler

    发明人： William P. Dumke ,  Alan B. Fowler

    IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L29/205 ,  H01L29/267 ,  H01L29/68 ,  H01L29/76 ,  H01L29/72 ,  H01L27/26 ,  H01L29/88

    CPC分类号： H01L29/7606

    摘要： The invention is a three-terminal transistor structure having five layers of materials that in combination provide conduction by high mobility carrier transport across the base in an energy valley above the conduction band. The conduction is by majority carrier tunneling injection from the emitter and transport at an upper valley level across the base. The resulting structure is capable of switching in times of 10.sup.-12 seconds.

    摘要翻译： 本发明是具有五层材料的三端子晶体管结构，其通过在导带上方的能量谷中跨越基极的高迁移率载流子传输组合地提供导电。 导电是通过多数载流子从发射体注入并在较高的谷底电平穿过基底传输的。 所得到的结构能够切换10-12秒的时间。

    Voltage controlled resonant transmission semiconductor device
    4.
    发明授权
    Voltage controlled resonant transmission semiconductor device 失效
    压控谐振传输半导体器件

    公开(公告)号：US4672423A

    公开(公告)日：1987-06-09

    申请号：US801497

    申请日：1985-11-22

    申请人： Alan B. Fowler ,  Allan M. Hartstein

    发明人： Alan B. Fowler ,  Allan M. Hartstein

    IPC分类号： H01L29/66 ,  H01L29/78

    CPC分类号： B82Y10/00 ,  H01L29/66977

    摘要： In a transistor structure a buried gate positioned in the layer above a conduction channel and below a broad gate which overlaps the source and drain, when the voltages applied to the buried gate and the overlapping gate are varied independently, a potential well between two barriers can be established which permits conduction by the physical mechanism of resonant transmission. The potential well between two barriers required for the resonant transmission mechanism is achieved in one structure by a buried gate under an overlapping gate with both width and separation dimension control and in a second structure using split-buried gate under an overlapping gate that is embossed in the region of the split gate. With gate and separation dimensions of the order of 1000 .ANG. switching speeds of the order of 10.sup.-12 seconds are achieved.

    摘要翻译： 在晶体管结构中，当施加到掩埋栅极和重叠栅极的电压独立地变化时，位于导电沟道上方并且在与栅极和漏极重叠的宽栅极之下的层中的掩埋栅极，两个势垒之间的势阱可以 可以通过谐振传输的物理机制进行导通。 谐振传输机构所需的两个障碍之间的潜在井在一个结构中通过在具有宽度和间隔尺寸控制的重叠栅极下的掩埋栅极实现，并且在第二结构中使用在重叠栅极下方的分裂掩埋栅极被压印 分裂门的区域。 具有门极和分离尺寸为1000安培开关速度的量级为10-12秒。

    Self-aligned process for fabricating gallium arsenide metal-semiconductor field effect transistors
    5.
    发明授权
    Self-aligned process for fabricating gallium arsenide metal-semiconductor field effect transistors 失效
    用于制造砷化镓金属半导体场效应晶体管的自对准工艺

    公开(公告)号：US4389768A

    公开(公告)日：1983-06-28

    申请号：US255187

    申请日：1981-04-17

    申请人： Alan B. Fowler ,  Robert Rosenberg ,  Hans S. Rupprecht

    发明人： Alan B. Fowler ,  Robert Rosenberg ,  Hans S. Rupprecht

    IPC分类号： H01L29/80 ,  H01L21/033 ,  H01L21/225 ,  H01L21/338 ,  H01L29/417 ,  H01L29/78 ,  H01L29/812

    CPC分类号： H01L29/78 ,  H01L21/0337 ,  H01L21/2258 ,  H01L29/812

    摘要： A method for the fabrication of a gallium arsenide (GaAs) metal-semiconductor field effect transistor (MESFET) is described. The method requires the step of providing a semi-insulating GaAs substrate having thereon a layer of n doped GaAs and another layer of n+ doped Ga.sub.1-x Al.sub.x As, the latter being used as a diffusion source for n dopants in selectively doping the n GaAs layer underneath. The fabrication method further includes the step of employing highly directional reactive ion etching on silicon nitride to build insulating side walls thereby to effect the self-alignment of the gate of the MESFET with respect to its source and drain. GaAs MESFET fabricated using this method has its source and drain in close proximity having its gate therebetween. Utilizing the disclosed method, conventional photolithographic techniques can be employed to produce submicron self-aligned GaAs MESFETs.

    摘要翻译： 描述了制造砷化镓（GaAs）金属 - 半导体场效应晶体管（MESFET）的方法。 该方法需要提供半绝缘GaAs衬底，其上具有n个掺杂GaAs的层和另一层n +掺杂的Ga 1-x Al x As，后者被用作n掺杂剂在下面的n个GaAs层中选择性掺杂的扩散源 。 该制造方法还包括在氮化硅上采用高度定向的反应离子蚀刻来构建绝缘侧壁的步骤，从而相对于其源极和漏极实现MESFET的栅极的自对准。 使用该方法制造的GaAs MESFET的源极和漏极在其间具有栅极。 利用所公开的方法，可以采用常规光刻技术来产生亚微米自对准GaAs MESFET。