公开(公告)号：US20070197004A1

公开(公告)日：2007-08-23

申请号：US11643632

申请日：2006-12-20

申请人： Armin Dadgar ,  Alois Krost

发明人： Armin Dadgar ,  Alois Krost

IPC分类号： H01L21/20

CPC分类号： H01L33/007 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L33/0079 ,  H01L33/06 ,  H01L33/24 ,  H01L33/32

摘要： The invention relates to a process for the production of a layer structure of a nitride semiconductor component on a silicon surface, comprising the steps: provision of a substrate that has a silicon surface; deposition of an aluminium-containing nitride nucleation layer on the silicon surface of the substrate; optional: deposition of an aluminium-containing nitride buffer layer on the nitride nucleation layer; deposition of a masking layer on the nitride nucleation layer or, if present, on the first nitride buffer layer; deposition of a gallium-containing first nitride semiconductor layer on the masking layer, wherein the masking layer is deposited in such a way that, in the deposition step of the first nitride semiconductor layer, initially separate crystallites grow that coalesce above a coalescence layer thickness and occupy an average surface area of at least 0.16 μm2 in a layer plane of the coalesced nitride semiconductor layer that is perpendicular to the growth direction.

摘要翻译： 本发明涉及一种在硅表面上生产氮化物半导体元件的层结构的方法，包括以下步骤：提供具有硅表面的衬底; 在基板的硅表面上沉积含铝氮化物成核层; 任选的：在氮化物成核层上沉积含铝氮化物缓冲层; 掩模层在氮化物成核层上沉积，或者如果存在，则沉积在第一氮化物缓冲层上; 在掩蔽层上沉积含镓的第一氮化物半导体层，其中以这样的方式沉积掩模层，使得在第一氮化物半导体层的沉积步骤中，最初分离的微晶生长，聚结在聚结层厚度以上，并且 在与生长方向垂直的聚结的氮化物半导体层的层平面中占据至少0.16μm的平均表面积。

公开(公告)号：US20050022725A1

公开(公告)日：2005-02-03

申请号：US10872914

申请日：2004-06-21

申请人： Holger Jurgensen ,  Alois Krost ,  Armin Dadgar

发明人： Holger Jurgensen ,  Alois Krost ,  Armin Dadgar

IPC分类号： H01L21/205 ,  C30B25/02 ,  C30B25/18 ,  H01L21/20 ,  C30B28/12 ,  C30B23/00 ,  C30B25/00 ,  C30B28/14 ,  H01L21/44

CPC分类号： C30B25/02 ,  C30B25/18 ,  C30B29/40 ,  C30B29/403 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02538 ,  H01L21/02639 ,  H01L21/02647

摘要： This invention relates to a method for depositing III-V semiconductor layers on a non III-V substrate especially a sapphire, silicon or silicon oxide substrate, or another substrate containing silicon. According to said method, a III-V layer, especially a buffer layer, is deposited on the substrate or on a III-V germination layer, in a process chamber of a reactor containing gaseous starting materials. In order to reduce the defect density of the overgrowth, a masking layer consisting of essentially amorphous material is deposited directly on the III-V germination layer or directly on the substrate, said masking layer partially covering of approximately partially covering the germination layer. The masking layer can be a quasi-monolayer and can consist of various materials.

摘要翻译： 本发明涉及一种用于在非III-V衬底，特别是蓝宝石，硅或氧化硅衬底或含有硅的另一衬底上沉积III-V半导体层的方法。 根据所述方法，在含有气态原料的反应器的处理室中，将III-V层，特别是缓冲层沉积在衬底上或III-V发芽层上。 为了降低过度生长的缺陷密度，由III-V发芽层或直接在基底上直接沉积由基本无定形材料组成的掩蔽层，所述掩蔽层部分地覆盖大部分覆盖发芽层。 掩模层可以是准单层，并且可以由各种材料组成。

公开(公告)号：US20130256697A1

公开(公告)日：2013-10-03

申请号：US13993105

申请日：2011-12-23

申请人： Armin Dadgar ,  Alois Krost

发明人： Armin Dadgar ,  Alois Krost

IPC分类号： H01L29/20

CPC分类号： H01L29/2003 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02576

摘要： A group-III-nitride based layer sequence fabricated by means of an epitaxial process on a silicon substrate, the layer sequence comprising at least one doped first group-III-nitride layer (105) having a dopant concentration larger than 1×1018 cm−3, a second group-III-nitride layer (106) having a thickness of at least 50 nm and an n-type or p-type dopant concentration of less than 5×1018 cm−3, and an active region made of a group-III-nitride semiconductor material, wherein the first group-III-nitride layer comprises at least one n-type dopant selected from the group of elements formed by germanium, tin, lead, oxygen, sulphur, selenium and tellurium or a at least one p-type dopant, and wherein the active region has a volume density of either screw-type or edge type dislocations below 5×109 mm−3.

摘要翻译： 通过在硅衬底上的外延工艺制造的基于III族氮化物的层序列，所述层序列包括掺杂剂浓度大于1×1018cm -1的至少一个掺杂的第一III族氮化物层（105） 如图3所示，具有至少50nm的厚度和小于5×10 18 cm -3的n型或p型掺杂剂浓度的第二组III族氮化物层（106）和由组成的有源区 III族氮化物半导体材料，其中所述第一III族氮化物层包含选自由锗，锡，铅，氧，硫，硒和碲形成的元素组中的至少一种n型掺杂剂或至少一种 p型掺杂剂，并且其中活性区域具有低于5×109mm-3的螺旋型或边缘型位错的体积密度。

公开(公告)号：US20090199763A1

公开(公告)日：2009-08-13

申请号：US11665514

申请日：2005-10-17

申请人： Armin Dadgar ,  Alois Krost

发明人： Armin Dadgar ,  Alois Krost

IPC分类号： C30B23/06 ,  C23C16/02

CPC分类号： C30B23/00 ,  C30B23/02 ,  C30B29/403 ,  C30B29/406

摘要： The invention concerns a process and an apparatus for the production of gallium nitride or gallium aluminium nitride single crystals. It is essential for the process implementation according to the invention that the vaporisation of gallium or gallium and aluminium is effected at a temperature above the temperature of the growing crystal but at least at 1000° C. and that a gas flow comprising nitrogen gas, hydrogen gas, inert gas or a combination of said gases is passed over the surface of the metal melt in such a way that the gas flow over the surface of the metal melt prevents contact of the nitrogen precursor with the metal melt.

摘要翻译： 本发明涉及用于生产氮化镓或氮化镓镓单晶的方法和装置。 根据本发明的方法实施对于镓或镓和铝的蒸发在高于生长晶体的温度但至少在1000℃的温度下进行是重要的，并且包含氮气，氢气 气体，惰性气体或所述气体的组合通过金属熔体的表面，使得金属熔体表面上的气体流动防止氮前体与金属熔体接触。

公开(公告)号：US07128786B2

公开(公告)日：2006-10-31

申请号：US10872914

申请日：2004-06-21

申请人： Holger Jurgensen ,  Alois Krost ,  Armin Dadgar

发明人： Holger Jurgensen ,  Alois Krost ,  Armin Dadgar

IPC分类号： C30B25/04

CPC分类号： C30B25/02 ,  C30B25/18 ,  C30B29/40 ,  C30B29/403 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02538 ,  H01L21/02639 ,  H01L21/02647

摘要： This invention relates to a method for depositing III-V semiconductor layers on a non III-V substrate especially a sapphire, silicon or silicon oxide substrate, or another substrate containing silicon. According to said method, a III-V layer, especially a buffer layer, is deposited on the substrate or on a III-V germination layer, in a process chamber of a reactor containing gaseous starting materials. In order to reduce the defect density of the overgrowth, a masking layer consisting of essentially amorphous material is deposited directly on the III-V germination layer or directly on the substrate, said masking layer partially covering of approximately partially covering the germination layer. The masking layer can be a quasi-monolayer and can consist of various materials.

摘要翻译： 本发明涉及一种用于在非III-V衬底，特别是蓝宝石，硅或氧化硅衬底或含有硅的另一衬底上沉积III-V半导体层的方法。 根据所述方法，在含有气态原料的反应器的处理室中，将III-V层，特别是缓冲层沉积在衬底上或III-V发芽层上。 为了降低过度生长的缺陷密度，由III-V发芽层或直接在基底上直接沉积由基本无定形材料组成的掩蔽层，所述掩蔽层部分地覆盖大部分覆盖发芽层。 掩模层可以是准单层，并且可以由各种材料组成。

公开(公告)号：US07935987B2

公开(公告)日：2011-05-03

申请号：US11998464

申请日：2007-11-28

申请人： Fabian Schulze ,  Armin Dadgar ,  Alois Krost

发明人： Fabian Schulze ,  Armin Dadgar ,  Alois Krost

IPC分类号： H01L31/036

CPC分类号： H01L21/0262 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/8258

摘要： Group III nitride layers have a wide range of uses in electronics and optoelectronics. Such layers are generally grown on substrates such as sapphire, SiC and recently Si(111). For the purpose inter alia of integration with Si-CMOS electronics, growth on Si(001) is indicated, which is possible only with difficulty because of the different symmetries and is currently limited solely to misoriented Si(001) substrates, which restricts the range of use. In addition, the layer quality is not at present equal to that produced on Si(111) material. Growth on exactly oriented Si(001) and an improvement in material quality can now be simply achieved by a modification of the surface structure possible with a plurality of methods.

摘要翻译： III族氮化物层在电子和光电子学中的应用范围广泛。 这样的层通常在诸如蓝宝石，SiC和最近的Si（111）的衬底上生长。 为了特别是与Si-CMOS电子器件集成的目的，指出了在Si（001）上的生长，由于不同的对称性，其可能仅有困难，并且目前仅限于限制范围的取向错位的Si（001）衬底 的使用。 此外，层质量目前不等于在Si（111）材料上产生的质量。 现在可以通过使用多种方法改进表面结构来简单地实现精确取向的Si（001）的生长和材料质量的改善。

公开(公告)号：US07505150B2

公开(公告)日：2009-03-17

申请号：US11383004

申请日：2006-05-12

申请人： Thomas Zettler ,  Guenther Strassburger ,  Armin Dadgar ,  Alois Krost

发明人： Thomas Zettler ,  Guenther Strassburger ,  Armin Dadgar ,  Alois Krost

IPC分类号： G01B11/24 ,  G01B11/30

CPC分类号： G01B11/24

摘要： The invention relates to a device and a method for the measurement of the curvature of a surface (1), which is more exact and less expensive than prior art devices. The device comprises a light source (2) for the irradiation of a light beam (3) onto the surface (1), in which a birefingent element (4) is arranged between light source (2) and surface (1), in which furthermore a detector (5) is arranged for the detection of the partial beams (6,7), that are reflected from the surface (1), and at least one main axis (17) of the birefringent element (4) is positioned with respect to the light beam (3) of the light source (2) in such a way, that the light beam (3) of the light source (2) is split up into at least two parallel beams (6,7).

摘要翻译： 本发明涉及一种用于测量表面（1）的曲率的装置和方法，其比现有技术装置更精确和更便宜。 该装置包括用于在表面（1）上照射光束（3）的光源（2），其中双折射元件（4）布置在光源（2）和表面（1）之间，其中 此外，检测器（5）被布置用于检测从表面（1）反射的部分光束（6,7），并且双折射元件（4）的至少一个主轴线（17）与 相对于光源（2）的光束（3），光源（2）的光束（3）被分成至少两个平行光束（6,7）。

公开(公告)号：US20080150085A1

公开(公告)日：2008-06-26

申请号：US11959626

申请日：2007-12-19

申请人： Armin Dadgar ,  Alois Krost

发明人： Armin Dadgar ,  Alois Krost

IPC分类号： H01L29/20 ,  H01L21/205

CPC分类号： H01L29/207 ,  H01L21/02433 ,  H01L21/0254 ,  H01L21/02579 ,  H01L21/02609 ,  H01L21/02639 ,  H01L29/045 ,  H01L29/2003

摘要： Group III nitride layers which are grown with standard c-axis orientation have a maximum hole concentration by means of magnesium doping of around 5×1017 cm−3. This restriction of the doping results in a limitation of the possible component power. The object is to achieve a higher hole concentration and thus conductivity of the p-doped layer. This is made possible by the growth of higher index facets, which proceeds by roughening of the c-planar surface, structuring and subsequent preferentially lateral overgrowth with magnesium-doped group III nitride layers. Hole concentrations of over 5×1017 cm−3 on c-axis oriented GaN are possible

摘要翻译： 以标准c轴取向生长的III族氮化物层通过约5×10 17 cm -3的镁掺杂具有最大的空穴浓度。 这种掺杂的限制导致可能的组件功率的限制。 目的是实现更高的空穴浓度，从而实现p掺杂层的导电性。 这可以通过较高指数面的增长而实现，其通过c平面表面的粗糙化，结构化以及随后的优选侧向过度生长与掺杂镁的III族氮化物层而进行。 在c轴取向的GaN上的空穴浓度超过5×10 17 cm 3可能是可能的

公开(公告)号：US20070030493A1

公开(公告)日：2007-02-08

申请号：US11383004

申请日：2006-05-12

申请人： Thomas Zettler ,  Guenther Strassburger ,  Armin Dadgar ,  Alois Krost

发明人： Thomas Zettler ,  Guenther Strassburger ,  Armin Dadgar ,  Alois Krost

IPC分类号： G01B11/24

CPC分类号： G01B11/24

摘要： The invention relates to a device and a method for the measurement of the curvature of a surface (1). It is the object of the present invention to provide a device for the determination of the curvature of a surface (1), that is more exact and less expensive as the devices of the prior art. Therefore the device comprises a light source (2) for the irradiation of a light beam (3) onto the surface (1), in which a birefingent element (4) is arranged between light source (2) and surface (1), in which furthermore a detector (5) is arranged for the detection of the partial beams (6,7), that are reflected at the surface (1), and at least one main axis (17) of the birefringent element (4) is positioned with respect to the light beam (3) of the light source (2) in such a way, that the light beam (3) of the light source (2) is split up into at least two parallel beams (6,7), if necessary with the help of additional optical elements.

摘要翻译： 本发明涉及一种用于测量表面（1）的曲率的装置和方法。 本发明的目的是提供一种用于确定表面（1）的曲率的装置，其比现有技术的装置更精确和更便宜。 因此，该装置包括用于将光束（3）照射到表面（1）上的光源（2），其中双折射元件（4）布置在光源（2）和表面（1）之间，其中 此外，检测器（5）被布置用于检测在表面（1）处反射的部分光束（6,7），并且双折射元件（4）的至少一个主轴线（17）被定位 以这种方式相对于光源（2）的光束（3），光源（2）的光束（3）被分成至少两个平行光束（6,7）， 如有必要，借助附加的光学元件。

公开(公告)号：US20140001513A1

公开(公告)日：2014-01-02

申请号：US13824436

申请日：2011-08-31

申请人： Armin Dadgar ,  Alois Krost

发明人： Armin Dadgar ,  Alois Krost

IPC分类号： H01L29/06

CPC分类号： H01L29/0684 ,  H01L21/02381 ,  H01L21/2007

摘要： The invention relates to a layer system composed of a silicon-based carrier having a single-crystal surface and of a heterostructure applied directly to the single-crystal surface of the carrier. The layer system according to the invention is characterized in that the carrier comprises a silicon substrate doped with one or more dopants, wherein the doped portion extends across at least 30% of the thickness of the doped silicon substrate and a concentration of the dopants in the doped portion of the silicon substrate is predetermined such that a corrected limiting concentration GK meets the condition of formula (1): GK = ∑ m = i n   N dot i 1 + 5 × 10 22   cm - 3 N dot i   - E A i / 0.095   eV ≥ 1 × 10 15   cm - 3 ( 1 ) wherein i represents the respective dopant in the silicon substrate, Ndot represents the dopant concentration in cm−3 and EA represents an energy barrier of the dopant in eV, which energy barrier inhibits dislocation glide.

摘要翻译： 本发明涉及由具有单晶表面的硅基载体和直接施加到载体的单晶表面的异质结构构成的层系统。 根据本发明的层系统的特征在于，载体包括掺杂有一种或多种掺杂剂的硅衬底，其中掺杂部分延伸穿过掺杂硅衬底的厚度的至少30％，并且掺杂剂的浓度 硅衬底的掺杂部分是预定的，使得校正极限浓度GK满足公式（1）的条件：GK =Σm =在图N中i点+ 5×10 22立体cm -3 N点 其中i表示硅衬底中的相应掺杂剂，Ndot表示以cm-3表示的掺杂剂浓度，EA表示能量势垒， eV中的掺杂剂，其能量势垒抑制位错滑移。