公开(公告)号：US07326987B2

公开(公告)日：2008-02-05

申请号：US10908491

申请日：2005-05-13

申请人： Wagdi Abadeer ,  Eric Adler ,  Zhong-Xiang He ,  Bradley Orner ,  Vidhya Ramachandran ,  Barbara A. Waterhouse ,  Michael Zierak

发明人： Wagdi Abadeer ,  Eric Adler ,  Zhong-Xiang He ,  Bradley Orner ,  Vidhya Ramachandran ,  Barbara A. Waterhouse ,  Michael Zierak

IPC分类号： H01L27/108

CPC分类号： H01L28/57

摘要： The present invention relates to metal-insulator-metal (MIM) capacitors and field effect transistors (FETs) formed on a semiconductor substrate. The FETs are formed in Front End of Line (FEOL) levels below the MIM capacitors which are formed in upper Back End of Line (BEOL) levels. An insulator layer is selectively formed to encapsulate at least a top plate of the MIM capacitor to protect the MIM capacitor from damage due to process steps such as, for example, reactive ion etching. By selective formation of the insulator layer on the MIM capacitor, openings in the inter-level dielectric layers are provided so that hydrogen and/or deuterium diffusion to the FETs can occur.

摘要翻译： 本发明涉及形成在半导体衬底上的金属 - 绝缘体 - 金属（MIM）电容器和场效应晶体管（FET）。 FET形成在线路前端（FEOL）电平以下的MIM电容器下面，这些电容器形成在上部后端（BEOL）电平。 选择性地形成绝缘体层以封装MIM电容器的至少顶板，以保护MIM电容器免受由于诸如反应离子蚀刻等工艺步骤的损害。 通过在MIM电容器上选择性地形成绝缘体层，提供层间电介质层中的开口，使得可以发生氢和/或氘到FET的扩散。

公开(公告)号：US07056820B2

公开(公告)日：2006-06-06

申请号：US10707089

申请日：2003-11-20

申请人： Stephen P. Cole ,  William J. Murphy ,  Barbara A. Waterhouse

发明人： Stephen P. Cole ,  William J. Murphy ,  Barbara A. Waterhouse

IPC分类号： H01L21/4763

CPC分类号： H01L24/03 ,  H01L23/53223 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48799 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/01081 ,  H01L2224/48824 ,  H01L2924/00

摘要： A bond pad upon which a wirebond interconnection is formed, consisting of a first bond pad layer formed on a chip, and a second bond pad layer formed on the first bond pad layer, wherein the first bond pad layer is more resistant to removal than the second bond pad layer during probe testing, and the first bond pad layer increases resistance to interconnection failure during mechanical testing.

摘要翻译： 形成有引线键合的接合焊盘，由形成在芯片上的第一接合焊盘层和形成在第一接合焊盘层上的第二接合焊盘层组成，其中第一接合焊盘层比除 探针测试期间的第二接合焊盘层，并且第一接合焊盘层在机械测试期间增加了对互连故障的抵抗力。

公开(公告)号：US07754574B2

公开(公告)日：2010-07-13

申请号：US11551537

申请日：2006-10-20

申请人： Douglas D. Coolbaugh ,  Zhong-Xiang He ,  Wolfgang Sauter ,  Barbara A. Waterhouse

发明人： Douglas D. Coolbaugh ,  Zhong-Xiang He ,  Wolfgang Sauter ,  Barbara A. Waterhouse

IPC分类号： H01L21/44

CPC分类号： H01L24/05 ,  H01L23/5227 ,  H01L24/03 ,  H01L24/45 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2224/48824 ,  H01L2924/00 ,  H01L2224/48744

摘要： An RF structure that includes an optimum padset for wire bonding and a high performance inductor that contains relatively thick metal inductor wires, both of which are located atop the final interconnect level of an interconnect structure. Specifically, the RF structure includes a dielectric layer having metal inductor wires of a first thickness and a metal bond pad having a major area of a second thickness located on a surface thereof, wherein the first thickness is greater than the second thickness. In the inventive RF structure, the majority of the metal bond pad is thinned for wire bonding, while maintaining the full metal wire thickness in the other areas of the structure for inductor performance requirements, such as, for example, low resistivity. Methods for fabricating the aforementioned RF structure are also provided.

摘要翻译： RF结构包括用于引线键合的最佳焊盘和包含相对较厚的金属电感器导线的高性能电感器，两者都位于互连结构的最终互连级别的顶部。 具体地，RF结构包括具有第一厚度的金属电感器线和位于其表面上的具有第二厚度的主要面积的金属接合焊盘的电介质层，其中第一厚度大于第二厚度。 在本发明的RF结构中，大部分金属焊盘被减薄以进行引线接合，同时保持结构的其它区域中的全部金属线厚度用于电感器性能要求，例如低电阻率。 还提供了制造上述RF结构的方法。

公开(公告)号：US07170181B2

公开(公告)日：2007-01-30

申请号：US10707064

申请日：2003-11-19

申请人： Douglas D. Coolbaugh ,  Zhong-Xiang He ,  Wolfgang Sauter ,  Barbara A. Waterhouse

发明人： Douglas D. Coolbaugh ,  Zhong-Xiang He ,  Wolfgang Sauter ,  Barbara A. Waterhouse

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L23/5227 ,  H01L24/03 ,  H01L24/45 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2224/48824 ,  H01L2924/00 ,  H01L2224/48744

摘要： An RF structure that includes an optimum padset for wire bonding and a high performance inductor that contains relatively thick metal inductor wires, both of which are located atop the final interconnect level of an interconnect structure. Specifically, the RF structure includes a dielectric layer having metal inductor wires of a first thickness and a metal bond pad having a major area of a second thickness located on a surface thereof, wherein the first thickness is greater than the second thickness. In the inventive RF structure, the majority of the metal bond pad is thinned for wire bonding, while maintaining the full metal wire thickness in the other areas of the structure for inductor performance requirements, such as, for example, low resistivity. Methods for fabricating the aforementioned RF structure are also provided.

摘要翻译： RF结构包括用于引线键合的最佳焊盘和包含相对较厚的金属电感器导线的高性能电感器，两者都位于互连结构的最终互连级别的顶部。 具体地，RF结构包括具有第一厚度的金属电感器线和位于其表面上的具有第二厚度的主要面积的金属接合焊盘的电介质层，其中第一厚度大于第二厚度。 在本发明的RF结构中，大部分金属焊盘被减薄以进行引线接合，同时保持结构的其它区域中的全部金属线厚度用于电感器性能要求，例如低电阻率。 还提供了制造上述RF结构的方法。

公开(公告)号：US20080132026A1

公开(公告)日：2008-06-05

申请号：US11551537

申请日：2006-10-20

申请人： Douglas D. Coolbaugh ,  Zhong-Xiang He ,  Wolfgang Sauter ,  Barbara A. Waterhouse

发明人： Douglas D. Coolbaugh ,  Zhong-Xiang He ,  Wolfgang Sauter ,  Barbara A. Waterhouse

IPC分类号： H01L21/02

CPC分类号： H01L24/05 ,  H01L23/5227 ,  H01L24/03 ,  H01L24/45 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2224/48824 ,  H01L2924/00 ,  H01L2224/48744

摘要： An RF structure that includes an optimum padset for wire bonding and a high performance inductor that contains relatively thick metal inductor wires, both of which are located atop the final interconnect level of an interconnect structure. Specifically, the RF structure includes a dielectric layer having metal inductor wires of a first thickness and a metal bond pad having a major area of a second thickness located on a surface thereof, wherein the first thickness is greater than the second thickness. In the inventive RF structure, the majority of the metal bond pad is thinned for wire bonding, while maintaining the fill metal wire thickness in the other areas of the structure for inductor performance requirements, such as, for example, low resistivity. Methods for fabricating the aforementioned RF structure are also provided.

摘要翻译： RF结构包括用于引线键合的最佳焊盘和包含相对较厚的金属电感器导线的高性能电感器，两者都位于互连结构的最终互连级别的顶部。 具体地，RF结构包括具有第一厚度的金属电感器线和位于其表面上的具有第二厚度的主要面积的金属接合焊盘的电介质层，其中第一厚度大于第二厚度。 在本发明的RF结构中，大部分金属焊盘被薄化以进行引线接合，同时保持结构的其它区域中的填充金属线厚度用于电感器性能要求，例如低电阻率。 还提供了制造上述RF结构的方法。

公开(公告)号：US06913965B2

公开(公告)日：2005-07-05

申请号：US10709133

申请日：2004-04-15

申请人： Wagdi W. Abadeer ,  Eric Adler ,  Zhong-Xiang He ,  Bradley Orner ,  Vidhya Ramachandran ,  Barbara A. Waterhouse ,  Michael Zierak

发明人： Wagdi W. Abadeer ,  Eric Adler ,  Zhong-Xiang He ,  Bradley Orner ,  Vidhya Ramachandran ,  Barbara A. Waterhouse ,  Michael Zierak

IPC分类号： H01L21/02 ,  H01L21/8242

CPC分类号： H01L28/57

摘要： The present invention relates to metal-insulator-metal (MIM) capacitors and field effect transistors (FETs) formed on a semiconductor substrate. The FETs are formed in Front End of Line (FEOL) levels below the MIM capacitors which are formed in upper Back End of Line (BEOL) levels. An insulator layer is selectively formed to encapsulate at least a top plate of the MIM capacitor to protect the MIM capacitor from damage due to process steps such as, for example, reactive ion etching. By selective formation of the insulator layer on the MIM capacitor, openings in the inter-level dielectric layers are provided so that hydrogen and/or deuterium diffusion to the FETs can occur.

摘要翻译： 本发明涉及形成在半导体衬底上的金属 - 绝缘体 - 金属（MIM）电容器和场效应晶体管（FET）。 FET形成在线路前端（FEOL）电平以下的MIM电容器下面，这些电容器形成在上部后端（BEOL）电平。 选择性地形成绝缘体层以封装MIM电容器的至少顶板，以保护MIM电容器免受由于诸如反应离子蚀刻等工艺步骤的损害。 通过在MIM电容器上选择性地形成绝缘体层，提供层间电介质层中的开口，使得可以发生氢和/或氘到FET的扩散。