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    Method of manufacturing semiconductor device using salicide process
    1.
    发明授权
    Method of manufacturing semiconductor device using salicide process 失效
    使用自对准硅胶工艺制造半导体器件的方法

    公开(公告)号：US07795086B2

    公开(公告)日：2010-09-14

    申请号：US12346011

    申请日：2008-12-30

    申请人： Young Jin Lee ,  Dong Sun Sheen ,  Seok Pyo Song ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

    发明人： Young Jin Lee ,  Dong Sun Sheen ,  Seok Pyo Song ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823814 ,  H01L21/823425 ,  H01L21/823835

    摘要： A method for manufacturing a semiconductor device using a salicide process, which includes forming a gate dielectric layer over a silicon substrate including a PMOS region and an NMOS region; forming a first silicon pattern in the NMOS region and a second silicon pattern in the PMOS region; forming a first metal layer that is in contact with the first silicon pattern and the exposed first portion of the silicon substrate; and forming a first gate, a first junction, a second gate, and a second junction by performing a heat treatment to silicify the respective first and second silicon patterns and the silicon substrate.

    摘要翻译： 一种使用自对准硅化物工艺制造半导体器件的方法，包括在包括PMOS区域和NMOS区域的硅衬底上形成栅极电介质层; 在所述NMOS区域中形成第一硅图案和在所述PMOS区域中形成第二硅图案; 形成与所述第一硅图案和所述暴露的所述硅衬底的第一部分接触的第一金属层; 以及通过进行热处理以使相应的第一和第二硅图案和硅衬底硅化而形成第一栅极，第一结，第二栅极和第二结。

    Method for cleaning a semiconductor device
    2.
    发明授权
    Method for cleaning a semiconductor device 失效
    清洗半导体器件的方法

    公开(公告)号：US06840249B2

    公开(公告)日：2005-01-11

    申请号：US10328028

    申请日：2002-12-26

    申请人： Bo Min Seo

    发明人： Bo Min Seo

    IPC分类号： H01L21/28 ,  H01L21/302 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  B08B7/00

    CPC分类号： H01L21/02063 ,  H01L21/02046 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/76802 ,  Y10S438/906

    摘要： In order to clean a semiconductor device having a dielectric layer deposited on a top surface of a lower metal wiring of the semiconductor device, and a contact hole or a via hole formed in the dielectric layer to expose the lower metal line therethrough, the semiconductor device is located within a radio frequency (RF) cleaning chamber. A gas mixture of HCl and H2O is introduced into the RF cleaning chamber and Ar gas plasma is generated in the RF cleaning chamber to excite HCl gas so that the HCl gas and an excited HCl gas are used to remove carbon radicals and metal particles.

    摘要翻译： 为了清洁具有沉积在半导体器件的下金属布线的顶表面上的电介质层的半导体器件，以及形成在电介质层中的接触孔或通孔，以暴露下部金属线，半导体器件 位于射频（RF）清洁室内。 将HCl和H 2 O的气体混合物引入到RF清洗室中，并且在RF清洁室中产生Ar气体等离子体以激发HCl气体，使得HCl气体和被激发的HCl气体用于除去碳自由基和金属颗粒。

    Method of Manufacturing Semiconductor Device using Salicide Process
    4.
    发明申请
    Method of Manufacturing Semiconductor Device using Salicide Process 失效
    使用杀菌剂工艺制造半导体器件的方法

    公开(公告)号：US20090186456A1

    公开(公告)日：2009-07-23

    申请号：US12346011

    申请日：2008-12-30

    申请人： Young Jin Lee ,  Dong Sun Sheen ,  Seok Pyo Song ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

    发明人： Young Jin Lee ,  Dong Sun Sheen ,  Seok Pyo Song ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823814 ,  H01L21/823425 ,  H01L21/823835

    摘要： A method for manufacturing a semiconductor device using a salicide process, which includes forming a gate dielectric layer over a silicon substrate including a PMOS region and an NMOS region; forming a first silicon pattern in the NMOS region and a second silicon pattern in the PMOS region; forming a first metal layer that is in contact with the first silicon pattern and the exposed first portion of the silicon substrate; and forming a first gate, a first junction, a second gate, and a second junction by performing a heat treatment to silicify the respective first and second silicon patterns and the silicon substrate.

    摘要翻译： 一种使用自对准硅化物工艺制造半导体器件的方法，包括在包括PMOS区域和NMOS区域的硅衬底上形成栅极电介质层; 在所述NMOS区域中形成第一硅图案和在所述PMOS区域中形成第二硅图案; 形成与所述第一硅图案和所述暴露的所述硅衬底的第一部分接触的第一金属层; 以及通过进行热处理以使相应的第一和第二硅图案和硅衬底硅化而形成第一栅极，第一结，第二栅极和第二结。

    Method of forming a contact in a semiconductor device utilizing a plasma treatment
    5.
    发明授权
    Method of forming a contact in a semiconductor device utilizing a plasma treatment 失效
    利用等离子体处理在半导体器件中形成接点的方法

    公开(公告)号：US06911382B2

    公开(公告)日：2005-06-28

    申请号：US10721978

    申请日：2003-11-25

    申请人： Byung Hyun Jung ,  Bo Min Seo

    发明人： Byung Hyun Jung ,  Bo Min Seo

    IPC分类号： H01L21/28 ,  H01L21/425 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/768

    CPC分类号： H01L21/76802 ,  H01L21/76831

    摘要： Semiconductor devices and methods to form a contact of a semiconductor device are disclosed. An example method to form a contact includes forming an insulating layer on a substrate; etching the insulating layer to form a contact hole; depositing a silicon layer on sidewalls and an undersurface of the contact hole; forming a silicon spacer on the sidewalls of the contact hole by etching the silicon layer; transforming the silicon spacer to a silicon nitride spacer; depositing a diffusion barrier on the silicon nitride spacer; and filling the contact hole with tungsten. Because the silicon nitride spacer formed on the sidewalls of the contact hole can serve as a leakage current blocking layer, the yield and the reliability of the semiconductor devices manufactured by this example process are enhanced.

    摘要翻译： 公开了形成半导体器件的接触的半导体器件和方法。 形成接触的示例性方法包括在基板上形成绝缘层; 蚀刻绝缘层以形成接触孔; 在接触孔的侧壁和下表面上沉积硅层; 通过蚀刻硅层在接触孔的侧壁上形成硅间隔物; 将硅衬垫转换成氮化硅间隔物; 在氮化硅间隔物上沉积扩散阻挡层; 并用钨填充接触孔。 由于形成在接触孔的侧壁上的氮化硅间隔物可以用作漏电流阻挡层，所以通过该示例性工艺制造的半导体器件的产率和可靠性得到提高。

    Method of fabricating a non-volatile memory device
    8.
    发明授权
    Method of fabricating a non-volatile memory device 失效
    制造非易失性存储器件的方法

    公开(公告)号：US07585730B1

    公开(公告)日：2009-09-08

    申请号：US12164721

    申请日：2008-06-30

    申请人： Seok Pyo Song ,  Dong Sun Sheen ,  Young Jin Lee ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

    发明人： Seok Pyo Song ,  Dong Sun Sheen ,  Young Jin Lee ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

    IPC分类号： H01L21/8247

    CPC分类号： H01L29/7881 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

    摘要： A method of fabricating a non-volatile memory device includes forming a tunneling layer and a conductive layer on a semiconductor substrate, and patterning the conductive layer, the tunneling layer, and the semiconductor substrate to form a conductive pattern, a tunneling pattern, and a trench in the semiconductor substrate. The method also includes filling the trench with a insulating material, and exposing a partial sidewall of the conductive pattern. The method further includes recessing the exposed partial sidewall of the conductive pattern in an inward direction to form a floating gate. The floating gate includes a base portion and a protruding portion having a width smaller than that of the base portion. The method also includes etching the insulating layer to form an isolation layer that exposes the base portion of the floating gate. Still further, the method includes forming a dielectric layer, that extends along the base and protruding portions of the floating gate, and a control gate that covers the base and protruding portions of the floating gate.

    摘要翻译： 一种制造非易失性存储器件的方法包括在半导体衬底上形成隧道层和导电层，并且对导电层，隧道层和半导体衬底进行构图以形成导电图案，隧道图案和 沟槽在半导体衬底中。 该方法还包括用绝缘材料填充沟槽，以及暴露导电图案的部分侧壁。 该方法还包括将导电图案的暴露部分侧壁向内凹入以形成浮动栅极。 浮动门包括基部和具有小于基部的宽度的突出部分。 该方法还包括蚀刻绝缘层以形成暴露浮动栅极的基部的隔离层。 此外，该方法包括形成沿着基极延伸的电介质层和浮动栅极的突出部分，以及覆盖浮动栅极的基部和突出部分的控制栅极。