公开(公告)号：US08471616B2

公开(公告)日：2013-06-25

申请号：US13533001

申请日：2012-06-26

申请人： Young-wook Kim ,  Soon-bok Jang ,  Jong-uk Song ,  Hwa-seok Oh ,  Sung-ha Kim

发明人： Young-wook Kim ,  Soon-bok Jang ,  Jong-uk Song ,  Hwa-seok Oh ,  Sung-ha Kim

IPC分类号： H03L7/06

CPC分类号： H03K5/1565

摘要： A duty ratio correction circuit for correcting a duty ratio of a clock signal. The duty ratio correction circuit includes an asymmetry buffer that receives a clock signal and adjusts a duty ratio of the clock signal in response to control signals; a clock generating circuit that is connected to the asymmetry buffer and detects the duty ratio of the clock signal; and a controller that generates the control signals according to the duty ratio of the clock signal. An operation of the controller is recorded as a program on a computer-readable recording medium.

摘要翻译： 一种用于校正时钟信号的占空比的占空比校正电路。 占空比校正电路包括不对称缓冲器，其接收时钟信号并根据控制信号调整时钟信号的占空比; 时钟发生电路，连接到不对称缓冲器并检测时钟信号的占空比; 以及根据时钟信号的占空比产生控制信号的控制器。 将控制器的操作作为程序记录在计算机可读记录介质上。

公开(公告)号：US09443599B2

公开(公告)日：2016-09-13

申请号：US14679046

申请日：2015-04-06

申请人： Hyun-Ju Yi ,  Seok-Won Ahn ,  Hwa-Seok Oh

发明人： Hyun-Ju Yi ,  Seok-Won Ahn ,  Hwa-Seok Oh

IPC分类号： G11C16/04 ,  G11C16/16 ,  G06F13/16 ,  G11C16/32

CPC分类号： G11C16/16 ,  G06F13/161 ,  G11C16/32 ,  G11C2216/20

摘要： A non-volatile memory and a method of controlling an erase operation of the non-volatile memory using a controller are provided. The method of controlling the erase operation includes beginning performance of the erase operation, monitoring a next command to be performed in the non-volatile memory while performing the erase operation, determining an erase status, and continuing, suspending or canceling the erase operation based on the determination result of the erase status.

摘要翻译： 提供一种使用控制器来控制非易失性存储器的擦除操作的非易失性存储器和方法。 控制擦除操作的方法包括开始执行擦除操作，监视在执行擦除操作期间在非易失性存储器中执行的下一个命令，确定擦除状态，以及继续，暂停或取消擦除操作，基于 擦除状态的确定结果。

公开(公告)号：US20130015897A1

公开(公告)日：2013-01-17

申请号：US13533001

申请日：2012-06-26

申请人： Young-wook KIM ,  Soon-bok JANG ,  Jong-uk SONG ,  Hwa-seok OH ,  Sung-ha KIM

发明人： Young-wook KIM ,  Soon-bok JANG ,  Jong-uk SONG ,  Hwa-seok OH ,  Sung-ha KIM

IPC分类号： H03K3/017 ,  H03L7/08

CPC分类号： H03K5/1565

摘要： A duty ratio correction circuit for correcting a duty ratio of a clock signal. The duty ratio correction circuit includes an asymmetry buffer that receives a clock signal and adjusts a duty ratio of the clock signal in response to control signals; a clock generating circuit that i s connected to the asymmetry buffer and detects the duty ratio of the clock signal; and a controller that generates the control signals according to the duty ratio of the clock signal. An operation of the controller is recorded as a program on a computer-readable recording medium.

摘要翻译： 一种用于校正时钟信号的占空比的占空比校正电路。 占空比校正电路包括不对称缓冲器，其接收时钟信号并根据控制信号调整时钟信号的占空比; 时钟发生电路，其连接到不对称缓冲器并检测时钟信号的占空比; 以及根据时钟信号的占空比产生控制信号的控制器。 将控制器的操作作为程序记录在计算机可读记录介质上。

公开(公告)号：US20120072809A1

公开(公告)日：2012-03-22

申请号：US13234130

申请日：2011-09-15

申请人： Jae Phil Kong ,  Hwa Seok Oh ,  Dong Kim

发明人： Jae Phil Kong ,  Hwa Seok Oh ,  Dong Kim

IPC分类号： H03M13/07 ,  H03M13/15 ,  G06F11/10

CPC分类号： G06F11/1008 ,  G06F11/108 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/1545 ,  H03M13/6502

摘要： A decoder, a method of decoding and systems implementing the same are disclosed. In one example, the method includes calculating syndrome values from input codewords, generating an error location polynomial about the codewords using the syndrome values, determining an error count in the codewords using the error location polynomial, and adjusting power consumption of a circuit in response to the determined error count in the codewords. In one example, a frequency of a clock signal to be provided to a search circuit may be determined based on the error count, and the clock signal may be provided having the determined frequency to a search circuit, such as a Chien search circuit.

摘要翻译： 公开了解码器，解码方法及其实现方法。 在一个示例中，该方法包括从输入码字计算校正子值，使用校正子值生成关于码字的误差位置多项式，使用误差位置多项式确定码字中的误差计数，以及响应于 在码字中确定的错误计数。 在一个示例中，可以基于错误计数来确定要提供给搜索电路的时钟信号的频率，并且可以向诸如Chien搜索电路的搜索电路提供具有确定的频率的时钟信号。

公开(公告)号：US09898423B2

公开(公告)日：2018-02-20

申请号：US14685619

申请日：2015-04-14

申请人： Jung-Pil Lee ,  Hwa-Seok Oh ,  Kyung-Phil Yoo ,  Myung-Sub Shin

发明人： Jung-Pil Lee ,  Hwa-Seok Oh ,  Kyung-Phil Yoo ,  Myung-Sub Shin

IPC分类号： G06F3/06 ,  G06F12/02 ,  G06F9/30 ,  G06F13/16 ,  G06F12/1009 ,  G06F9/54

CPC分类号： G06F13/16 ,  G06F3/0619 ,  G06F3/0655 ,  G06F3/0659 ,  G06F3/0688 ,  G06F9/3004 ,  G06F9/54 ,  G06F12/02 ,  G06F12/1009

摘要： A memory swapping method and a data processing system using the same, the memory swapping method including receiving queue information for a memory swapping task from a host device; performing part of the memory swapping task in a storage device based on the queue information; receiving a command corresponding to the queue information from the host device after performing of the part of the memory swapping task is completed; and performing a remaining part of the memory swapping task according to the command by using a result of the part of the memory swapping task that had been previously performed.

公开(公告)号：US20150331628A1

公开(公告)日：2015-11-19

申请号：US14685619

申请日：2015-04-14

申请人： JUNG-PIL LEE ,  HWA-SEOK OH ,  KYUNG-PHIL YOO ,  MYUNG-SUB SHIN

发明人： JUNG-PIL LEE ,  HWA-SEOK OH ,  KYUNG-PHIL YOO ,  MYUNG-SUB SHIN

IPC分类号： G06F3/06

CPC分类号： G06F13/16 ,  G06F3/0619 ,  G06F3/0655 ,  G06F3/0659 ,  G06F3/0688 ,  G06F9/3004 ,  G06F9/54 ,  G06F12/02 ,  G06F12/1009

摘要： A memory swapping method and a data processing system using the same, the memory swapping method including receiving queue information for a memory swapping task from a host device; performing part of the memory swapping task in a storage device based on the queue information; receiving a command corresponding to the queue information from the host device after performing of the part of the memory swapping task is completed; and performing a remaining part of the memory swapping task according to the command by using a result of the part of the memory swapping task that had been previously performed.

摘要翻译： 一种存储器交换方法和使用其的数据处理系统，所述存储器交换方法包括从主机设备接收用于存储器交换任务的队列信息; 基于队列信息在存储设备中执行部分内存交换任务; 在执行部分存储器交换任务之后，从主机装置接收与该队列信息对应的命令完成; 以及通过使用先前执行的部分内存交换任务的结果，根据该命令执行存储器交换任务的剩余部分。

公开(公告)号：US20150287468A1

公开(公告)日：2015-10-08

申请号：US14679046

申请日：2015-04-06

申请人： HYUN-JU YI ,  SEOK-WON AHN ,  HWA-SEOK OH

发明人： HYUN-JU YI ,  SEOK-WON AHN ,  HWA-SEOK OH

IPC分类号： G11C16/14 ,  G11C16/32

CPC分类号： G11C16/16 ,  G06F13/161 ,  G11C16/32 ,  G11C2216/20

摘要： A non-volatile memory and a method of controlling an erase operation of the non-volatile memory using a controller are provided. The method of controlling the erase operation includes beginning performance of the erase operation, monitoring a next command to be performed in the non-volatile memory while performing the erase operation, determining an erase status, and continuing, suspending or canceling the erase operation based on the determination result of the erase status.

摘要翻译： 提供一种使用控制器来控制非易失性存储器的擦除操作的非易失性存储器和方法。 控制擦除操作的方法包括开始执行擦除操作，监视在执行擦除操作期间在非易失性存储器中执行的下一个命令，确定擦除状态，以及继续，暂停或取消擦除操作，基于 擦除状态的确定结果。

公开(公告)号：US20140082405A1

公开(公告)日：2014-03-20

申请号：US14025879

申请日：2013-09-13

申请人： JUNG PIL LEE ,  JIN HYEOK CHOI ,  HWA SEOK OH ,  YOUNG-GYU KANG ,  SUNG HO SEO ,  MYUNG SUB SHIN ,  KYUNG PHIL YOO

发明人： JUNG PIL LEE ,  JIN HYEOK CHOI ,  HWA SEOK OH ,  YOUNG-GYU KANG ,  SUNG HO SEO ,  MYUNG SUB SHIN ,  KYUNG PHIL YOO

IPC分类号： G06F1/04

CPC分类号： G06F1/08 ,  G06F1/04 ,  G06F1/06 ,  G11C7/222

摘要： An embedded multimedia card (eMMC) includes a clock channel that receives a clock signal from a host, a command channel that receives a command from the host, a plurality of data channels that transmit data to the host, and a return clock channel that transmits a return clock synchronized with the data to the host.

摘要翻译： 嵌入式多媒体卡（eMMC）包括从主机接收时钟信号的时钟信道，从主机接收命令的命令信道，向主机发送数据的多个数据信道以及发送数据的返回时钟信道 与数据同步的返回时钟到主机。

公开(公告)号：US20050002332A1

公开(公告)日：2005-01-06

申请号：US10861493

申请日：2004-06-07

申请人： Hwa-Seok Oh

发明人： Hwa-Seok Oh

IPC分类号： H04L12/56 ,  H04L12/26

CPC分类号： H04L47/10 ,  H04L47/29

摘要： A method, apparatus and computer program for performing a frame flow control, in which a comparator may count a length of a first data frame received from a first port and compare the length to a bandwidth limit value. The apparatus may include a pause frame unit which may determine a delay time based on the comparison of the comparator, and which may generate a pause frame with the bandwidth limit value based on the delay time. A frame transmitter may be configured to transmit the pause frame to the first port. A method, apparatus and computer program for transmitting a frame may receive a pause frame having a delay time from a port and calculate an idle time based on the delay time. A frame transmitter may transmit a first data frame to the port so that transmission of the first data frame is delayed by the idle time.

摘要翻译： 一种用于执行帧流控制的方法，装置和计算机程序，其中比较器可以对从第一端口接收的第一数据帧的长度进行计数，并将该长度与带宽限制值进行比较。 该装置可以包括暂停帧单元，其可以基于比较器的比较来确定延迟时间，并且其可以基于延迟时间生成具有带宽限制值的暂停帧。 帧发送器可以被配置为将暂停帧发送到第一端口。 用于发送帧的方法，装置和计算机程序可以从端口接收具有延迟时间的暂停帧，并基于延迟时间计算空闲时间。 帧发送器可以向端口发送第一数据帧，使得第一数据帧的发送被延迟空闲时间。

公开(公告)号：US09152551B2

公开(公告)日：2015-10-06

申请号：US13540078

申请日：2012-07-02

申请人： Kui-Yon Mun ,  Hwa Seok Oh

发明人： Kui-Yon Mun ,  Hwa Seok Oh

IPC分类号： G06F12/02 ,  G11C16/04 ,  G11C16/22

CPC分类号： G06F12/0292 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/202 ,  G06F2212/7207 ,  G11C16/0483 ,  G11C16/22 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method for operating a memory controller is provided. The method includes generating a pseudo random number by using a seed included in a stored seed group corresponding to a page to be currently programmed, wherein the stored seed group is stored among a plurality of seed groups. Data to be programmed into the current page is randomizing by using the pseudo random number and the memory controller outputs the randomized data. A solid state drive (SSD) or other memory storage device such as a memory card includes the memory controller and includes a read only memory (ROM) storing the plurality of seed groups. The memory controller includes a micro-processor and a read only memory (ROM) storing executable code for causing the micro-processor to access the plurality of stored seed groups and to select a seed therefrom corresponding to a page to be currently programmed.

摘要翻译： 提供了一种用于操作存储器控制器的方法。 该方法包括通过使用包含在与当前编程的页面相对应的存储的种子组中的种子来生成伪随机数，其中所存储的种子组存储在多个种子组中。 要编入当前页面的数据通过使用伪随机数进行随机化，存储器控制器输出随机数据。 固态驱动器（SSD）或诸如存储卡的其他存储器存储设备包括存储器控制器，并且包括存储多个种子组的只读存储器（ROM）。 存储器控制器包括存储可执行代码的微处理器和只读存储器（ROM），用于使微处理器访问多个存储的种子组并从其中选择与当前编程页面相对应的种子。