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17 条记录 (耗时 0.013 秒)

    Semiconductor Memory Device and Method of Fabricating the Same
    2.
    发明申请
    Semiconductor Memory Device and Method of Fabricating the Same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20140220750A1

    公开(公告)日：2014-08-07

    申请号：US14171056

    申请日：2014-02-03

    申请人： Woonghee Sohn ,  Kihyun Yun ,  Myoungbum Lee ,  Jeonggil Lee ,  Tai-Soo Lim ,  Yong Chae Jung

    发明人： Woonghee Sohn ,  Kihyun Yun ,  Myoungbum Lee ,  Jeonggil Lee ,  Tai-Soo Lim ,  Yong Chae Jung

    IPC分类号： H01L27/115

    CPC分类号： H01L27/11556 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7889 ,  H01L29/7926

    摘要： Provided are a semiconductor device and a method of fabricating the same. The method may include forming an electrode structure including insulating layers and electrode layers alternatingly stacked on a substrate, forming a channel hole to penetrate the electrode structure, forming a data storage layer on a sidewall of the channel hole, and forming a semiconductor pattern on a sidewall of the data storage layer to be electrically connected to the substrate. The electrode layers may be metal-silicide layers, and the insulating layers and the electrode layers may be formed in an in-situ manner using the same deposition system.

    摘要翻译： 提供半导体器件及其制造方法。 该方法可以包括形成包括绝缘层和交替层叠在基板上的电极层的电极结构，形成穿透电极结构的通道孔，在通道孔的侧壁上形成数据存储层，以及在通孔上形成半导体图案 数据存储层的侧壁将被电连接到基板。 电极层可以是金属硅化物层，并且可以使用相同的沉积系统以原位方式形成绝缘层和电极层。

    Semiconductor Devices And Methods Of Fabricating The Same
    5.
    发明申请
    Semiconductor Devices And Methods Of Fabricating The Same 有权
    半导体器件及其制造方法

    公开(公告)号：US20120094453A1

    公开(公告)日：2012-04-19

    申请号：US13273935

    申请日：2011-10-14

    申请人： Hauk Han ,  Byoung-Kyu Lee ,  Jingi Hong ,  Changwon Lee ,  Eungjoon Lee ,  Je-Hyeon Park ,  Jeonggil Lee

    发明人： Hauk Han ,  Byoung-Kyu Lee ,  Jingi Hong ,  Changwon Lee ,  Eungjoon Lee ,  Je-Hyeon Park ,  Jeonggil Lee

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7827 ,  H01L27/11582 ,  H01L29/66666 ,  H01L29/7926

    摘要： Semiconductor devices and methods of fabricating semiconductor devices that may include forming an insulation structure including insulation patterns that are sequentially stacked and vertically separated from each other to provide gap regions between the insulation patterns, forming a first conductive layer filling the gap regions and covering two opposite sidewalls of the insulation structure, and forming a second conductive layer covering the first conductive layer. A thickness of the second conductive layer covering an upper sidewall of the insulation structure is greater than a thickness of the second conductive layer covering a lower sidewall of the insulation structure.

    摘要翻译： 制造半导体器件的半导体器件和方法，其可以包括形成绝缘结构，所述绝缘结构包括彼此依次层叠并垂直分离的绝缘图案，以在绝缘图案之间提供间隙区域，形成填充间隙区域并覆盖两个相对的间隔区域的第一导电层 并且形成覆盖第一导电层的第二导电层。 覆盖绝缘结构的上侧壁的第二导电层的厚度大于覆盖绝缘结构的下侧壁的第二导电层的厚度。

    SEMICONDUCTOR DEVICES
    6.
    发明申请
    SEMICONDUCTOR DEVICES 有权
    半导体器件

    公开(公告)号：US20150249093A1

    公开(公告)日：2015-09-03

    申请号：US14574456

    申请日：2014-12-18

    申请人： Jeonggil LEE ,  Yeon-Sil SOHN ,  Woonghee SOHN ,  Kihyun YOON ,  Myoungbum LEE ,  Tai-Soo LIM ,  Yong Chae JUNG

    发明人： Jeonggil LEE ,  Yeon-Sil SOHN ,  Woonghee SOHN ,  Kihyun YOON ,  Myoungbum LEE ,  Tai-Soo LIM ,  Yong Chae JUNG

    IPC分类号： H01L27/115

    CPC分类号： H01L27/11582

    摘要： Provided is a semiconductor device, including gate structures on a substrate, the gate structures extending parallel to a first direction and being spaced apart from each other by a separation trench interposed therebetween, each of the gate structures including insulating patterns stacked on the substrate and a gate electrode interposed therebetween; vertical pillars connected to the substrate through the gate structures; an insulating spacer in the separation trench covering a sidewall of each of the gate structures; and a diffusion barrier structure between the gate electrode and the insulating spacer.

    摘要翻译： 提供了一种半导体器件，其包括在衬底上的栅极结构，栅极结构平行于第一方向延伸并且通过插入其间的分离沟槽彼此间隔开，每个栅极结构包括堆叠在衬底上的绝缘图案， 栅电极插入其间; 通过栅极结构连接到衬底的垂直柱; 隔离沟槽中的绝缘间隔物覆盖每个栅极结构的侧壁; 以及在栅电极和绝缘间隔物之间​​的扩散阻挡结构。