公开(公告)号：US06693043B1

公开(公告)日：2004-02-17

申请号：US10251178

申请日：2002-09-20

申请人： Senzi Li ,  Helmuth Treichel ,  Kirk Ostrowski ,  Chevan Goonetilleke ,  Jim Su ,  David L. Chen

发明人： Senzi Li ,  Helmuth Treichel ,  Kirk Ostrowski ,  Chevan Goonetilleke ,  Jim Su ,  David L. Chen

IPC分类号： H01L21302

CPC分类号： H01J37/32357 ,  G03F7/427 ,  H01J2237/3342 ,  H01L21/31138 ,  H01L21/76802

摘要： A unique photoresist strip sequence using a downstream plasma system is described. The sequence can include a RF directional plasma alone, downstream plasma alone or combine both RF plasma and downstream plasma together. The process sequence can be a single step or multiple steps, which produce high strip rates while maintaining the dielectric properties of the film. The process can be an oxidizing process carried out at low temperature and low pressure, which reduces the reactivity of the oxygen with the low-k film. Furthermore, by adding a small percentage of an additive gas, such as a fluorine-containing gas, to the plasma, the inorganic residues from the strip process are removed, leaving a clean film cleared of photoresist and residue.

摘要翻译： 描述了使用下游等离子体系统的独特的光刻胶条序列。 该序列可以包括单独的RF定向等离子体，单独的下游等离子体或将RF等离子体和下游等离子体组合在一起。 工艺顺序可以是单步或多步，其在保持膜的介电性能的同时产生高剥离速率。 该过程可以是在低温和低压下进行的氧化过程，这降低了氧与低k膜的反应性。 此外，通过将少量的添加气体如含氟气体加入到等离子体中，去除来自带材加工的无机残留物，留下清洁的光致抗蚀剂和残留物的薄膜。

公开(公告)号：US5728608A

公开(公告)日：1998-03-17

申请号：US541066

申请日：1995-10-11

申请人： Yuh-Jia (Jim) Su ,  Yuen-Kui (Jerry) Wong ,  Kam S. Law ,  Haruhiro (Harry) Goto

发明人： Yuh-Jia (Jim) Su ,  Yuen-Kui (Jerry) Wong ,  Kam S. Law ,  Haruhiro (Harry) Goto

IPC分类号： C01B17/45 ,  C23F1/12 ,  C23F4/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/336 ,  H01L21/768 ,  H01L29/786

CPC分类号： H01L29/66765 ,  H01L21/31116 ,  H01L21/76804 ,  Y10S438/978

摘要： A method of etching openings in a dielectric layer of a semiconductor device by utilizing a novel etchant gas system of sulfur hexafluoride/chlorine such that sloped sidewalls can be formed in the openings having a desired taper of between about 20.degree. and about 85.degree. for achieving improved step coverage and profile control of the TFT fabrication process.

公开(公告)号：US20110017407A1

公开(公告)日：2011-01-27

申请号：US12842112

申请日：2010-07-23

申请人： Chen-Ke Hsu ,  Liang-Sheng Chi ,  Chun-Chang Chen ,  Win-Jim Su ,  Hsu-Cheng Lin ,  Mei-Ling Tsai ,  Yi Lung Liu ,  Chen Ou

发明人： Chen-Ke Hsu ,  Liang-Sheng Chi ,  Chun-Chang Chen ,  Win-Jim Su ,  Hsu-Cheng Lin ,  Mei-Ling Tsai ,  Yi Lung Liu ,  Chen Ou

IPC分类号： B32B38/10

CPC分类号： H01L22/20 ,  H01L21/67005 ,  H01L21/67132 ,  H01L21/67271 ,  Y10S156/93 ,  Y10S156/941 ,  Y10T156/1111 ,  Y10T156/1116 ,  Y10T156/1158 ,  Y10T156/1168 ,  Y10T156/1179 ,  Y10T156/1195 ,  Y10T156/1917 ,  Y10T156/1933 ,  Y10T156/1983

摘要： A chip sorting apparatus comprising a chip holder comprising a first surface and an second surface opposite to the first surface; a wafer comprising a first chip disposed on a first position of the first surface; a first chip receiver comprising a third surface and an fourth surface opposite to the third surface, wherein the third surface is opposite to the first surface; a pressurization device making the first chip and the third surface of the first chip receiver adhered to each other through pressuring the second surface at where corresponding to the first position; and a separator decreasing the adhesion between the first chip and the first surface.

摘要翻译： 一种芯片分选装置，包括：芯片保持器，其包括第一表面和与所述第一表面相对的第二表面; 晶片，其包括设置在所述第一表面的第一位置上的第一芯片; 第一芯片接收器，包括与第三表面相对的第三表面和第四表面，其中第三表面与第一表面相对; 使第一芯片的第一芯片和第三表面的加压装置通过在对应于第一位置的位置处对第二表面施加压力而彼此粘合; 以及减小第一芯片和第一表面之间的粘附性的隔板。

公开(公告)号：US07256092B2

公开(公告)日：2007-08-14

申请号：US10710616

申请日：2004-07-25

申请人： Jung-Ching Chen ,  Jy-Hwang Lin ,  Sheng-Hsiung Yang ,  Jim Su

发明人： Jung-Ching Chen ,  Jy-Hwang Lin ,  Sheng-Hsiung Yang ,  Jim Su

IPC分类号： H01L21/8232

CPC分类号： H01L29/1083 ,  H01L21/2652 ,  H01L21/823814 ,  H01L21/823857 ,  H01L21/823878 ,  H01L21/823892 ,  H01L29/7833

摘要： A high-voltage semiconductor MOS process that is fully compatible with low-voltage MOS process is provided. The high-voltage N/P well are implanted into the substrate prior to the definition of active areas. The channel stop doping regions are formed after the formation of field oxide layers, thus avoiding lateral diffusion of the channel stop doping regions. In addition, the grade drive-in process used to activate the grade doping regions in the high-voltage device area and the gate oxide growth of the high-voltage devices are performed simultaneously.

摘要翻译： 提供了与低压MOS工艺完全兼容的高压半导体MOS工艺。 在定义有源区之前，将高压N / P阱注入到衬底中。 在形成场氧化物层之后形成通道停止掺杂区域，从而避免沟道停止掺杂区域的横向扩散。 此外，用于激活高压器件区域中的等级掺杂区域和高压器件的栅极氧化物生长的等级驱入工艺同时进行。

公开(公告)号：US08714227B2

公开(公告)日：2014-05-06

申请号：US12842112

申请日：2010-07-23

申请人： Chen-Ke Hsu ,  Liang-Sheng Chi ,  Chun-Chang Chen ,  Win-Jim Su ,  Hsu-Cheng Lin ,  Mei-Ling Tsai ,  Yi Lung Liu ,  Chen Ou

发明人： Chen-Ke Hsu ,  Liang-Sheng Chi ,  Chun-Chang Chen ,  Win-Jim Su ,  Hsu-Cheng Lin ,  Mei-Ling Tsai ,  Yi Lung Liu ,  Chen Ou

IPC分类号： B32B38/10

CPC分类号： H01L22/20 ,  H01L21/67005 ,  H01L21/67132 ,  H01L21/67271 ,  Y10S156/93 ,  Y10S156/941 ,  Y10T156/1111 ,  Y10T156/1116 ,  Y10T156/1158 ,  Y10T156/1168 ,  Y10T156/1179 ,  Y10T156/1195 ,  Y10T156/1917 ,  Y10T156/1933 ,  Y10T156/1983

摘要： A chip sorting apparatus comprising a chip holder comprising a first surface and an second surface opposite to the first surface; a wafer comprising a first chip disposed on a first position of the first surface; a first chip receiver comprising a third surface and an fourth surface opposite to the third surface, wherein the third surface is opposite to the first surface; a pressurization device making the first chip and the third surface of the first chip receiver adhered to each other through pressuring the second surface at where corresponding to the first position; and a separator decreasing the adhesion between the first chip and the first surface.

摘要翻译： 一种芯片分选装置，包括：芯片保持器，其包括第一表面和与所述第一表面相对的第二表面; 晶片，其包括设置在所述第一表面的第一位置上的第一芯片; 第一芯片接收器，包括与第三表面相对的第三表面和第四表面，其中第三表面与第一表面相对; 使第一芯片的第一芯片和第三表面的加压装置通过在对应于第一位置的位置处对第二表面施加压力而彼此粘合; 以及减小第一芯片和第一表面之间的粘附性的隔板。

公开(公告)号：US20100200885A1

公开(公告)日：2010-08-12

申请号：US12703964

申请日：2010-02-11

申请人： Chen Ke HSU ,  Win Jim Su ,  Chia-Ming Chuang ,  Chen Ou

发明人： Chen Ke HSU ,  Win Jim Su ,  Chia-Ming Chuang ,  Chen Ou

IPC分类号： H01L33/00

CPC分类号： H01L33/22 ,  H01L33/0095 ,  H01L33/20

摘要： A light emitting device and a method of fabricating thereof are provided. The method of fabricating the light emitting device comprises: providing a substrate having a first major surface and a second major surface; forming a plurality of light-emitting stacks on the first major surface; forming an etching protection layer on each of the light emitting stacks; forming a plurality of holes by a discontinuous laser beam on the substrate; etching the plurality of holes; and slicing off the substrate along the plurality of holes to form a light emitting device. The light emitting device has a substrate wherein the sidewall of the substrate comprising a first area with a substantially flat surface and a second area with substantially textured surface.

摘要翻译： 提供一种发光器件及其制造方法。 制造发光器件的方法包括：提供具有第一主表面和第二主表面的衬底; 在所述第一主表面上形成多个发光堆叠; 在每个发光堆上形成蚀刻保护层; 通过基板上的不连续激光束形成多个孔; 蚀刻多个孔; 并且沿着所述多个孔切割所述基板以形成发光器件。 发光器件具有衬底，其中衬底的侧壁包括具有基本平坦表面的第一区域和具有基本纹理表面的第二区域。

公开(公告)号：US08492780B2

公开(公告)日：2013-07-23

申请号：US12703964

申请日：2010-02-11

申请人： Chen Ke Hsu ,  Win Jim Su ,  Chia-Ming Chuang ,  Chen Ou

发明人： Chen Ke Hsu ,  Win Jim Su ,  Chia-Ming Chuang ,  Chen Ou

IPC分类号： H01L33/00

CPC分类号： H01L33/22 ,  H01L33/0095 ,  H01L33/20

摘要： A light emitting device and a method of fabricating thereof are provided. The method of fabricating the light emitting device comprises: providing a substrate having a first major surface and a second major surface; forming a plurality of light-emitting stacks on the first major surface; forming an etching protection layer on each of the light emitting stacks; forming a plurality of holes by a discontinuous laser beam on the substrate; etching the plurality of holes; and slicing off the substrate along the plurality of holes to form a light emitting device. The light emitting device has a substrate wherein the sidewall of the substrate comprising a first area with a substantially flat surface and a second area with substantially textured surface.

摘要翻译： 提供一种发光器件及其制造方法。 制造发光器件的方法包括：提供具有第一主表面和第二主表面的衬底; 在所述第一主表面上形成多个发光堆叠; 在每个发光堆上形成蚀刻保护层; 通过基板上的不连续激光束形成多个孔; 蚀刻多个孔; 并且沿着所述多个孔切割所述基板以形成发光器件。 发光器件具有衬底，其中衬底的侧壁包括具有基本平坦表面的第一区域和具有基本纹理表面的第二区域。

公开(公告)号：US20060017114A1

公开(公告)日：2006-01-26

申请号：US10710616

申请日：2004-07-25

申请人： Jung-Ching Chen ,  Jy-Hwang Lin ,  Sheng-Hsiung Yang ,  Jim SU

发明人： Jung-Ching Chen ,  Jy-Hwang Lin ,  Sheng-Hsiung Yang ,  Jim SU

IPC分类号： H01L29/78 ,  H01L21/8238

CPC分类号： H01L29/1083 ,  H01L21/2652 ,  H01L21/823814 ,  H01L21/823857 ,  H01L21/823878 ,  H01L21/823892 ,  H01L29/7833

摘要： A high-voltage semiconductor MOS process that is fully compatible with low-voltage MOS process is provided. The high-voltage N/P well are implanted into the substrate prior to the definition of active areas. The channel stop doping regions are formed after the formation of field oxide layers, thus avoiding lateral diffusion of the channel stop doping regions. In addition, the grade drive-in process used to activate the grade doping regions in the high-voltage device area and the gate oxide growth of the high-voltage devices are performed simultaneously.

摘要翻译： 提供了与低压MOS工艺完全兼容的高压半导体MOS工艺。 在定义有源区之前，将高压N / P阱注入到衬底中。 在形成场氧化物层之后形成通道停止掺杂区域，从而避免沟道停止掺杂区域的横向扩散。 此外，用于激活高压器件区域中的等级掺杂区域和高压器件的栅极氧化物生长的等级驱入工艺同时进行。

公开(公告)号：US5895937A

公开(公告)日：1999-04-20

申请号：US955446

申请日：1997-10-21

申请人： Yuh-Jia (Jim) Su ,  Yuen-Kui (Jerry) Wong ,  Kam S. Law ,  Haruhiro (Harry) Goto

发明人： Yuh-Jia (Jim) Su ,  Yuen-Kui (Jerry) Wong ,  Kam S. Law ,  Haruhiro (Harry) Goto

IPC分类号： C01B17/45 ,  C23F1/12 ,  C23F4/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/336 ,  H01L21/768 ,  H01L29/786 ,  H01L27/01 ,  H01L27/12 ,  H01L31/0392

CPC分类号： H01L29/66765 ,  H01L21/31116 ,  H01L21/76804 ,  Y10S438/978

摘要： A method of etching openings in a dielectric layer of a semiconductor device by utilizing a novel etchant gas system of sulfur hexafluoride/chlorine such that sloped sidewalls can be formed in the openings having a desired taper of between about 20.degree. and about 85.degree. for achieving improved step coverage and profile control of the TFT fabrication process.

摘要翻译： 通过利用六氟化硫/氯的新型蚀刻剂气体系统来蚀刻半导体器件的电介质层中的开口的方法，使得可以在具有大约20度至大约85度之间的所需锥度的开口中形成倾斜的侧壁，以实现 改进TFT制作工艺的台阶覆盖和轮廓控制。

公开(公告)号：US5657523A

公开(公告)日：1997-08-19

申请号：US556752

申请日：1995-11-02

申请人： Ching-Yuan Lin ,  Win-Jim Su

发明人： Ching-Yuan Lin ,  Win-Jim Su

IPC分类号： B23Q5/34 ,  B23Q16/10 ,  B23B29/32

CPC分类号： B23Q5/341 ,  B23Q16/102 ,  Y10T29/5114 ,  Y10T29/5155 ,  Y10T29/5158 ,  Y10T29/5167 ,  Y10T74/1494 ,  Y10T74/2101 ,  Y10T74/2107

摘要： A positioning mechanism of a turret index which performs index rotation by the use of an index mechanism to transmit output shaft motion and perform positioning by a three-piece toothed coupler. The present invention uses a hydraulic system to control the division and the combination of the three-piece toothed coupling to attain the turret's precise positioning and comprises a piston ring on the output shaft. The area of the piston ring's end plane which is subjected to hydraulic pressure, is greater than the area of the slider's end plane inside the three-piece toothed coupler and its end plane is also subjected to hydraulic pressure. At the same time the three-piece toothed coupler is in meshing, the output shaft can obtain an inward pulling force to prevent the output shaft from propping up only a very small distance.

摘要翻译： 转塔指数的定位机构，其通过使用指示机构进行指标旋转，以传送输出轴的运动并通过三件式带齿耦合器执行定位。 本发明使用液压系统来控制三件式齿形联轴器的分割和组合以获得转台的精确定位，并且在输出轴上包括活塞环。 承受液压的活塞环的端面的面积大于三件式齿形联接器内的滑块的端面的面积，其端面也受到液压压力。 同时三件式齿形联轴器啮合时，输出轴可获得向内的拉力，以防止输出轴仅仅支撑很小的距离。