公开(公告)号：US20090152247A1

公开(公告)日：2009-06-18

申请号：US12291002

申请日：2008-11-04

申请人： Dean Jennings ,  Abhilash J. Mayur ,  Timothy N. Thomas ,  Vijay Parihar ,  Vedapuram S. Achutharaman ,  Randhir P.S. Thakur

发明人： Dean Jennings ,  Abhilash J. Mayur ,  Timothy N. Thomas ,  Vijay Parihar ,  Vedapuram S. Achutharaman ,  Randhir P.S. Thakur

IPC分类号： B23K26/00

CPC分类号： B23K26/0738 ,  B23K26/0613 ,  B23K26/0676 ,  H01L21/268 ,  H01L29/7833 ,  Y10T117/1016

摘要： A dynamic surface anneal apparatus for annealing a semiconductor workpiece has a workpiece support for supporting a workpiece, an optical source and scanning apparatus for scanning the optical source and the workpiece support relative to one another along a fast axis. The optical source includes an array of laser emitters arranged generally in successive rows of the emitters, the rows being transverse to the fast axis. Plural collimating lenslets overlie respective ones of the rows of emitters and provide collimation along the fast axis. The selected lenslets have one or a succession of optical deflection angles corresponding to beam deflections along the fast axis for respective rows of emitters. Optics focus light from the array of laser emitters onto a surface of the workpiece to form a succession of line beams transverse to the fast axis spaced along the fast axis in accordance with the succession of deflection angles.

摘要翻译： 用于退火半导体工件的动态表面退火装置具有用于支撑工件的工件支撑件，用于沿着快轴相对于彼此扫描光源和工件支撑件的光源和扫描装置。 光源包括大致以发射器的连续行布置的激光发射器的阵列，该列横向于快轴。 多个准直的小透镜叠加在发射器排中的相应行上，并沿着快轴提供准直。 所选择的小透镜具有对应于沿着快轴的光束偏转的相应行发射器的一个或一系列光学偏转角。 将来自激光发射器阵列的光聚焦到工件的表面上，以根据偏转角的顺序形成一系列沿着快轴间隔开的快轴的线束。

公开(公告)号：US20110104848A1

公开(公告)日：2011-05-05

申请号：US12873299

申请日：2010-08-31

申请人： DIETER HAAS ,  PRAVIN K. NARWANKAR ,  RANDHIR P.S. THAKUR

发明人： DIETER HAAS ,  PRAVIN K. NARWANKAR ,  RANDHIR P.S. THAKUR

IPC分类号： H01L31/18 ,  H01L21/465 ,  C23C16/50

CPC分类号： C23C16/24 ,  C23C16/54 ,  H01L21/02532 ,  H01L21/0262

摘要： Methods and apparatus for hot wire chemical vapor deposition (HWCVD) are provided herein. In some embodiments, an inline HWCVD tool may include a linear conveyor for moving a substrate through the linear process tool; and a multiplicity of HWCVD sources, the multiplicity of HWCVD sources being positioned parallel to and spaced apart from the linear conveyor and configured to deposit material on the surface of the substrate as the substrate moves along the linear conveyor; wherein the substrate is coated by the multiplicity of HWCVD sources without breaking vacuum. In some embodiments, methods of coating substrates may include depositing a first material from an HWCVD source on a substrate moving through a first deposition chamber; moving the substrate from the first deposition chamber to a second deposition chamber; and depositing a second material from a second HWCVD source on the substrate moving through the second deposition chamber.

摘要翻译： 本文提供了热线化学气相沉积（HWCVD）的方法和装置。 在一些实施例中，在线HWCVD工具可以包括用于通过线性处理工具移动衬底的线性输送机; 和多个HWCVD源，多个HWCVD源被定位成与线性传送器平行并与其间隔开，并且被配置为当衬底沿着线性传送器移动时将材料沉积在衬底的表面上; 其中所述基底被多个HWCVD源涂覆而不破坏真空。 在一些实施例中，涂覆基底的方法可以包括在移动通过第一沉积室的基底上沉积来自HWCVD源的第一材料; 将衬底从第一沉积室移动到第二沉积室; 以及将第二材料从第二HWCVD源沉积在移动通过第二沉积室的衬底上。

公开(公告)号：US20090056626A1

公开(公告)日：2009-03-05

申请号：US12261487

申请日：2008-10-30

申请人： RANDHIR P.S. THAKUR ,  Alfred W. Mak ,  Ming Xi ,  Walter Benjamin Glenn ,  Ahmad A. Khan ,  Ayad A. Al-Shaikh ,  Avgerinos V. Gelatos ,  Salvador P. Umotoy

发明人： RANDHIR P.S. THAKUR ,  Alfred W. Mak ,  Ming Xi ,  Walter Benjamin Glenn ,  Ahmad A. Khan ,  Ayad A. Al-Shaikh ,  Avgerinos V. Gelatos ,  Salvador P. Umotoy

IPC分类号： H01L21/30

CPC分类号： C23C16/45544 ,  C23C16/4412 ,  C23C16/452 ,  C23C16/45536 ,  C23C16/45565 ,  C23C16/45582 ,  H01J37/32009 ,  H01J37/32091 ,  H01J37/3244 ,  H01J37/32834 ,  H01L21/6719

摘要： An apparatus for cyclical depositing of thin films on semiconductor substrates, comprising a process chamber having a gas distribution system with separate paths for process gases and an exhaust system synchronized with operation of valves dosing the process gases into a reaction region of the chamber.

摘要翻译： 一种用于在半导体衬底上循环沉积薄膜的装置，包括具有气体分配系统的处理室，该气体分配系统具有用于处理气体的独立路径，以及与将所述工艺气体计量给所述室的反应区域的阀的操作同步的排气系统。

公开(公告)号：US07217614B2

公开(公告)日：2007-05-15

申请号：US10338523

申请日：2003-01-07

申请人： Randhir P.S. Thakur

发明人： Randhir P.S. Thakur

IPC分类号： H01L21/8234 ,  H01L21/8244 ,  H01L21/31

CPC分类号： H01L21/3145 ,  C23C16/345 ,  H01L21/3144 ,  H01L21/3185 ,  H01L27/10852 ,  H01L28/40

摘要： A first electrode and a doped oxide layer laterally proximate thereof are provided over a substrate. A silicon nitride layer is formed over both the doped oxide layer and the first electrode to a thickness of no greater than 80 Angstroms over at least the first electrode by low pressure chemical vapor deposition using feed gases comprising a silicon hydride, H2 and ammonia. The substrate with silicon nitride layer is exposed to oxidizing conditions comprising at least 700° C. to form a silicon dioxide layer over the silicon nitride layer, with the thickness of silicon nitride over the doped oxide layer being sufficient to shield oxidizable substrate material beneath the doped oxide layer from oxidizing during the exposing. A second electrode is formed over the silicon dioxide layer and the first electrode.In one implementation, the chemical vapor depositing comprises feed gases of a silicon hydride and ammonia, with the depositing comprising increasing internal reactor temperature from below 500° C. to a maximum deposition temperature above 600° C. and starting feed of the silicon hydride into the reactor at a temperature less than or equal to 600° C. In one implementation the depositing comprises increasing internal reactor temperature from below 500° C. to a maximum deposition temperature above 600° C. using a temperature ramp rate of at least 10° C./minute from at least 500° C. to at least 600° C. Other aspects and implementations are described.

摘要翻译： 第一电极和其侧向附近的掺杂氧化物层设置在衬底上。 通过低压化学气相沉积，使用包含氢化硅H 2的进料气体，在掺杂氧化物层和第一电极之上形成氮化硅层至少在第一电极上不大于80埃的厚度 和氨。 具有氮化硅层的衬底暴露于包括至少700℃的氧化条件，以在氮化硅层上方形成二氧化硅层，掺杂氧化物层上的氮化硅厚度足以将可氧化的衬底材料屏蔽在 掺杂的氧化物层在曝光期间被氧化。 在二氧化硅层和第一电极上形成第二电极。 在一个实施方案中，化学气相沉积包括氢化硅和氨的进料气体，沉积物包括将内部反应器温度从低于500℃增加至高于600℃的最大沉积温度，并将硅氢化物的原料进料 反应器的温度低于或等于600℃。在一个实施方案中，沉积包括使内部反应器温度从低于500℃增加至高于600℃的最大沉积温度，使用至少10°的温度升温速率 从至少500℃至至少600℃的/分钟。其他方面和实施方式进行了描述。

公开(公告)号：US6015997A

公开(公告)日：2000-01-18

申请号：US803174

申请日：1997-02-19

申请人： Yongjun Hu ,  Pai-Hung Pan ,  Er-Xuan Ping ,  Randhir P.S. Thakur ,  Scott DeBoer

发明人： Yongjun Hu ,  Pai-Hung Pan ,  Er-Xuan Ping ,  Randhir P.S. Thakur ,  Scott DeBoer

IPC分类号： H01L21/28 ,  H01L29/49 ,  H01L29/76 ,  H01L29/74 ,  H01L31/062 ,  H01L31/113

CPC分类号： H01L21/28044 ,  H01L21/28052 ,  H01L29/4941

摘要： Methods and apparatus for forming word line stacks comprise one, or a combination of the following: a silicon diffusion barrier layer, doped with oxygen or nitrogen, coupled between a bottom silicon layer and a conductor layer; an amorphous silicon diffusion barrier coupled between a polysilicon layer and a conductor layer; a thin nitride layer coupled between a bottom silicon layer and a titanium silicide conductor layer, and a bottom silicon layer coupled to a conductor layer, which comprises C54-titanium silicide. Word line stacks formed by the methods of the invention are used in sub-0.25 micron line width applications and have a lower resistivity and improved thermal stability.

公开(公告)号：US6015743A

公开(公告)日：2000-01-18

申请号：US64631

申请日：1998-04-22

申请人： John K. Zahurak ,  Klaus F. Schuegraf ,  Randhir P.S. Thakur

发明人： John K. Zahurak ,  Klaus F. Schuegraf ,  Randhir P.S. Thakur

IPC分类号： H01L21/02 ,  H01L21/8242

CPC分类号： H01L28/84 ,  Y10S148/138

摘要： A semiconductor processing method of providing a conductively doped layer of hemispherical grain polysilicon over a substrate includes, a) providing a layer of conductively doped silicon over the substrate to a thickness greater than about 200 Angstroms; b) depositing an undoped layer of non-polycrystalline silicon over the doped silicon layer to a thickness of from 100 Angstroms to about 400 Angstroms; c) positioning the substrate with the doped silicon and undoped non-polycrystalline silicon layers within a chemical vapor deposition reactor; d) with the substrate therein, lowering pressure within the chemical vapor deposition reactor to a first pressure at or below about 200 mTorr; e) with the substrate therein, raising pressure within the chemical vapor deposition reactor from the first pressure and flushing the reactor with a purging gas; f) with the substrate therein ceasing flow of the purging gas and lowering pressure within the chemical vapor deposition reactor to a second pressure at or below about 200 mTorr; and g) annealing the substrate having the deposited non-polycrystalline silicon layer in the presence of a conductivity enhancing impurity gas at an annealing temperature of from about 350.degree. C. to about 600.degree. C. and at an annealing pressure of from about 10.sup.-4 Torr to about 80 Torr to in situ both diffuse conductivity enhancing impurity into the non-polycrystalline silicon layer and transform the non-polycrystalline silicon layer into a conductively doped hemispherical grain polysilicon layer.

摘要翻译： 在衬底上提供半球形晶粒多晶硅的导电掺杂层的半导体处理方法包括：a）在衬底上提供厚度大于约200埃的导电掺杂硅层; b）在掺杂硅层上沉积未掺杂的非多晶硅层至厚度为100埃至约400埃; c）将衬底与掺杂的硅和未掺杂的非多晶硅层定位在化学气相沉积反应器内; d）与其中的基底，将化学气相沉积反应器内的压力降低到等于或低于约200mTorr的第一压力; e）与其中的基板，从第一压力升高化学气相沉积反应器内的压力并用净化气体冲洗反应器; f）其中衬底在其中停止清洗气体的流动并且将化学气相沉积反应器内的压力降低至等于或低于约200mTorr的第二压力; 以及g）在约350℃至约600℃的退火温度和约10℃的退火温度下，在导电性增强杂质气体存在下退火具有沉积的非多晶硅层的衬底， 4乇至约80乇原位扩散导电性增强杂质进入非多晶硅层，并将非多晶硅层转变为导电掺杂半球形晶粒多晶硅层。

公开(公告)号：US20100273309A1

公开(公告)日：2010-10-28

申请号：US12828868

申请日：2010-07-01

申请人： Fernando Gonzalez ,  David Chapek ,  Randhir P.S. Thakur

发明人： Fernando Gonzalez ,  David Chapek ,  Randhir P.S. Thakur

IPC分类号： H01L21/762

CPC分类号： H01L21/76237

摘要： The present invention relates to methods for forming microelectronic structures in a semiconductor substrate. The method includes selectively removing dielectric material to expose a portion of an oxide overlying a semiconductor substrate. Insulating material may be formed substantially conformably over the oxide and remaining portions of the dielectric material. Spacers may be formed from the insulating material. An isolation trench etch follows the spacer etch. An optional thermal oxidation of the surfaces in the isolation trench may be performed, which may optionally be followed by doping of the bottom of the isolation trench to further isolate neighboring active regions on either side of the isolation trench. A conformal material may be formed substantially conformably over the spacer, over the remaining portions of the dielectric material, and substantially filling the isolation trench. Planarization of the conformal material may follow.

摘要翻译： 本发明涉及在半导体衬底中形成微电子结构的方法。 该方法包括选择性地去除介电材料以暴露覆盖半导体衬底的氧化物的一部分。 绝缘材料可以基本上顺应地形成在电介质材料的氧化物和剩余部分上。 间隔物可以由绝缘材料形成。 隔离沟蚀刻遵循间隔物蚀刻。 可以执行隔离沟槽中的表面的可选热氧化，其可以任选地随后掺杂隔离沟槽的底部以进一步隔离隔离沟槽的任一侧上的相邻有源区。 可以在绝缘材料的剩余部分上基本上顺应地在间隔物上形成共形材料，并且基本上填充隔离沟槽。 保形材料的平面化可能遵循。

公开(公告)号：US5989973A

公开(公告)日：1999-11-23

申请号：US820712

申请日：1997-03-18

申请人： John K. Zahurak ,  Klaus F. Schuegraf ,  Randhir P.S. Thakur

发明人： John K. Zahurak ,  Klaus F. Schuegraf ,  Randhir P.S. Thakur

IPC分类号： H01L21/02 ,  H01L21/8242

CPC分类号： H01L28/84 ,  Y10S148/138

摘要： A semiconductor processing method of providing a conductively doped layer of hemispherical grain polysilicon over a substrate includes, a) providing a layer of conductively doped silicon over the substrate to a thickness greater than about 200 Angstroms; b) depositing an undoped layer of non-polycrystalline silicon over the doped silicon layer to a thickness of from 100 Angstroms to about 400 Angstroms; c) positioning the substrate with the doped silicon and undoped non-polycrystalline silicon layers within a chemical vapor deposition reactor; d) with the substrate therein, lowering pressure within the chemical vapor deposition reactor to a first pressure at or below about 200 mTorr; e) with the substrate therein, raising pressure within the chemical vapor deposition reactor from the first pressure and flushing the reactor with a purging gas; f) with the substrate therein ceasing flow of the purging gas and lowering pressure within the chemical vapor deposition reactor to a second pressure at or below about 200 mTorr; and g) annealing the substrate having the deposited non-polycrystalline silicon layer in the presence of a conductivity enhancing impurity gas at an annealing temperature of from about 350.degree. C. to about 600.degree. C. and at an annealing pressure of from about 10.sup.4 Torr to about 80 Torr to in situ both diffuse conductivity enhancing impurity into the non-polycrystalline silicon layer and transform the non-polycrystalline silicon layer into a conductively doped hemispherical grain polysilicon layer.

摘要翻译： 在衬底上提供半球形晶粒多晶硅的导电掺杂层的半导体处理方法包括：a）在衬底上提供厚度大于约200埃的导电掺杂硅层; b）在掺杂硅层上沉积未掺杂的非多晶硅层至厚度为100埃至约400埃; c）将衬底与掺杂的硅和未掺杂的非多晶硅层定位在化学气相沉积反应器内; d）与其中的基底，将化学气相沉积反应器内的压力降低到等于或低于约200mTorr的第一压力; e）与其中的基板，从第一压力升高化学气相沉积反应器内的压力并用净化气体冲洗反应器; f）其中衬底在其中停止清洗气体的流动并且将化学气相沉积反应器内的压力降低至等于或低于约200mTorr的第二压力; 并且g）在退火温度为约350℃至约600℃，退火温度为约104托的条件下，在导电性增强杂质气体存在下使具有沉积的非多晶硅层的基板退火 至约80托，原位将扩散导电性增强杂质进入非多晶硅层，并将非多晶硅层转化为导电掺杂的半球状晶粒多晶硅层。

公开(公告)号：US5977581A

公开(公告)日：1999-11-02

申请号：US810438

申请日：1997-03-04

申请人： Randhir P.S. Thakur ,  Gurtej S. Sandhu

发明人： Randhir P.S. Thakur ,  Gurtej S. Sandhu

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L29/72

CPC分类号： H01L27/1085 ,  H01L28/40

摘要： An embodiment of the present invention describes a method for forming a dielectric material for a storage capacitor during fabrication of a semiconductor memory device, by: cleaning impurities from the surface of a conductive plate of the storage capacitor; forming a nitride film over the conductive plate's cleaned surface; forming a metal silicide film over the nitride film; and oxidizing the metal silicide film by rapid thermal oxide (RTO) processing. A resulting structure is a capacitor having a dielectric material that is an oxidized metal silicide film.

摘要翻译： 本发明的一个实施例描述了一种用于在制造半导体存储器件期间形成用于存储电容器的电介质材料的方法，该方法是：从存储电容器的导电板的表面清除杂质; 在导电板的清洁表面上形成氮化物膜; 在氮化膜上形成金属硅化物膜; 并通过快速热氧化（RTO）处理氧化金属硅化物膜。 所得结构是具有作为氧化金属硅化物膜的电介质材料的电容器。

公开(公告)号：US5963833A

公开(公告)日：1999-10-05

申请号：US831611

申请日：1997-04-10

申请人： Randhir P.S. Thakur

发明人： Randhir P.S. Thakur

IPC分类号： C23C16/44 ,  H01L21/44

CPC分类号： C23C16/4405 ,  Y10S438/905 ,  Y10S438/906

摘要： A low temperature in-situ precleaning process for a semiconductor surface is disclosed. Ambient reactant gases, such as NF.sub.3 and GeH.sub.4, having a partial pressure of between approximately 10.sup.-8 and 700 Torr, are pulsed in a batch furnace at temperatures in the approximate range of 250 to 950 degrees Celsius and pressure in the approximate range of 4.times.10.sup.3 to 20.times.10.sup.3 Torr. This forms material on the surface that easily vaporizes in that temperature and pressure range, providing a clean surface for formation of the next layer. A similar in-situ cleaning process is performed at temperature ranges of between approximately 300 to 1,000 degrees Celsius for the equipment utilized in processing semiconductor substrates.