公开(公告)号：US09152636B2

公开(公告)日：2015-10-06

申请号：US12073612

申请日：2008-03-07

Applicant: Chien-Chung Tseng ,  Hsiang-Wen Shih ,  Wang-Ju Lee ,  Hsin-Nan Lin

Inventor： Chien-Chung Tseng ,  Hsiang-Wen Shih ,  Wang-Ju Lee ,  Hsin-Nan Lin

IPC: G06F7/00 ,  G06F17/30

CPC classification number: G06F17/30067 ,  G06F17/30091 ,  G06F17/30238

Abstract: The present invention discloses a content protection system in a storage medium and the method of the same. The storage medium includes a flash disk, a memory card, a hard disk, a CDR, or a MO. In one aspect of the present invention, the content protection system in a storage medium includes a database; a partitioning module coupled to the database to partition the storage medium; and a link table managing module coupled to the database to establish and manage a link table of a file to be stored in the storage medium.

公开(公告)号：US20090228521A1

公开(公告)日：2009-09-10

申请号：US12073612

申请日：2008-03-07

Applicant: Chien-Chung TSENG ,  Hsiang-Wen SHIH ,  Wang-Ju LEE ,  Hsin-Nan LIN

Inventor： Chien-Chung TSENG ,  Hsiang-Wen SHIH ,  Wang-Ju LEE ,  Hsin-Nan LIN

IPC: G06F17/30

CPC classification number: G06F17/30067 ,  G06F17/30091 ,  G06F17/30238

Abstract: The present invention discloses a content protection system in a storage medium and the method of the same. The storage medium includes a flash disk, a memory card, a hard disk, a CDR, or a MO. In one aspect of the present invention, the content protection system in a storage medium includes a database; a partitioning module coupled to the database to partition the storage medium; and a link table managing module coupled to the database to establish and manage a link table of a file to be stored in the storage medium.

Abstract translation: 本发明公开了一种存储介质中的内容保护系统及其方法。 存储介质包括闪存盘，存储卡，硬盘，CDR或MO。 在本发明的一个方面，存储介质中的内容保护系统包括数据库; 耦合到所述数据库以划分所述存储介质的分区模块; 以及链接表管理模块，其耦合到所述数据库以建立和管理要存储在所述存储介质中的文件的链接表。

公开(公告)号：US07692314B2

公开(公告)日：2010-04-06

申请号：US11845718

申请日：2007-08-27

Applicant: Se-Young Yang ,  Wang-Ju Lee

Inventor： Se-Young Yang ,  Wang-Ju Lee

IPC: H01L23/48

CPC classification number: H01L24/12 ,  H01L23/3114 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/30105

Abstract: Provided is a wafer level chip scale package that reduces the parasitic capacitance generated between ball pads and the solder balls, and enhances the joint reliability between the ball pads and the solder balls. The wafer level chip scale package provides a conductive pattern in each ball pad section, on which a solder ball is mounted, so as to have a spiral or mesh shape, provides a space defined by the conductive pattern such that a first dielectric layer under the conductive pattern is exposed, and provides the solder ball on a top surface of each ball pad section such that part of the solder ball is inserted into the space defined by the conductive pattern. When viewed from the top, the dielectric layer is exposed from each ball pad section by an area of about 50% or less.

Abstract translation: 提供了一种晶片级芯片级封装，其减小了球垫和焊球之间产生的寄生电容，并且增强了焊盘与焊球之间的接合可靠性。 晶片级芯片级封装在每个球垫区段中提供导电图案，其上安装有焊球，以便具有螺旋或网格形状，提供由导电图案限定的空间，使得在 导电图案被暴露，并且将焊球提供在每个球垫部分的顶表面上，使得焊球的一部分插入由导电图案限定的空间中。 当从顶部观察时，电介质层从每个球垫部分暴露约50％或更小的面积。

公开(公告)号：US07884487B2

公开(公告)日：2011-02-08

申请号：US11942483

申请日：2007-11-19

Applicant: Se-Young Yang ,  Wang-Ju Lee

Inventor： Se-Young Yang ,  Wang-Ju Lee

IPC: H01L23/48

CPC classification number: H05K3/325 ,  H01L23/49811 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/13 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13624 ,  H01L2224/13647 ,  H01L2224/16225 ,  H01L2224/17 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K3/3436 ,  H05K2201/10242 ,  H05K2201/10719 ,  H05K2203/127 ,  Y02P70/613 ,  H01L2924/0105 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Provided are a rotation joint capable of compensating for a mismatch due to thermal expansion and a semiconductor device having the same. The rotation joint can include a support member and a first contact member coupled to a first portion of the support member such that a surface of the first contact member is moveable relative to a surface of the support member adjacent to the first contact member. The first contact member can include solder material.

Abstract translation: 提供能够补偿由于热膨胀引起的失配的旋转接头和具有该失配的半导体器件。 旋转接头可以包括支撑构件和联接到支撑构件的第一部分的第一接触构件，使得第一接触构件的表面相对于邻近第一接触构件的支撑构件的表面可移动。 第一接触构件可以包括焊料材料。

公开(公告)号：US20080087995A1

公开(公告)日：2008-04-17

申请号：US11874107

申请日：2007-10-17

Applicant: Se-Young YANG ,  Wang-Ju LEE

Inventor： Se-Young YANG ,  Wang-Ju LEE

IPC: H01L23/495

CPC classification number: H01L23/4985 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L24/86 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/484 ,  H01L2224/85207 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/01005

Abstract: Provided are a semiconductor package and a manufacturing method thereof. The semiconductor package includes a flexible film with a film wire region formed of a film substrate region on which a semiconductor chip is mounted, and a plurality of sub film wires branching and extending from the film substrate region and electrically connected to the semiconductor chip. A plurality of external contact terminals arranged on the outer surface of the flexible film and electrically connected to the semiconductor chip is further included. Also included is a plurality of conductive patterns having first pads disposed in the flexible film, arranged on the film substrate region, and electrically connected to one of the plurality of external contact terminals; and second pads arranged on the film wire region and electrically connected to the semiconductor chip.

Abstract translation: 提供半导体封装及其制造方法。 半导体封装包括具有由其上安装有半导体芯片的薄膜基板区域形成的薄膜线区域的柔性薄膜和从薄膜基板区域分支并延伸并电连接到半导体芯片的多个子薄膜布线。 还包括布置在柔性膜的外表面上并电连接到半导体芯片的多个外部接触端子。 还包括多个导电图案，其具有布置在柔性膜中的第一焊盘，布置在膜基板区域上，并且电连接到多个外部接触端子中的一个; 以及布置在膜导线区域上并电连接到半导体芯片的第二焊盘。

公开(公告)号：US20080061436A1

公开(公告)日：2008-03-13

申请号：US11845718

申请日：2007-08-27

Applicant: Se-Young YANG ,  Wang-Ju LEE

Inventor： Se-Young YANG ,  Wang-Ju LEE

IPC: H01L23/488 ,  H01L21/44

CPC classification number: H01L24/12 ,  H01L23/3114 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/30105

Abstract: Provided is a wafer level chip scale package that reduces the parasitic capacitance generated between ball pads and the solder balls, and enhances the joint reliability between the ball pads and the solder balls. The wafer level chip scale package provides a conductive pattern in each ball pad section, on which a solder ball is mounted, so as to have a spiral or mesh shape, provides a space defined by the conductive pattern such that a first dielectric layer under the conductive pattern is exposed, and provides the solder ball on a top surface of each ball pad section such that part of the solder ball is inserted into the space defined by the conductive pattern. When viewed from the top, the dielectric layer is exposed from each ball pad section by an area of about 50% or less.

Abstract translation: 提供了一种晶片级芯片级封装，其减小了球垫和焊球之间产生的寄生电容，并且增强了焊盘与焊球之间的接合可靠性。 晶片级芯片级封装在每个球垫区段中提供导电图案，其上安装有焊球，以便具有螺旋或网格形状，提供由导电图案限定的空间，使得在 导电图案被暴露，并且将焊球提供在每个球垫部分的顶表面上，使得焊球的一部分插入由导电图案限定的空间中。 当从顶部观察时，电介质层从每个球垫部分暴露约50％或更小的面积。

公开(公告)号：US20080122108A1

公开(公告)日：2008-05-29

申请号：US11942483

申请日：2007-11-19

Applicant: Se-Young YANG ,  Wang-Ju LEE

Inventor： Se-Young YANG ,  Wang-Ju LEE

IPC: H01L23/48

CPC classification number: H05K3/325 ,  H01L23/49811 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/13 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13624 ,  H01L2224/13647 ,  H01L2224/16225 ,  H01L2224/17 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K3/3436 ,  H05K2201/10242 ,  H05K2201/10719 ,  H05K2203/127 ,  Y02P70/613 ,  H01L2924/0105 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Provided are a rotation joint capable of compensating for a mismatch due to thermal expansion and a semiconductor device having the same. The rotation joint can include a support member and a first contact member coupled to a first portion of the support member such that a surface of the first contact member is moveable relative to a surface of the support member adjacent to the first contact member. The first contact member can include solder material.

Abstract translation: 提供能够补偿由于热膨胀引起的失配的旋转接头和具有该失配的半导体器件。 旋转接头可以包括支撑构件和联接到支撑构件的第一部分的第一接触构件，使得第一接触构件的表面相对于邻近第一接触构件的支撑构件的表面可移动。 第一接触构件可以包括焊料材料。

公开(公告)号：US20070029674A1

公开(公告)日：2007-02-08

申请号：US11375760

申请日：2006-03-14

Applicant: Dong-Kil Shin ,  Se-Young Yang ,  Shin Kim ,  Wang-Ju Lee

Inventor： Dong-Kil Shin ,  Se-Young Yang ,  Shin Kim ,  Wang-Ju Lee

IPC: H01L23/48

CPC classification number: H01L23/49816 ,  H01L23/13 ,  H01L23/3157 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Provided is a board-on-chip package and stack package using the same to reduce the likelihood that bonding wires in an encapsulant may be damaged due to mechanical stresses applied during a package stacking process. A semiconductor package may have a spacer provided along the opposing sides of an encapsulant. The spacer may be spaced away from bonding wires embedded in the encapsulant. The height of the spacer may be greater than the height of the encapsulated bonding wire from the bottom surface of the semiconductor package. The spacer may be formed of a bar or a protrusion. In a stack package using the semiconductor package, the spacer may be provided between a semiconductor chip of a lower semiconductor package and an encapsulant of an upper semiconductor package.

Abstract translation: 提供了一种使用其的片上封装和堆叠封装，以减少由于在封装堆叠过程中施加的机械应力而使密封剂中的接合线可能被损坏的可能性。 半导体封装可以具有沿密封剂的相对侧设置的间隔件。 间隔件可以与嵌入密封剂中的接合线间隔开。 间隔件的高度可以大于封装的接合线从半导体封装的底表面的高度。 间隔件可以由杆或突起形成。 在使用半导体封装的堆叠封装中，间隔件可以设置在下半导体封装的半导体芯片和上半导体封装的封装件之间。