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公开(公告)号：US08039336B2
公开(公告)日：2011-10-18
申请号：US12915683
申请日：2010-10-29
IPC分类号： H01L21/8232
CPC分类号： H01L21/28273 , H01L21/76232 , H01L27/115 , H01L27/11521
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
摘要翻译： 一种方法包括以下步骤：将绝缘膜引入沟槽以提供沟槽隔离; 平坦化沟槽隔离以暴露钝化膜; 以及去除所述钝化膜并在第一硅层上沉积第二硅层和所述沟槽隔离; 并且在沉积第一硅层的步骤中，第一硅层是未掺杂的硅层，并且在沉积第二硅层的步骤中，第二硅层是掺杂硅层或随后具有引入杂质的未掺杂硅层，或 并且通过随后的热滞后热扩散到第一硅层中。
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公开(公告)号：US20110058426A1
公开(公告)日：2011-03-10
申请号：US12944358
申请日：2010-11-11
IPC分类号： G11C16/06
摘要： A sub-decoder element provided corresponding to each word line is constructed by the same conductive type MOS transistors. The sub-decoder elements are arranged in a plurality of columns such that the layout of active regions for forming the sub-decoder elements is inverted in a Y direction and displaced by one sub-decoder element in an X direction. The arrangement of the sub-decoder elements is adjusted such that high voltage is not applied to both of gate electrodes adjacent in the Y direction. A well voltage of a well region for forming the sub-decoder element group is set to a voltage level such that a source to substrate of the transistor of the sub-decoder element is set into a deep reversed-bias state. In a nonvolatile semiconductor memory device, the leakage by a parasitic MOS in a sub-decoder circuit or word line driving circuit to which a positive or negative high voltage is supplied, can be suppressed.
摘要翻译： 对应于每个字线提供的子解码器元件由相同的导电型MOS晶体管构成。 子解码器元件布置在多个列中，使得用于形成子解码器元件的有源区域的布局在Y方向上反转并且沿着X方向被一个子解码器元件移位。 调整副解码器元件的布置，使得高电压不施加到在Y方向上相邻的两个栅电极。 用于形成子解码器元件组的阱区的阱电压被设置为电压电平，使得子解码器元件的晶体管的源极到衬底被设置为深的反向偏置状态。 在非易失性半导体存储器件中，可以抑制在供给正或负高电压的子解码器电路或字线驱动电路中的寄生MOS的泄漏。
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公开(公告)号：US20100099234A1
公开(公告)日：2010-04-22
申请号：US12643646
申请日：2009-12-21
IPC分类号： H01L21/762
CPC分类号： H01L21/28273 , H01L21/76232 , H01L27/115 , H01L27/11521
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
摘要翻译： 一种方法包括以下步骤：将绝缘膜引入沟槽以提供沟槽隔离; 平坦化沟槽隔离以暴露钝化膜; 以及去除所述钝化膜并在第一硅层上沉积第二硅层和所述沟槽隔离; 并且在沉积第一硅层的步骤中，第一硅层是未掺杂的硅层，并且在沉积第二硅层的步骤中，第二硅层是掺杂硅层或随后具有引入杂质的未掺杂硅层，或 并且通过随后的热滞后热扩散到第一硅层中。
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公开(公告)号：US20080290453A1
公开(公告)日：2008-11-27
申请号：US12219402
申请日：2008-07-22
IPC分类号： H01L29/00
CPC分类号： H01L21/28273 , H01L21/76232 , H01L27/115 , H01L27/11521
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
摘要翻译： 一种方法包括以下步骤：将绝缘膜引入沟槽以提供沟槽隔离; 平坦化沟槽隔离以暴露钝化膜; 以及去除所述钝化膜并在第一硅层上沉积第二硅层和所述沟槽隔离; 并且在沉积第一硅层的步骤中，第一硅层是未掺杂的硅层，并且在沉积第二硅层的步骤中，第二硅层是掺杂硅层或随后具有引入杂质的未掺杂硅层，或 并且通过随后的热滞后热扩散到第一硅层中。
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5.发明授权Semiconductor producing apparatus, and wafer vacuum chucking device, gas cleaning method and nitride film forming method in semiconductor producing apparatus 失效半导体制造装置，晶片真空夹紧装置，半导体制造装置中的气体净化方法和氮化物膜形成方法
公开(公告)号：US5976260A
公开(公告)日：1999-11-02
申请号：US612445
申请日：1996-03-07
申请人： Yoshimi Kinoshita , Tomoyuki Kanda , Katsuhisa Kitano , Kazuo Yoshida , Hiroshi Ohnishi , Kenichiro Yamanishi , Shigeo Sasaki , Hideki Komori , Taizo Eshima , Kouichirou Tsutahara , Toshihiko Noguchi , Toru Takahama , Yoshihiko Kusakabe , Takeshi Iwamoto , Nobuyuki Kosaka
发明人： Yoshimi Kinoshita , Tomoyuki Kanda , Katsuhisa Kitano , Kazuo Yoshida , Hiroshi Ohnishi , Kenichiro Yamanishi , Shigeo Sasaki , Hideki Komori , Taizo Eshima , Kouichirou Tsutahara , Toshihiko Noguchi , Toru Takahama , Yoshihiko Kusakabe , Takeshi Iwamoto , Nobuyuki Kosaka
IPC分类号： B23Q3/08 , B25B11/00 , C23C16/34 , C23C16/44 , C23C16/455 , C23C16/458 , C23C16/48 , H01L21/683 , C23C16/00
CPC分类号： C23C16/34 , B25B11/005 , C23C16/4405 , C23C16/455 , C23C16/4583 , C23C16/481 , H01L21/6838 , Y10T279/11
摘要： It is an object of the present invention to obtain a vacuum chucking which can vacuum suck a wafer even if dusts attach thereon. The main body of vacuum chuck (101) has a plurality of block grooves (125) on the surface on which the wafer (1) is sucked and fixed, in which vacuum evacuation paths (105) each for vacuum evacuating each block groove (125) are provided for each block groove (125). When the wafer (1) is sucked and fixed under low pressure, even if the degree of vacuum in one of the block grooves (125) decreases due to attachment of dusts on part of the suction surface, or the like, the wafer (1) can surely be sucked and held.
摘要翻译： 本发明的目的是获得即使在其上附着有灰尘也能真空吸附晶片的真空吸盘。 真空吸盘（101）的主体在其上吸引和固定晶片（1）的表面上具有多个块状凹槽（125），其中各真空抽空路径（105）用于真空抽吸每个块状凹槽（125） ）被设置用于每个块槽（125）。 当晶片（1）在低压下被吸入和固定时，即使一个块状槽（125）中的一个真空度由于吸附表面的一部分上的灰尘等的附着而降低，晶片（1） ）肯定被吸住了。
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公开(公告)号：US5155340A
公开(公告)日：1992-10-13
申请号：US550976
申请日：1990-07-11
CPC分类号： H01J1/22 , H01J9/08 , H01J2201/2878
摘要： A thin high temperature heater includes an adhesive layer of Ti disposed an insulating substrate and a resistor layer of a Ti compound disposed the adhesive layer.
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公开(公告)号：US20120326246A1
公开(公告)日：2012-12-27
申请号：US13605995
申请日：2012-09-06
IPC分类号： H01L29/78
CPC分类号： H01L21/823412 , H01L21/28052 , H01L21/823468 , H01L21/823807 , H01L27/088 , H01L29/665 , H01L29/6653 , H01L29/7843
摘要： A semiconductor device capable of improving the driving power and a manufacturing method therefor are provided. In a semiconductor device, a gate structure formed by successively stacking a gate oxide film and a silicon layer is arranged over a semiconductor substrate. An oxide film is arranged long the lateral side of the gate structure and another oxide film is arranged along the lateral side of the oxide film and the upper surface of the substrate. In the side wall oxide film comprising these oxide films, the minimum value of the thickness of the first layer along the lateral side of the gate structure is less than the thickness of the second layer along the upper surface of the substrate.
摘要翻译： 提供了能够提高驱动能力的半导体装置及其制造方法。 在半导体器件中，通过连续堆叠栅极氧化膜和硅层形成的栅极结构布置在半导体衬底上。 在栅极结构的侧面设置氧化膜的长度较长，另一方的氧化膜沿着氧化膜的侧面和基板的上表面配置。 在包含这些氧化物膜的侧壁氧化物膜中，沿着栅极结构的横向侧的第一层的厚度的最小值小于沿着衬底的上表面的第二层的厚度。
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公开(公告)号：US08294186B2
公开(公告)日：2012-10-23
申请号：US13155279
申请日：2011-06-07
IPC分类号： H01L29/76
CPC分类号： H01L21/823412 , H01L21/28052 , H01L21/823468 , H01L21/823807 , H01L27/088 , H01L29/665 , H01L29/6653 , H01L29/7843
摘要： A semiconductor device capable of improving the driving power and a manufacturing method therefor are provided. In a semiconductor device, a gate structure formed by successively stacking a gate oxide film and a silicon layer is arranged over a semiconductor substrate. An oxide film is arranged long the lateral side of the gate structure and another oxide film is arranged along the lateral side of the oxide film and the upper surface of the substrate. In the side wall oxide film comprising these oxide films, the minimum value of the thickness of the first layer along the lateral side of the gate structure is less than the thickness of the second layer along the upper surface of the substrate.
摘要翻译： 提供了能够提高驱动能力的半导体装置及其制造方法。 在半导体器件中，通过连续堆叠栅极氧化膜和硅层形成的栅极结构布置在半导体衬底上。 在栅极结构的侧面设置氧化膜的长度较长，另一方的氧化膜沿着氧化膜的侧面和基板的上表面配置。 在包含这些氧化物膜的侧壁氧化物膜中，沿着栅极结构的横向侧的第一层的厚度的最小值小于沿着衬底的上表面的第二层的厚度。
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公开(公告)号：US08085598B2
公开(公告)日：2011-12-27
申请号：US12944358
申请日：2010-11-11
摘要： A sub-decoder element provided corresponding to each word line is constructed by the same conductive type MOS transistors. The sub-decoder elements are arranged in a plurality of columns such that the layout of active regions for forming the sub-decoder elements is inverted in a Y direction and displaced by one sub-decoder element in an X direction. The arrangement of the sub-decoder elements is adjusted such that high voltage is not applied to both of gate electrodes adjacent in the Y direction. A well voltage of a well region for forming the sub-decoder element group is set to a voltage level such that a source to substrate of the transistor of the sub-decoder element is set into a deep reversed-bias state. In a nonvolatile semiconductor memory device, the leakage by a parasitic MOS in a sub-decoder circuit or word line driving circuit to which a positive or negative high voltage is supplied, can be suppressed.
摘要翻译： 对应于每个字线提供的子解码器元件由相同的导电型MOS晶体管构成。 子解码器元件布置在多个列中，使得用于形成子解码器元件的有源区域的布局在Y方向上反转并且沿着X方向被一个子解码器元件移位。 调整副解码器元件的布置，使得高电压不施加到在Y方向上相邻的两个栅电极。 用于形成子解码器元件组的阱区的阱电压被设置为电压电平，使得子解码器元件的晶体管的源极到衬底被设置为深的反向偏置状态。 在非易失性半导体存储器件中，可以抑制在供给正或负高电压的子解码器电路或字线驱动电路中的寄生MOS的泄漏。
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公开(公告)号：US20110233626A1
公开(公告)日：2011-09-29
申请号：US13155279
申请日：2011-06-07
IPC分类号： H01L29/78
CPC分类号： H01L21/823412 , H01L21/28052 , H01L21/823468 , H01L21/823807 , H01L27/088 , H01L29/665 , H01L29/6653 , H01L29/7843
摘要： A semiconductor device capable of improving the driving power and a manufacturing method therefor are provided. In a semiconductor device, a gate structure formed by successively stacking a gate oxide film and a silicon layer is arranged over a semiconductor substrate. An oxide film is arranged long the lateral side of the gate structure and another oxide film is arranged along the lateral side of the oxide film and the upper surface of the substrate. In the side wall oxide film comprising these oxide films, the minimum value of the thickness of the first layer along the lateral side of the gate structure is less than the thickness of the second layer along the upper surface of the substrate.
摘要翻译： 提供了能够提高驱动能力的半导体装置及其制造方法。 在半导体器件中，通过连续堆叠栅极氧化膜和硅层形成的栅极结构布置在半导体衬底上。 在栅极结构的侧面设置氧化膜的长度较长，另一方的氧化膜沿着氧化膜的侧面和基板的上表面配置。 在包含这些氧化物膜的侧壁氧化物膜中，沿着栅极结构的横向侧的第一层的厚度的最小值小于沿着衬底的上表面的第二层的厚度。
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