公开(公告)号：US20210090965A1

公开(公告)日：2021-03-25

申请号：US16578088

申请日：2019-09-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Hua CHEN ,  Hsu-Chiang SHIH ,  Cheng-Yuan KUNG ,  Hung-Yi LIN

IPC: H01L23/28 ,  H01L21/56 ,  H01L23/66 ,  H01Q1/22

Abstract: A semiconductor package structure includes a substrate, a die electrically connected to the substrate, and a first encapsulant. The die has a front surface and a back surface opposite to the front surface. The first encapsulant is disposed between the substrate and the front surface of the die. The first encapsulant contacts the front surface of the die and the substrate.

公开(公告)号：US20220359425A1

公开(公告)日：2022-11-10

申请号：US17752795

申请日：2022-05-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Chiang SHIH ,  Hung-Yi LIN ,  Meng-Wei HSIEH ,  Yu Sheng CHANG ,  Hsiu-Chi LIU ,  Mark GERBER

IPC: H01L23/00 ,  H01L23/48 ,  H01L21/56 ,  H01L23/528

Abstract: A semiconductor device package includes an electronic component, an electrical contact and a reinforcement layer. The electronic component has a first conductive layer on a first surface of the electronic component. The electronic component has a through-silicon-via (TSV) penetrating the electronic component and electrically connected to the first conductive layer. The electrical contact is disposed on the first surface of the electronic component and electrically connected to the first conductive layer. The reinforcement layer is disposed on the first surface of the electronic component.

公开(公告)号：US20230215816A1

公开(公告)日：2023-07-06

申请号：US17566575

申请日：2021-12-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Cheng-Yuan KUNG ,  Hsu-Chiang SHIH ,  Hung-Yi LIN ,  Chien-Mei HUANG

IPC: H01L23/00 ,  H01L23/498 ,  H01L25/065 ,  H01L23/538

CPC classification number: H01L23/562 ,  H01L23/5383 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/16227 ,  H01L2924/1511 ,  H01L2924/3512

Abstract: A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.

公开(公告)号：US20210265280A1

公开(公告)日：2021-08-26

申请号：US16798170

申请日：2020-02-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Chiang SHIH ,  Hung-Yi LIN ,  Meng-Wei HSIEH ,  Yu Sheng CHANG ,  Hsiu-Chi LIU ,  Mark GERBER

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/528 ,  H01L21/56

Abstract: A semiconductor device package includes an electronic component, an electrical contact and a reinforcement layer. The electronic component has a first conductive layer on a first surface of the electronic component. The electronic component has a through-silicon-via (TSV) penetrating the electronic component and electrically connected to the first conductive layer. The electrical contact is disposed on the first surface of the electronic component and electrically connected to the first conductive layer. The reinforcement layer is disposed on the first surface of the electronic component.

公开(公告)号：US20230420395A1

公开(公告)日：2023-12-28

申请号：US17846649

申请日：2022-06-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Cheng LIN ,  Hung-Yi LIN ,  Cheng-Yuan KUNG ,  Hsu-Chiang SHIH ,  Cheng-Yu HO

IPC: H01L23/66 ,  H01L23/367 ,  H01L23/48 ,  H01L23/538 ,  H01L21/48

CPC classification number: H01L23/66 ,  H01L23/367 ,  H01L23/481 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L2223/6677

Abstract: The present disclosure provides an electronic device. The electronic device includes a first electronic component and a second electronic component. The first electronic component is configured to receive a radio frequency (RF) signal and amplify a power of the RF signal. The second electronic component is disposed under the first electronic component. The second electronic component includes an interconnection structure passing through the second electronic component. The interconnection structure is configured to provide a path for a transmission of the RF signal.

公开(公告)号：US20180358290A1

公开(公告)日：2018-12-13

申请号：US15618084

申请日：2017-06-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Hua CHEN ,  Ming-Hung CHEN ,  Hsu-Chiang SHIH

IPC: H01L23/498 ,  H01L21/48 ,  H05K1/16 ,  H01L23/538

CPC classification number: H01L23/49827 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5389 ,  H05K1/162

Abstract: A semiconductor device package includes a substrate, a first insulation layer, a support film and an interconnection structure. The substrate has a first sidewall, a first surface and a second surface opposite to the first surface. The first insulation layer is on the first surface of the substrate and has a second sidewall. The first insulation layer has a first surface and a second surface adjacent to the substrate and opposite to the first surface of the first insulation layer. The support film is on the second surface of the substrate and has a third sidewall. The support film has a first surface adjacent to the substrate and a second surface opposite to the first surface of the support film. The interconnection structure extends from the first surface of the first insulation layer to the second surface of the support film via the first insulation layer and the support film. The interconnection structure covers the first, second and third sidewalls.

公开(公告)号：US20240215151A1

公开(公告)日：2024-06-27

申请号：US18086579

申请日：2022-12-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Chiang SHIH ,  Cheng-Yuan KUNG ,  Hung-Yi LIN ,  Meng-Wei HSIEH ,  Chien-Mei HUANG ,  I-Ting LIN ,  Sheng-Wen YANG

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0271 ,  H05K1/0298 ,  H05K1/115 ,  H05K2201/09827

Abstract: The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a first redistribution structure and a first encapsulant. The first encapsulant supports the first redistribution structure and is configured to function as a first reinforcement to provide a second redistribution structure. The redistribution structure has a plurality of conductive layers disposed over the first redistribution structure.

公开(公告)号：US20230215822A1

公开(公告)日：2023-07-06

申请号：US17566569

申请日：2021-12-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Meng-Wei HSIEH ,  Hung-Yi LIN ,  Hsu-Chiang SHIH ,  Cheng-Yuan KUNG

IPC: H01L23/66 ,  H01L25/18 ,  H01L23/498 ,  H01L23/367 ,  H01L23/31 ,  H03F3/04

CPC classification number: H01L23/66 ,  H01L25/18 ,  H01L23/49811 ,  H01L23/367 ,  H01L23/3107 ,  H03F3/04 ,  H01L2223/6655

Abstract: An electronic package is provided. The electronic package includes an amplifier component, a control component, and a first circuit layer. The control component is disposed above the amplifier component. The first circuit layer is disposed between the amplifier component and the control component. The control component is configured to transmit a first signal to the amplifier component and to output a second signal amplified by the amplifier component.

公开(公告)号：US20170018550A1

公开(公告)日：2017-01-19

申请号：US14801730

申请日：2015-07-16

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Hsu-Chiang SHIH ,  Sheng-Chi HSIEH ,  Chien-Hua CHEN ,  Teck-Chong LEE

IPC: H01L27/08 ,  H01L23/48 ,  H01L49/02

CPC classification number: H01L27/0805 ,  H01G4/30 ,  H01L23/481 ,  H01L27/101 ,  H01L28/60 ,  H01L2224/18

Abstract: A semiconductor device and a method for manufacturing the same is described. The semiconductor device includes a substrate, a first capacitor and a second capacitor. The first capacitor includes a first conductive layer, a first insulating layer and a second conductive layer. The first conductive layer is disposed on the substrate. The first insulating layer is disposed on the first conductive layer and has a first peripheral edge. The second conductive layer is disposed on the first insulating layer and has a second peripheral edge. The second capacitor includes a third conductive layer, a second insulating layer and the second conductive layer. The second insulating layer is disposed on the second conductive layer and has a third peripheral edge. The third conductive layer is disposed on the second insulating layer and has a fourth peripheral edge. The first, second, third and fourth peripheral edges are aligned with one another.

Abstract translation: 对半导体装置及其制造方法进行说明。 半导体器件包括衬底，第一电容器和第二电容器。 第一电容器包括第一导电层，第一绝缘层和第二导电层。 第一导电层设置在基板上。 第一绝缘层设置在第一导电层上并具有第一周边边缘。 第二导电层设置在第一绝缘层上并具有第二周边。 第二电容器包括第三导电层，第二绝缘层和第二导电层。 第二绝缘层设置在第二导电层上并具有第三外围边缘。 第三导电层设置在第二绝缘层上并具有第四周边。 第一，第二，第三和第四外围边缘彼此对准。