公开(公告)号：US20140273516A1

公开(公告)日：2014-09-18

申请号：US14173538

申请日：2014-02-05

Applicant: Applied Materials, Inc.

Inventor： Li-Qun XIA ,  Weifeng YE ,  Xiaojun ZHANG ,  Mei-yee SHEK ,  Mihaela BALSEANU ,  Victor NGUYEN ,  Derek R. WITTY

IPC: H01L21/768

CPC classification number: H01L21/76826 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834

Abstract: Methods for the repair of damaged low k films are provided. In one embodiment, the method comprises providing a substrate having a low k dielectric film deposited thereon, and exposing a surface of the low k dielectric film to an activated carbon-containing precursor gas to form a conformal carbon-containing film on the surface of the low k dielectric film, wherein the carbon-containing precursor gas has at least one or more Si—N—Si linkages in the molecular structure.

Abstract translation: 提供修复损坏的低k膜的方法。 在一个实施例中，该方法包括提供其上沉积有低k电介质膜的基底，并将低k电介质膜的表面暴露于含活性炭的前体气体，以在该表面上形成共形含碳膜 低k电介质膜，其中含碳前体气体在分子结构中具有至少一个或多个Si-N-Si键。

公开(公告)号：US20160013049A1

公开(公告)日：2016-01-14

申请号：US14770641

申请日：2014-02-18

Applicant: APPLIED MATERIALS, INC.

Inventor： Weifeng YE ,  Mei-yee SHEK ,  Mihaela BALSEANU ,  Xiaojun ZHANG ,  Xiaolan BA ,  Yu JIN ,  Li-Qun XIA

IPC: H01L21/02

CPC classification number: H01L21/02274 ,  C23C16/345 ,  C23C16/56 ,  H01L21/02167 ,  H01L21/02211 ,  H01L21/02219 ,  H01L21/76825 ,  H01L21/76834

Abstract: Embodiments of the present invention generally relate to a method for forming a dielectric barrier layer. The dielectric barrier layer is deposited over a substrate by a plasma enhanced deposition process. In one embodiment, a gas mixture is introduced into a processing chamber. The gas mixture includes a silicon-containing gas, a nitrogen-containing gas, a boron-containing gas, and argon (Ar) gas.

Abstract translation: 本发明的实施方案一般涉及形成电介质阻挡层的方法。 电介质阻挡层通过等离子体增强沉积工艺沉积在衬底上。 在一个实施例中，将气体混合物引入处理室。 气体混合物包括含硅气体，含氮气体，含硼气体和氩气（Ar）。

公开(公告)号：US20150299856A1

公开(公告)日：2015-10-22

申请号：US14625846

申请日：2015-02-19

Applicant: Applied Materials, Inc.

Inventor： Ning LI ,  Wenbo YAN ,  Victor NGUYEN ,  Cong TRINH ,  Mihaela BALSEANU ,  Li-Qun XIA

IPC: C23C16/455 ,  H01L21/3065

CPC classification number: C23C16/45534 ,  C23C16/045 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/3065

Abstract: Embodiments disclosed herein generally relate to the processing of substrates, and more particularly, relate to methods for accurate control of film thickness using deposition-etch cycles. Particularly, embodiments of the present disclosure may be used in controlling film thickness during filling high aspect ratio features.

Abstract translation: 本文公开的实施例通常涉及衬底的处理，更具体地涉及使用沉积蚀刻循环来精确控制膜厚度的方法。 特别地，本公开的实施例可以用于在填充高纵横比特征期间控制膜厚度。

公开(公告)号：US20150252477A1

公开(公告)日：2015-09-10

申请号：US14616206

申请日：2015-02-06

Applicant: Applied Materials, Inc.

Inventor： Victor NGUYEN ,  Mihaela BALSEANU ,  Ning LI ,  Steven D. MARCUS ,  Mark SALY ,  David THOMPSON ,  Li-Qun XIA

IPC: C23C16/455 ,  C23C16/458 ,  C23C16/34 ,  C23C16/24 ,  C23C16/50

CPC classification number: C23C16/45525 ,  C23C16/24 ,  C23C16/30 ,  C23C16/345 ,  C23C16/347 ,  C23C16/36 ,  C23C16/45531 ,  C23C16/45542 ,  C23C16/45551 ,  C23C16/458 ,  C23C16/50

Abstract: Embodiments disclosed herein generally relate to the processing of substrates, and more particularly, relate to methods for forming a dielectric film. In one embodiment, the method includes placing a plurality of substrates inside a processing chamber and performing a sequence of exposing the substrates to a first reactive gas comprising silicon, and then exposing the substrates to a plasma of a second reactive gas comprising nitrogen and at least one of oxygen or carbon, and repeating the sequence to form the dielectric film comprising silicon carbon nitride or silicon carbon oxynitride on each of the substrates.

Abstract translation: 本文公开的实施方案通常涉及衬底的处理，更具体地涉及形成电介质膜的方法。 在一个实施例中，该方法包括将多个基板放置在处理室内并执行将基板暴露于包含硅的第一反应气体的顺序，然后将基板暴露于包含氮气的至少第二反应气体的等离子体 一个氧或碳，并且重复该顺序以在每个基板上形成包含氮化碳或氮氧化硅的电介质膜。

公开(公告)号：US20190311896A1

公开(公告)日：2019-10-10

申请号：US16354654

申请日：2019-03-15

Applicant: Applied Materials, Inc.

Inventor： Mihaela BALSEANU ,  Srinivas D. NEMANI ,  Mei-Yee SHEK ,  Ellie Y. YIEH

IPC: H01L21/02 ,  H01L29/66 ,  C23C16/455 ,  C23C16/46 ,  C23C16/34 ,  C23C16/36

Abstract: A method for forming a thermally stable spacer layer is disclosed. The method includes first disposing a substrate in an internal volume of a processing chamber. The substrate has a film formed thereon, the film including silicon, carbon, nitrogen, and hydrogen. Next, high pressure steam is introduced into the processing chamber. The film is exposed to the high pressure steam to convert the film to reacted film, the reacted film including silicon, carbon, oxygen, and hydrogen.

公开(公告)号：US20150255507A1

公开(公告)日：2015-09-10

申请号：US14201439

申请日：2014-03-07

Applicant: Applied Materials, Inc.

Inventor： Mahendra PAKALA ,  Mihaela BALSEANU ,  Jonathan GERMAIN ,  Jaesoo AHN ,  Lin XUE

IPC: H01L27/22 ,  H01L43/12 ,  H01L43/02

CPC classification number: H01L43/12 ,  H01L27/222 ,  H01L43/08

Abstract: A method for fabricating an MRAM bit that includes depositing a spacer layer that protects the tunneling barrier layer during processing is disclosed. The deposited spacer layer prevents byproducts formed in later processing from redepositing on the tunneling barrier layer. Such redeposition may lead to product failure and decreased manufacturing yield. The method further includes non-corrosive processing conditions that prevent damage to the layers of MRAM bits. The non-corrosive processing conditions may include etching without using a halogen-based plasma. Embodiments disclosed herein use an etch-deposition-etch sequence that simplifies processing.

Abstract translation: 公开了一种用于制造MRAM位的方法，其包括在处理期间沉积保护隧道势垒层的间隔层。 沉积的间隔层防止在后续处理中形成的副产物再沉积在隧道势垒层上。 这种再沉积可能导致产品失效并降低了制造成品率。 该方法还包括防腐损坏处理条件，以防损坏MRAM位的层。 非腐蚀性处理条件可以包括不使用卤素等离子体的蚀刻。 本文公开的实施例使用简化处理的蚀刻 - 沉积蚀刻序列。

公开(公告)号：US20150255324A1

公开(公告)日：2015-09-10

申请号：US14630757

申请日：2015-02-25

Applicant: Applied Materials, Inc.

Inventor： Ning LI ,  Victor NGUYEN ,  Mihaela BALSEANU ,  Li-Qun XIA ,  Steven D. MARCUS ,  Haichun YANG ,  Keiichi TANAKA

IPC: H01L21/762 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L21/76224 ,  C23C16/045 ,  C23C16/345 ,  C23C16/402 ,  C23C16/45551 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31116

Abstract: Embodiments disclosed herein generally relate to forming dielectric materials in high aspect ratio features. In one embodiment, a method for filling high aspect ratio trenches in one processing chamber is disclosed. The method includes placing a substrate inside a processing chamber, where the substrate has a surface having a plurality of high aspect ratio trenches and the surface is facing a gas/plasma distribution assembly. The method further includes performing a sequence of depositing a layer of dielectric material on the surface of the substrate and inside each of the plurality of trenches, where the layer of dielectric material is on a bottom and side walls of each trench, and removing a portion of the layer of dielectric material disposed on the surface of the substrate, where an opening of each trench is widened. The sequence repeats until the trenches are filled seamlessly with the dielectric material.

Abstract translation: 本文公开的实施方案通常涉及以高纵横比特征形成介电材料。 在一个实施例中，公开了一种用于在一个处理室中填充高纵横比沟槽的方法。 该方法包括将衬底放置在处理室内，其中衬底具有多个高纵横比沟槽的表面，并且该表面面向气体/等离子体分布组件。 该方法还包括执行在衬底的表面上以及多个沟槽的每一个内部沉积介电材料层的顺序，其中介电材料层位于每个沟槽的底部和侧壁上，并且移除部分 设置在基板的表面上的介电材料层，其中每个沟槽的开口被加宽。 该序列重复直到沟槽与电介质材料无缝填充。