公开(公告)号：US12198936B2

公开(公告)日：2025-01-14

申请号：US18242082

申请日：2023-09-05

Applicant: Applied Materials, Inc.

Inventor： Huiyuan Wang ,  Susmit Singha Roy ,  Takehito Koshizawa ,  Bo Qi ,  Abhijit Basu Mallick

IPC: H01L21/311 ,  C23C16/40 ,  C23C16/455 ,  C23C16/56 ,  H01L21/02 ,  H01L21/306 ,  H01L21/762 ,  H01L21/768

Abstract: Methods for forming defect-free gap fill materials comprising germanium oxide are disclosed. In some embodiments, the gap fill material is deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the gap fill material. A process for removal of germanium oxide is also disclosed.

公开(公告)号：US20240234531A1

公开(公告)日：2024-07-11

申请号：US18538273

申请日：2023-12-13

Applicant: Applied Materials, Inc.

Inventor： Sai Hooi Yeong ,  Liu Jiang ,  Susmit Singha Roy ,  Abhijit Basu Mallick ,  Benjamin Colombeau ,  El Mehdi Bazizi ,  Balasubramanian Pranatharthiharan

IPC: H01L29/423 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/42392 ,  H01L21/823807 ,  H01L21/823864 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/78696

Abstract: Semiconductor devices (e.g., gate-all-around (GAA) devices), process tools for manufacturing GAA devices and methods of manufacturing GAA devices, and inner spacer liners and inner spacers for GAA devices, are described. The methods comprise performing a chemical vapor deposition (CVD) process to form an amorphous silicon liner and an inner spacer within a superlattice structure formed on a top surface of a semiconductor substrate. The superlattice structure has a plurality of semiconductor material layers (e.g., silicon germanium (SiGe)) and a corresponding plurality of channel layers (e.g., silicon (Si)). The amorphous silicon liner is conformally formed along the GAA device, including along the recessed semiconductor material layers and the corresponding plurality of channel layers, and the inner spacer is formed directly on the amorphous silicon liner. One or more operations of the methods described herein are performed in situ in an integrated processing tool system.

公开(公告)号：US20240194526A1

公开(公告)日：2024-06-13

申请号：US18581598

申请日：2024-02-20

Applicant: Applied Materials, Inc.

Inventor： Srinivas Gandikota ,  Steven C.H. Hung ,  Srinivas D. Nemani ,  Yixiong Yang ,  Susmit Singha Roy ,  Nikolaos Bekiaris

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76864 ,  H01L21/76898 ,  H01L23/481

Abstract: A method of forming an electronic device is disclosed. The method comprises forming depositing a metal on a substrate, the metal comprising one or more of copper (Cu), titanium (Ti), or tantalum (Ta). A metal cap is deposited on the metal. The metal cap comprises one or more of molybdenum (Mo), ruthenium (Ru), iridium (Ir), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), platinum (Pt), or gold (Au). The substrate is then exposed to an anneal process, e.g., a hydrogen high-pressure anneal. The formation of the metal cap on the metal minimizes parasitic adsorption of hydrogen by the underlying metal.

公开(公告)号：US20240183035A1

公开(公告)日：2024-06-06

申请号：US17991931

申请日：2022-11-22

Applicant: Applied Materials, Inc. ,  National University of Singapore

Inventor： Xinke Wang ,  Zeqing Shen ,  Susmit Singha Roy ,  Abhijit Basu Mallick ,  Bhaskar Jyoti Bhuyan ,  Jiecong Tang ,  John Sudijono ,  Long Liu

IPC: C23C16/455 ,  C23C16/02 ,  C23C16/04

CPC classification number: C23C16/45553 ,  C23C16/0272 ,  C23C16/045

Abstract: Methods of selectively depositing a selectively deposited layer are described. Exemplary processing methods may include treating a substrate comprising a non-hydroxyl-containing surface and a second surface with one or more of ozone, hydrogen peroxide, or a hydrogen plasma to passivate the second surface. In one or more embodiments, a selectively deposited layer is then selectively deposited on the non-hydroxyl-containing surface and not on the second surface by flowing a first precursor over the substrate to form a first portion of an initial carbon-containing film on the non-hydroxyl-containing surface and not on the second surface. The methods may include removing a first precursor effluent from the substrate. A second precursor may then be flowed over the substrate to react with the first portion of the initial selectively deposited layer. The methods may include removing a second precursor effluent from the substrate.

公开(公告)号：US11886120B2

公开(公告)日：2024-01-30

申请号：US17356304

申请日：2021-06-23

Applicant: Applied Materials, Inc

Inventor： Lakmal Charidu Kalutarage ,  Mark Joseph Saly ,  Bhaskar Jyoti Bhuyan ,  Thomas Joseph Knisley ,  Kelvin Chan ,  Regina Germanie Freed ,  David Michael Thompson ,  Susmit Singha Roy ,  Madhur Sachan

IPC: G03F7/16 ,  G03F7/004 ,  C23C16/50 ,  C23C16/455 ,  C23C16/40 ,  H01L21/027

CPC classification number: G03F7/167 ,  C23C16/40 ,  C23C16/45536 ,  C23C16/45553 ,  C23C16/50 ,  G03F7/0043 ,  G03F7/168 ,  H01L21/0274

Abstract: Embodiments disclosed herein include methods of depositing a metal oxo photoresist using dry deposition processes. In an embodiment, the method comprises forming a first metal oxo film on the substrate with a first vapor phase process including a first metal precursor vapor and a first oxidant vapor, and forming a second metal oxo film over the first metal oxo film with a second vapor phase process including a second metal precursor vapor and a second oxidant vapor.

公开(公告)号：US20240027912A1

公开(公告)日：2024-01-25

申请号：US17872370

申请日：2022-07-25

Applicant: Applied Materials, Inc.

Inventor： Xinke Wang ,  Zeqing Shen ,  Susmit Singha Roy ,  Abhijit Basu Mallick ,  Bhaskar Jyoti Bhuyan ,  Jiecong Tang ,  John Sudijono ,  Mark Saly

IPC: G03F7/40 ,  G03F7/34

CPC classification number: G03F7/40 ,  G03F7/346

Abstract: Methods of depositing a conformal carbon-containing film on an EUV photoresist to reduce line edge roughness (LER) are described. Exemplary processing methods may include flowing a first precursor over a patterned EUV surface to form a first portion of an initial carbon-containing film on the structure. The methods may include removing a first precursor effluent from the patterned EUV photoresist. A second precursor may then be flowed over the patterned EUV photoresist to react with the first portion of the initial carbon-containing film. The methods may include removing a second precursor effluent from the patterned EUV photoresist. The methods may include etching the substrate to remove a portion of the carbon-containing film and expose a top surface of the patterned surface and expose the substrate between the patterned surfaces.

公开(公告)号：US20230360967A1

公开(公告)日：2023-11-09

申请号：US17739856

申请日：2022-05-09

Applicant: Applied Materials, Inc.

Inventor： Chandan Das ,  Susmit Singha Roy ,  Supriya Ghosh ,  John Sudijono ,  Abhijit Basu Mallick ,  Jiecong Tang

IPC: H01L21/768 ,  H01L27/11556 ,  H01L27/11582

CPC classification number: H01L21/76843 ,  H01L21/76877 ,  H01L27/11556 ,  H01L27/11582

Abstract: Transition metal dichalcogenide films and methods for depositing transition metal dichalcogenide films on a substrate are described. Methods for converting transition metal oxide films to transition metal dichalcogenide films are also described. The substrate is exposed to a metal precursor and an oxidant to form a transition metal oxide film; the transition metal oxide film is exposed to a chalcogenide precursor to form the transition metal dichalcogenide film.

公开(公告)号：US20230335391A1

公开(公告)日：2023-10-19

申请号：US17722648

申请日：2022-04-18

Applicant: Applied Materials, Inc.

Inventor： Xinke Wang ,  Bhaskar Jyoti Bhuyan ,  Zeqing Shen ,  Susmit Singha Roy ,  Abhijit Basu Mallik ,  Jiecong Tang ,  John Sudijono ,  Mark Saly

IPC: H01L21/02 ,  C23C16/56 ,  C23C16/04 ,  C23C16/26

CPC classification number: H01L21/02118 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02205 ,  C23C16/56 ,  C23C16/04 ,  C23C16/26

Abstract: Methods of selectively depositing a carbon-containing layer are described. Exemplary processing methods may include flowing a first precursor over a substrate comprising a metal surface and a non-metal surface to form a first portion of an initial carbon-containing film on the metal surface. The methods may include removing a first precursor effluent from the substrate. A second precursor may then be flowed over the substrate to react with the first portion of the initial carbon-containing layer. The methods may include removing a second precursor effluent from the substrate. The methods may include pre-treating the metal surface of the substrate to form a metal oxide surface on the metal surface.

公开(公告)号：US11791155B2

公开(公告)日：2023-10-17

申请号：US17004262

申请日：2020-08-27

Applicant: Applied Materials, Inc.

Inventor： Huiyuan Wang ,  Susmit Singha Roy ,  Takehito Koshizawa ,  Bo Qi ,  Abhijit Basu Mallick ,  Nitin K. Ingle

IPC: H01L21/02 ,  H01L29/16

CPC classification number: H01L21/02304 ,  H01L21/02236 ,  H01L21/02362 ,  H01L21/02532 ,  H01L29/16

Abstract: Examples of the present technology include semiconductor processing methods to form diffusion barriers for germanium in a semiconductor structure. The methods may include forming a semiconductor layer stack from pairs of Si-and-SiGe layers. The Si-and-SiGe layer pairs may be formed by forming a silicon layer, and then forming the germanium barrier layer of the silicon layer. In some embodiments, the germanium-barrier layer may be less than or about 20 Å. A silicon-germanium layer may be formed on the germanium-barrier layer to complete the formation of the Si-and-SiGe layer pair. In some embodiments, the silicon layer may be an amorphous silicon layer, and the SiGe layer may be characterized by greater than or about 5 atom % germanium. Examples of the present technology also include semiconductor structures that include a silicon-germanium layer, a germanium-barrier layer, and a silicon layer.

公开(公告)号：US20230059788A1

公开(公告)日：2023-02-23

申请号：US17407553

申请日：2021-08-20

Applicant: Applied Materials, Inc.

Inventor： Bhaskar Jyoti Bhuyan ,  Zeqing Shen ,  Susmit Singha Roy ,  Abhijit Basu Mallick

IPC: H01L21/02 ,  H01L21/311

Abstract: Exemplary methods of semiconductor processing may include etching one or more features partially through a dielectric material to expose material from one or more layer pairs formed on a substrate. The methods may include halting the etching prior to penetrating fully through the dielectric material, and prior to exposing material from all layer pairs formed on the substrate. The methods may include forming a layer of carbon-containing material on the exposed material from each of the one or more layer pairs having exposed material. The methods may include etching the one or more features fully through the dielectric material to expose material for each remaining layer pair formed on the substrate.