Light emitting device packages, light emitting diode (LED) packages and related methods
    1.
    发明申请
    Light emitting device packages, light emitting diode (LED) packages and related methods 有权
    发光器件封装,发光二极管(LED)封装及相关方法

    公开(公告)号:US20080054286A1

    公开(公告)日:2008-03-06

    申请号:US11895795

    申请日:2007-08-27

    IPC分类号: H01L33/00 H01L21/00

    摘要: Light emitting device packages, light emitting diode (LED) packages and related methods are disclosed. According to one aspect, a light emitting device package is provided. The package includes a mounting pad adapted for attachment of a light emitting device. A lens coupler is attached to the mounting pad and defines an opening for containing the light emitting device and a quantity of encapsulant. The lens coupler includes a surface defining a depression which comprises at least one edge that shapes an outer surface of the encapsulant.

    摘要翻译: 公开了发光器件封装,发光二极管(LED)封装和相关方法。 根据一个方面,提供一种发光器件封装。 该包装包括适于附接发光装置的安装垫。 透镜耦合器附接到安装焊盘并且限定用于容纳发光器件的开口和一定数量的密封剂。 透镜耦合器包括限定凹陷的表面,其包括形成密封剂的外表面的至少一个边缘。

    Methods and apparatus for directing light emitting diode output light
    2.
    发明申请
    Methods and apparatus for directing light emitting diode output light 有权
    用于引导发光二极管输出光的方法和装置

    公开(公告)号:US20070274667A1

    公开(公告)日:2007-11-29

    申请号:US11431304

    申请日:2006-05-10

    IPC分类号: G02B6/10

    摘要: Sideways emission enhancements are described for light emitting diode (LED) lighting solutions having a wide variety of applications. While a typical LED lighting device has a substantial portion of its light emitted near a normal to the semiconductor photonic chip emitting the light, the present approach may suitable provide a compact, easily manufacturable device with good thermal design characteristics and a changed emission pattern without changing the horizontal mounting plane of the semiconductor photonic chip.

    摘要翻译: 针对具有各种应用的发光二极管(LED)照明解决方案描述了侧向发射增强。 虽然典型的LED照明装置的光的大部分发射在发射光的半导体光子芯片的正常附近,但是本方法可以适合提供具有良好的热设计特性和改变的发射图案的紧凑的,易于制造的装置,而不改变 半导体光子芯片的水平安装平面。

    Submounts for semiconductor light emitting device packages and semiconductor light emitting device packages including the same
    3.
    发明申请
    Submounts for semiconductor light emitting device packages and semiconductor light emitting device packages including the same 有权
    用于半导体发光器件封装的底座以及包括其的半导体发光器件封装

    公开(公告)号:US20070253209A1

    公开(公告)日:2007-11-01

    申请号:US11412381

    申请日:2006-04-27

    IPC分类号: B60Q1/124

    摘要: A submount for a solid state lighting package includes a support member having upper and lower surfaces, a first side surface, and a second side surface opposite the first side surface, a first electrical bondpad on the upper surface of the support member and having a first bonding region proximate the first side surface of the support member and a second bonding region extending toward the second side surface of the support member, and a second electrical bondpad on the upper surface of the support member having a die mounting region proximate the first side surface of the support member and an extension region extending toward the second side surface of the support member. The die mounting region of the second electrical bondpad may be configured to receive an electronic device. The submount further includes a third electrical bondpad on the upper surface of the support member and positioned between the second side surface of the support member and the die mounting region of the second electrical bondpad.

    摘要翻译: 一种用于固体照明包装的基座,包括具有上表面和下表面的支撑构件,第一侧表面和与第一侧表面相对的第二侧表面,位于支撑构件的上表面上的第一电接合垫, 接合区域靠近支撑构件的第一侧表面,以及第二接合区域,其朝着支撑构件的第二侧表面延伸,并且在支撑构件的上表面上的第二电接合板具有靠近第一侧表面的模具安装区域 并且延伸到所述支撑构件的第二侧表面的延伸区域。 第二电接合板的管芯安装区域可以被配置为接收电子设备。 底座还包括位于支撑构件的上表面上并位于支撑构件的第二侧表面和第二电接合垫的模具安装区域之间的第三电接合板。

    Methods and apparatus for directing light emitting diode output light
    6.
    发明授权
    Methods and apparatus for directing light emitting diode output light 有权
    用于引导发光二极管输出光的方法和装置

    公开(公告)号:US07805048B2

    公开(公告)日:2010-09-28

    申请号:US11431304

    申请日:2006-05-10

    IPC分类号: G02B6/10

    摘要: Sideways emission enhancements are described for light emitting diode (LED) lighting solutions having a wide variety of applications. While a typical LED lighting device has a substantial portion of its light emitted near a normal to the semiconductor photonic chip emitting the light, the present approach may suitable provide a compact, easily manufacturable device with good thermal design characteristics and a changed emission pattern without changing the horizontal mounting plane of the semiconductor photonic chip.

    摘要翻译: 针对具有各种应用的发光二极管(LED)照明解决方案描述了侧向发射增强。 虽然典型的LED照明装置的光的大部分发射在发射光的半导体光子芯片的正常附近,但是本方法可以适合提供具有良好的热设计特性和改变的发射图案的紧凑的,易于制造的装置,而不改变 半导体光子芯片的水平安装平面。

    Method of passivating oxide/compound semiconductor interface
    7.
    发明申请
    Method of passivating oxide/compound semiconductor interface 有权
    钝化氧化物/化合物半导体界面的方法

    公开(公告)号:US20060003595A1

    公开(公告)日:2006-01-05

    申请号:US10882482

    申请日:2004-06-30

    CPC分类号: H01L21/3105 H01L21/28264

    摘要: The present invention provides a method of passivating an oxide compound disposed on a III-V semiconductor substrate. The method is intended for use with dielectric stacks, gallate compounds, and gallium compounds used in gate quality oxide layers. The method includes heating a semiconductor structure at an elevated temperature of between about 230° C. and about 400° C. The semiconductor structure is exposed to an atmosphere that is supersaturated with water vapor or vapor of deuterium oxide. The exposure takes place at elevated temperature and continues for a period of time between about 5 minutes to about 120 minutes. It has been found that the method of the present invention results in a semiconductor product that has significantly improved performance characteristics over semiconductors that are not passivated, or that use a dry hydrogen method of passivation.

    摘要翻译: 本发明提供一种钝化设置在III-V半导体衬底上的氧化物的方法。 该方法旨在用于栅极质量氧化物层中使用的电介质叠层,没食子酸酯化合物和镓化合物。 该方法包括在约230℃和约400℃之间的升高的温度下加热半导体结构。将半导体结构暴露于用水蒸气或氧化氘蒸汽过饱和的气氛中。 曝光在升高的温度下进行,并持续约5分钟至约120分钟之间的时间。 已经发现,本发明的方法产生了与不被钝化的半导体相比具有明显改善的性能特性的半导体产品,或者使用干法氢化钝化方法。

    Enhancement mode metal-oxide-semiconductor field effect transistor
    9.
    发明授权
    Enhancement mode metal-oxide-semiconductor field effect transistor 有权
    增强型金属氧化物半导体场效应晶体管

    公开(公告)号:US06963090B2

    公开(公告)日:2005-11-08

    申请号:US10339379

    申请日:2003-01-09

    IPC分类号: H01L21/336 H01L31/072

    摘要: An implant-free enhancement mode metal-oxide semiconductor field effect transistor (EMOSFET) is provided. The EMOSFET has a III-V compound semiconductor substrate and an epitaxial layer structure overlying the III-V compound semiconductor substrate. The epitaxial material layer has a channel layer and at least one doped layer. A gate oxide layer overlies the epitaxial layer structure. The EMOSFET further includes a metal gate electrode overlying the gate oxide layer and source and drain ohmic contacts overlying the epitaxial layer structure.

    摘要翻译: 提供无植入物的增强型金属氧化物半导体场效应晶体管(EMOSFET)。 EMOSFET具有III-V族化合物半导体衬底和覆盖III-V族化合物半导体衬底的外延层结构。 外延材料层具有沟道层和至少一个掺杂层。 栅极氧化层覆盖在外延层结构上。 EMOSFET还包括覆盖栅极氧化物层的金属栅极电极和覆盖外延层结构的源极和漏极欧姆触点。

    Method of passivating oxide/compound semiconductor interface
    10.
    发明授权
    Method of passivating oxide/compound semiconductor interface 有权
    钝化氧化物/化合物半导体界面的方法

    公开(公告)号:US07202182B2

    公开(公告)日:2007-04-10

    申请号:US10882482

    申请日:2004-06-30

    IPC分类号: H01L21/31 H01L21/469

    CPC分类号: H01L21/3105 H01L21/28264

    摘要: The present invention provides a method of passivating an oxide compound disposed on a III-V semiconductor substrate. The method is intended for use with dielectric stacks, gallate compounds, and gallium compounds used in gate quality oxide layers. The method includes heating a semiconductor structure at an elevated temperature of between about 230° C. and about 400° C. The semiconductor structure is exposed to an atmosphere that is supersaturated with water vapor or vapor of deuterium oxide. The exposure takes place at elevated temperature and continues for a period of time between about 5 minutes to about 120 minutes. It has been found that the method of the present invention results in a semiconductor product that has significantly improved performance characteristics over semiconductors that are not passivated, or that use a dry hydrogen method of passivation.

    摘要翻译: 本发明提供一种钝化设置在III-V半导体衬底上的氧化物的方法。 该方法旨在用于栅极质量氧化物层中使用的电介质叠层,没食子酸酯化合物和镓化合物。 该方法包括在约230℃和约400℃之间的升高的温度下加热半导体结构。将半导体结构暴露于用水蒸气或氧化氘蒸气过饱和的气氛中。 曝光在升高的温度下进行,并持续约5分钟至约120分钟之间的时间。 已经发现,本发明的方法产生了与不被钝化的半导体相比具有明显改善的性能特性的半导体产品,或者使用干法氢化钝化方法。