公开(公告)号：US20060105153A1

公开(公告)日：2006-05-18

申请号：US11244649

申请日：2005-10-05

申请人： Chang-soo Jang ,  Jae-chul Ryu ,  Hyoung-ho Roh ,  Dong-kwan Won

发明人： Chang-soo Jang ,  Jae-chul Ryu ,  Hyoung-ho Roh ,  Dong-kwan Won

IPC分类号： B05D5/12

CPC分类号： H05K1/0366 ,  H05K3/022 ,  H05K2203/1545 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

摘要翻译： 提供一种制造印刷电路板的方法。 在一个实施例中，该方法包括通过卷轴方法形成预浸料层，在预浸料层的至少一个表面上形成用于形成电路图案的导电膜; 并在导电膜上形成预定的电路图案。 在一个实施例中，预浸料层具有至多约0.15mm的厚度，并且包含纤维材料和树脂材料。 在一个实施方式中，预浸料层中的树脂材料的含量为约70体积％以下。 在一个实施例中，预浸料层由至少一个预浸料层组成。

公开(公告)号：US20090087547A1

公开(公告)日：2009-04-02

申请号：US12328077

申请日：2008-12-04

申请人： Chang-soo Jang ,  Jae-chul Ryu ,  Hyoung-ho Roh ,  Dong-kwan Won

发明人： Chang-soo Jang ,  Jae-chul Ryu ,  Hyoung-ho Roh ,  Dong-kwan Won

IPC分类号： H05K3/04

CPC分类号： H05K1/0366 ,  H05K3/022 ,  H05K2203/1545 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

摘要翻译： 提供一种制造印刷电路板的方法。 在一个实施例中，该方法包括通过卷轴方法形成预浸料层，在预浸料层的至少一个表面上形成用于形成电路图案的导电膜; 并在导电膜上形成预定的电路图案。 在一个实施例中，预浸料层具有至多约0.15mm的厚度，并且包含纤维材料和树脂材料。 在一个实施方式中，预浸料层中的树脂材料的含量为约70体积％以下。 在一个实施例中，预浸料层由至少一个预浸料层组成。

公开(公告)号：US07811626B2

公开(公告)日：2010-10-12

申请号：US12328077

申请日：2008-12-04

申请人： Chang-soo Jang ,  Dong-kwan Won ,  Hyoung-ho Roh ,  Jae-chul Ryu

发明人： Chang-soo Jang ,  Dong-kwan Won ,  Hyoung-ho Roh ,  Jae-chul Ryu

IPC分类号： B05D5/12

CPC分类号： H05K1/0366 ,  H05K3/022 ,  H05K2203/1545 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

摘要翻译： 提供一种制造印刷电路板的方法。 在一个实施例中，该方法包括通过卷轴方法形成预浸料层，在预浸料层的至少一个表面上形成用于形成电路图案的导电膜; 并在导电膜上形成预定的电路图案。 在一个实施例中，预浸料层具有至多约0.15mm的厚度，并且包含纤维材料和树脂材料。 在一个实施方式中，预浸料层中的树脂材料的含量为约70体积％以下。 在一个实施例中，预浸料层由至少一个预浸料层组成。

公开(公告)号：US07470461B2

公开(公告)日：2008-12-30

申请号：US11244649

申请日：2005-10-05

申请人： Chang-soo Jang ,  Dong-kwan Won ,  Hyoung-ho Roh ,  Jae-chul Ryu

发明人： Chang-soo Jang ,  Dong-kwan Won ,  Hyoung-ho Roh ,  Jae-chul Ryu

IPC分类号： B32B3/00

CPC分类号： H05K1/0366 ,  H05K3/022 ,  H05K2203/1545 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

摘要翻译： 提供一种制造印刷电路板的方法。 在一个实施例中，该方法包括通过卷轴方法形成预浸料层，在预浸料层的至少一个表面上形成用于形成电路图案的导电膜; 并在导电膜上形成预定的电路图案。 在一个实施例中，预浸料层具有至多约0.15mm的厚度，并且包含纤维材料和树脂材料。 在一个实施方式中，预浸料层中的树脂材料的含量为约70体积％以下。 在一个实施例中，预浸料层由至少一个预浸料层组成。

公开(公告)号：US07199462B2

公开(公告)日：2007-04-03

申请号：US11133727

申请日：2005-05-20

申请人： Chang-soo Jang ,  Jae-chul Ryu ,  Dong-kwan Won

发明人： Chang-soo Jang ,  Jae-chul Ryu ,  Dong-kwan Won

IPC分类号： H01L23/12

CPC分类号： H01L23/49838 ,  H01L23/13 ,  H01L23/145 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/19041 ,  H05K1/0271 ,  H05K3/0052 ,  H05K3/28 ,  H05K2201/068 ,  H05K2201/09781 ,  H05K2203/1572 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A parent or master substrate for a semiconductor package is provided, which can provide a plurality of unit substrates by cutting into pieces for producing a semiconductor device. The parent substrate includes an insulation layer, conductor patterns formed on first and second surfaces of the insulation layer, and PSR (photo solder resist) layers respectively formed on the first and second surfaces of the insulation layers and covering the conductor patterns. The parent substrate includes an upper part and a lower part divided by a reference surface which passes through the center of the insulation layer. When an equivalent thermal expansion coefficient αupper of the upper part is defined by the Equation of α upper = ∑ i = 1 n ⁢ α i × E i × v i ∑ i = 1 n ⁢ E i × v i , where αi is respective thermal expansion coefficients of, Ei is respective elastic moduli of, and vi is respective volume ratios of first through nth components constituting the upper part (e.g., insulation layer, conductor patterns, and PSR layers of the upper part), and an equivalent thermal expansion coefficient αlower of the lower part is defined by the Equation of α lower = ∑ j = 1 m ⁢ α j × E j × v j ∑ j = 1 m ⁢ E j × v j , where αj is respective thermal expansion coefficients of, Ej is respective elastic moduli of, and vj is respective volume ratios of first through mth components constituting the lower part (e.g., insulation layer, conductor patterns, and PSR layers of the lower part), a equivalent thermal expansion ratio (αupper/αlower) of αupper to αlower is selected to be within a range of 0.975 through 1.165.

摘要翻译： 提供了一种用于半导体封装的母板或母板，其可以通过切割成用于制造半导体器件的片来提供多个单元基板。 母基板包括绝缘层，形成在绝缘层的第一和第二表面上的导体图案，以及分别形成在绝缘层的第一和第二表面上并覆盖导体图案的PSR（光阻焊剂）层。 母基片包括由穿过绝缘层的中心的参考表面划分的上部和下部。 当上部的等效热膨胀系数α<上限由等式定义时

公开(公告)号：US20060038280A1

公开(公告)日：2006-02-23

申请号：US11133727

申请日：2005-05-20

申请人： Chang-soo Jang ,  Jae-chul Ryu ,  Dong-kwan Won

发明人： Chang-soo Jang ,  Jae-chul Ryu ,  Dong-kwan Won

IPC分类号： H01L23/12 ,  H01L23/48 ,  H01L23/02 ,  H05K1/00

CPC分类号： H01L23/49838 ,  H01L23/13 ,  H01L23/145 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/19041 ,  H05K1/0271 ,  H05K3/0052 ,  H05K3/28 ,  H05K2201/068 ,  H05K2201/09781 ,  H05K2203/1572 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A parent or master substrate for a semiconductor package is provided, which can provide a plurality of unit substrates by cutting into pieces for producing a semiconductor device. The parent substrate includes an insulation layer, conductor patterns formed on first and second surfaces of the insulation layer, and PSR (photo solder resist) layers respectively formed on the first and second surfaces of the insulation layers and covering the conductor patterns. The parent substrate includes an upper part and a lower part divided by a reference surface which passes through the center of the insulation layer. When an equivalent thermal expansion coefficient αupper of the upper part is defined by the Equation of α upper = ∑ i = 1 n ⁢ α i × E i × v i ∑ i = 1 n ⁢ E i × v i , where αi is respective thermal expansion coefficients of, Ei is respective elastic moduli of, and vi is respective volume ratios of first through nth components constituting the upper part (e.g., insulation layer, conductor patterns, and PSR layers of the upper part), and an equivalent thermal expansion coefficient αlower of the lower part is defined by the Equation of α lower = ∑ j = 1 m ⁢ α j × E j × v j ∑ j = 1 m ⁢ E j × v j , where αj is respective thermal expansion coefficients of, Ej is respective elastic moduli of, and vj is respective volume ratios of first through mth components constituting the lower part (e.g., insulation layer, conductor patterns, and PSR layers of the lower part), a equivalent thermal expansion ratio (αupper/αlower) of αupper to αlower is selected to be within a range of 0.975 through 1.165.

公开(公告)号：US08419880B2

公开(公告)日：2013-04-16

申请号：US13162855

申请日：2011-06-17

申请人： Se-hoon Cho ,  Dong-kwan Won

发明人： Se-hoon Cho ,  Dong-kwan Won

IPC分类号： B44C1/00 ,  B29C65/48 ,  B32B37/12 ,  B32B37/18 ,  B32B43/00 ,  C01B31/04

CPC分类号： B32B37/025 ,  B32B2310/049 ,  B32B2457/12 ,  B32B2457/20 ,  B82Y30/00 ,  B82Y40/00

摘要： A method of transferring graphene, the method including: preparing a graphene forming structure including a base member, an oxide layer that is hydrophilic and is formed on the base member, a metal catalyst layer that is hydrophobic and is formed on the oxide layer, and graphene that is formed on the metal catalyst layer; attaching the graphene forming structure on a surface of a first carrier; separating the oxide layer from the metal catalyst layer by applying steam to the graphene forming structure; and removing the metal catalyst layer.

摘要翻译： 一种转移石墨烯的方法，该方法包括：制备石墨烯形成结构，该石墨烯形成结构包括基底构件，亲水性并形成在基底构件上的氧化物层，疏水性并形成在氧化物层上的金属催化剂层，以及 在金属催化剂层上形成的石墨烯; 将所述石墨烯形成结构附着在第一载体的表面上; 通过向所述石墨烯形成结构施加蒸汽来将所述氧化物层与所述金属催化剂层分离; 并除去金属催化剂层。

公开(公告)号：US10040683B2

公开(公告)日：2018-08-07

申请号：US13298944

申请日：2011-11-17

申请人： Jong-hyuk Yoon ,  Duk-hwa Na ,  Young-il Song ,  Dong-kwan Won ,  Byung-hee Hong ,  Na-young Kim

发明人： Jong-hyuk Yoon ,  Duk-hwa Na ,  Young-il Song ,  Dong-kwan Won ,  Byung-hee Hong ,  Na-young Kim

IPC分类号： B32B9/00 ,  B82Y40/00 ,  B82Y30/00 ,  C01B32/182

摘要： A method of fabricating multi-layered graphene includes disposing a first graphene layer on a carrier; disposing at least one second graphene layer on the first graphene layer to form a graphene sheet disposed on the carrier; and transferring the graphene sheet disposed on the carrier onto a substrate, wherein each of the graphene layers which constitute the graphene sheet has at least one damaged region, and the at least one damaged region of each of the graphene layers contacts at least one of non-damaged regions of a graphene layer or graphene layers, of the graphene layers, contacting the each of the graphene layers.

公开(公告)号：US20100000675A1

公开(公告)日：2010-01-07

申请号：US12465871

申请日：2009-05-14

申请人： Deok-heung Kim ,  Dong-kwan Won ,  Sang-min Lee ,  Min-woo Lee ,  Youn-kwon Jung

发明人： Deok-heung Kim ,  Dong-kwan Won ,  Sang-min Lee ,  Min-woo Lee ,  Youn-kwon Jung

IPC分类号： B29C65/02

CPC分类号： H05K3/4652 ,  B32B37/06 ,  B32B37/08 ,  B32B37/226 ,  B32B2309/68 ,  B32B2310/0825 ,  B32B2457/00 ,  H05K3/281 ,  H05K2201/0358 ,  H05K2203/0143 ,  H05K2203/068 ,  H05K2203/085 ,  H05K2203/1121 ,  H05K2203/1545

摘要： Provided are a method and apparatus for manufacturing a multi-layer substrate. The method includes: rolling out a base substrate that is rolled up into a substrate supply roll and delivering the base substrate to a compression roller system; compressing and laminating a laminating material on the base substrate in a vacuum state using the compression roller system; and cooling the base substrate on which the laminating material is laminated.

摘要翻译： 提供一种制造多层基板的方法和装置。 该方法包括：将卷成基材供给辊的基底基材卷出，将基材输送到压缩辊系统; 使用压缩辊系统在真空状态下将层压材料压缩并层压在基底基板上; 并冷却层压材料层叠的基底基板。