公开(公告)号：US20110226736A1

公开(公告)日：2011-09-22

申请号：US13118604

申请日：2011-05-31

申请人： Chih-Wei Huang ,  Chao-Sung Lai ,  Hsing-Kan Peng ,  Chung-Yuan Lee ,  Shian-Jyh Lin

发明人： Chih-Wei Huang ,  Chao-Sung Lai ,  Hsing-Kan Peng ,  Chung-Yuan Lee ,  Shian-Jyh Lin

IPC分类号： C23F1/02 ,  C23F1/26

CPC分类号： C23F1/26 ,  H01L21/32134

摘要： A method of patterning a metal alloy material layer having hafnium and molybdenum. The method includes forming a patterned mask layer on a metal alloy material layer having hafnium and molybdenum on a substrate. The patterned mask layer is used as a mask and an etching process is performed using an etchant on the metal alloy material layer having hafnium and molybdenum so as to form a metal alloy layer having hafnium and molybdenum. The etchant includes at least nitric acid, hydrofluoric acid and sulfuric acid. The patterned mask layer is removed.

摘要翻译： 图案化具有铪和钼的金属合金材料层的方法。 该方法包括在基板上的具有铪和钼的金属合金材料层上形成图案化掩模层。 图案化掩模层用作掩模，并且使用具有铪和钼的金属合金材料层上的蚀刻剂进行蚀刻处理，以形成具有铪和钼的金属合金层。 蚀刻剂至少包括硝酸，氢氟酸和硫酸。 去除图案化的掩模层。

公开(公告)号：US20090146101A1

公开(公告)日：2009-06-11

申请号：US12103681

申请日：2008-04-15

申请人： Chih-Wei Huang ,  Chao-Sung Lai ,  Hsing-Kan Peng ,  Chung-Yuan Lee ,  Shian-Jyh Lin

发明人： Chih-Wei Huang ,  Chao-Sung Lai ,  Hsing-Kan Peng ,  Chung-Yuan Lee ,  Shian-Jyh Lin

IPC分类号： C09K13/08

CPC分类号： C23F1/26 ,  H01L21/32134

摘要： An etchant for etching a metal alloy having hafnium and molybdenum includes 20 to 80 percent by weight of nitric acid, 1 to 49 percent by weight of hydrofluoric acid, 1 to 96 percent by weight of sulfuric acid, and 1 to 30 percent by weight of water, based on the total weight of the etchant.

摘要翻译： 用于蚀刻具有铪和钼的金属合金的蚀刻剂包括20至80重量％的硝酸，1至49重量％的氢氟酸，1至96重量％的硫酸和1至30重量％的 水，基于蚀刻剂的总重量。

公开(公告)号：US08691705B2

公开(公告)日：2014-04-08

申请号：US13118604

申请日：2011-05-31

申请人： Chih-Wei Huang ,  Chao-Sung Lai ,  Hsing-Kan Peng ,  Chung-Yuan Lee ,  Shian-Jyh Lin

发明人： Chih-Wei Huang ,  Chao-Sung Lai ,  Hsing-Kan Peng ,  Chung-Yuan Lee ,  Shian-Jyh Lin

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： C23F1/26 ,  H01L21/32134

摘要： A method of patterning a metal alloy material layer having hafnium and molybdenum. The method includes forming a patterned mask layer on a metal alloy material layer having hafnium and molybdenum on a substrate. The patterned mask layer is used as a mask and an etching process is performed using an etchant on the metal alloy material layer having hafnium and molybdenum so as to form a metal alloy layer having hafnium and molybdenum. The etchant includes at least nitric acid, hydrofluoric acid and sulfuric acid. The patterned mask layer is removed.

摘要翻译： 图案化具有铪和钼的金属合金材料层的方法。 该方法包括在基板上的具有铪和钼的金属合金材料层上形成图案化掩模层。 图案化掩模层用作掩模，并且使用具有铪和钼的金属合金材料层上的蚀刻剂进行蚀刻处理，以形成具有铪和钼的金属合金层。 蚀刻剂至少包括硝酸，氢氟酸和硫酸。 去除图案化的掩模层。

公开(公告)号：US20100025778A1

公开(公告)日：2010-02-04

申请号：US12183074

申请日：2008-07-31

申请人： Chao-Sung Lai ,  Hsing-Kan Peng ,  Shian-Jyh Lin ,  Chung-Yuan Lee

发明人： Chao-Sung Lai ,  Hsing-Kan Peng ,  Shian-Jyh Lin ,  Chung-Yuan Lee

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/4966 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/6659 ,  H01L29/7833

摘要： A transistor includes a gate structure of HfMoN. The work function of the gate structure can be modulated by doping the HfMoN with dopants including nitride, silicon or germanium. The gate structure of HfMoN of the present invention is applicable to PMOS, NMOS or CMOS transistors.

摘要翻译： 晶体管包括HfMoN的栅极结构。 可以通过掺杂包括氮化物，硅或锗的掺杂剂来掺杂HfMoN来调制栅极结构的功函数。 本发明的HfMoN的栅极结构可应用于PMOS，NMOS或CMOS晶体管。

公开(公告)号：US20090134442A1

公开(公告)日：2009-05-28

申请号：US12103590

申请日：2008-04-15

申请人： Shian-Jyh Lin ,  Yuan Tsung Chang ,  Shun-Fu Chen ,  Chung-Tze Lin ,  Chung-Yuan Lee ,  Tse Chuan Kuo

发明人： Shian-Jyh Lin ,  Yuan Tsung Chang ,  Shun-Fu Chen ,  Chung-Tze Lin ,  Chung-Yuan Lee ,  Tse Chuan Kuo

IPC分类号： H01L27/108 ,  H01L21/8242

CPC分类号： H01L29/66621 ,  H01L27/10867 ,  H01L27/10876

摘要： A method for forming a recessed channel device includes providing a substrate with a plurality of trench capacitors formed therein, each of the trench capacitors including a plug protruding above the substrate; forming a spacer on each of the plugs; forming a plurality of trench isolations along a first direction in the substrate adjacent to the trench capacitors so as to define an active area exposing the substrate; removing a portion of the substrate by using the spacers and the trench isolations as a mask to form a recessed channel; and trimming the recessed channel so that a surface profile of the recessed channel presents a three-dimensional shape. A recessed channel device with a rounded channel profile is also provided.

摘要翻译： 用于形成凹陷通道器件的方法包括：提供其上形成有多个沟槽电容器的衬底，每个沟槽电容器包括突出在衬底上方的插头; 在每个插头上形成间隔件; 在与所述沟槽电容器相邻的所述衬底中沿着第一方向形成多个沟槽隔离，以限定暴露所述衬底的有源区; 通过使用间隔物和沟槽隔离物作为掩模去除衬底的一部分以形成凹陷沟道; 并且修整凹陷通道，使得凹陷通道的表面轮廓呈现三维形状。 还提供了具有圆形通道轮廓的凹槽通道装置。

公开(公告)号：US20050208727A1

公开(公告)日：2005-09-22

申请号：US10871619

申请日：2004-06-18

申请人： Shian-Jyh Lin ,  Yu-Sheng Hsu ,  Chung-Yuan Lee

发明人： Shian-Jyh Lin ,  Yu-Sheng Hsu ,  Chung-Yuan Lee

IPC分类号： H01L21/033 ,  H01L21/20 ,  H01L21/308 ,  H01L21/311 ,  H01L21/334 ,  H01L21/8242 ,  H01L29/94

CPC分类号： H01L27/1087 ,  H01L21/0337 ,  H01L21/3086 ,  H01L29/66181 ,  H01L29/945

摘要： A method for forming a bottle trench. First, a substrate covered by a photoresist layer is rotated to a specific angle prior to performance of lithography, thereby forming a rectangular opening in the photoresist layer and exposing the substrate, in which edges of the rectangular opening are substantially parallel to the {110} plane of the substrate due to the rotation of the substrate. Next, the exposed substrate is etched to form a trench therein, in which the sidewall surface of the trench is the {110} plane of the substrate. Finally, isotropic etching is performed on the substrate of the lower portion of the trench using an etching shield layer formed on the sidewall of the upper portion of the trench as an etching mask, to form the bottle trench. The invention also discloses a method of fabricating a bottle trench capacitor.

公开(公告)号：US20090011569A1

公开(公告)日：2009-01-08

申请号：US12211815

申请日：2008-09-17

申请人： Shian-Jyh Lin ,  Chien-Li Cheng ,  Pei-Ing Lee ,  Chung-Yuan Lee

发明人： Shian-Jyh Lin ,  Chien-Li Cheng ,  Pei-Ing Lee ,  Chung-Yuan Lee

IPC分类号： H01L21/76

CPC分类号： H01L29/66553 ,  H01L21/26586 ,  H01L27/10876 ,  H01L29/66621 ,  H01L29/66659

摘要： A method of fabricating self-aligned recess utilizing asymmetric poly spacer is disclosed. A semiconductor substrate having thereon a first pad layer and second pad layer is provided. A plurality of trenches is embedded in a memory array region of the semiconductor substrate. Each of the trenches includes a trench top layer that extrudes from a main surface of the semiconductor substrate. Asymmetric poly spacer is formed on one side of the extruding trench top layer and is used, after oxidized, as a mask for forming a recess in close proximity to the trenches.

摘要翻译： 公开了一种使用不对称聚合间隔物制造自对准凹槽的方法。 提供了其上具有第一焊盘层和第二焊盘层的半导体衬底。 多个沟槽嵌入在半导体衬底的存储器阵列区域中。 每个沟槽包括从半导体衬底的主表面挤出的沟槽顶层。 非对称聚合物间隔物形成在挤出沟槽顶层的一侧上，并且在氧化之后用作用于在靠近沟槽形成凹部的掩模。

公开(公告)号：US20070161205A1

公开(公告)日：2007-07-12

申请号：US11556170

申请日：2006-11-03

申请人： Shian-Jyh Lin ,  Chien-Li Cheng ,  Pei-Ing Lee ,  Chung-Yuan Lee

发明人： Shian-Jyh Lin ,  Chien-Li Cheng ,  Pei-Ing Lee ,  Chung-Yuan Lee

IPC分类号： H01L21/76

CPC分类号： H01L29/66553 ,  H01L21/26586 ,  H01L27/10876 ,  H01L29/66621 ,  H01L29/66659

摘要： A method of fabricating self-aligned recess utilizing asymmetric poly spacer is disclosed. A semiconductor substrate having thereon a first pad layer and second pad layer is provided. A plurality of trenches is embedded in a memory array region of the semiconductor substrate. Each of the trenches includes a trench top layer that extrudes from a main surface of the semiconductor substrate. Asymmetric poly spacer is formed on one side of the extruding trench top layer and is used, after oxidized, as a mask for forming a recess in close proximity to the trenches.

摘要翻译： 公开了一种使用不对称聚合间隔物制造自对准凹槽的方法。 提供了其上具有第一焊盘层和第二焊盘层的半导体衬底。 多个沟槽嵌入在半导体衬底的存储器阵列区域中。 每个沟槽包括从半导体衬底的主表面挤出的沟槽顶层。 非对称聚合物间隔物形成在挤出沟槽顶层的一侧上，并且在氧化之后用作用于在靠近沟槽形成凹部的掩模。

公开(公告)号：US07446355B2

公开(公告)日：2008-11-04

申请号：US11556170

申请日：2006-11-03

申请人： Shian-Jyh Lin ,  Chien-Li Cheng ,  Pei-Ing Lee ,  Chung-Yuan Lee

发明人： Shian-Jyh Lin ,  Chien-Li Cheng ,  Pei-Ing Lee ,  Chung-Yuan Lee

IPC分类号： H01L29/76

CPC分类号： H01L29/66553 ,  H01L21/26586 ,  H01L27/10876 ,  H01L29/66621 ,  H01L29/66659

摘要： A method of fabricating self-aligned recess utilizing asymmetric poly spacer is disclosed. A semiconductor substrate having thereon a first pad layer and second pad layer is provided. A plurality of trenches is embedded in a memory array region of the semiconductor substrate. Each of the trenches includes a trench top layer that extrudes from a main surface of the semiconductor substrate. Asymmetric poly spacer is formed on one side of the extruding trench top layer and is used, after oxidized, as a mask for forming a recess in close proximity to the trenches.

摘要翻译： 公开了一种使用不对称聚合间隔物制造自对准凹槽的方法。 提供了其上具有第一焊盘层和第二焊盘层的半导体衬底。 多个沟槽嵌入在半导体衬底的存储器阵列区域中。 每个沟槽包括从半导体衬底的主表面挤出的沟槽顶层。 非对称聚合物间隔物形成在挤出沟槽顶层的一侧上，并且在氧化之后用作用于在靠近沟槽形成凹部的掩模。

公开(公告)号：US20050221560A1

公开(公告)日：2005-10-06

申请号：US11139450

申请日：2005-05-27

申请人： Yu-Sheng Shu ,  Yuan-Hsun Wu ,  Chung-Yuan Lee ,  Shian-Jyh Lin

发明人： Yu-Sheng Shu ,  Yuan-Hsun Wu ,  Chung-Yuan Lee ,  Shian-Jyh Lin

IPC分类号： G03C5/00 ,  G03F1/00 ,  G03F9/00 ,  H01L21/027 ,  H01L21/308 ,  H01L21/336 ,  H01L21/76 ,  H01L21/8242 ,  H01L27/02

CPC分类号： H01L27/1087 ,  H01L21/3083 ,  H01L27/0207 ,  H01L27/10864

摘要： A method of forming a vertical memory device with a rectangular trench. First, a substrate covered by a photoresist layer is provided. Next, the photoresist layer is defined by a mask to form a rectangular opening, wherein the mask has two rectangular transparent patterns arranged with a predetermined interval. Next, the substrate is etched using the defined photoresist layer as a mask to form a single rectangular trench and the photoresist layer is then removed. Finally, a trench capacitor and a vertical transistor are successively formed in the rectangular trench to finish the vertical memory device.

摘要翻译： 一种形成具有矩形沟槽的垂直存储器件的方法。 首先，提供由光致抗蚀剂层覆盖的基板。 接下来，通过掩模限定光致抗蚀剂层以形成矩形开口，其中掩模具有以预定间隔布置的两个矩形透明图案。 接下来，使用限定的光致抗蚀剂层作为掩模来蚀刻基板以形成单个矩形沟槽，然后除去光致抗蚀剂层。 最后，在矩形沟槽中依次形成沟槽电容器和垂直晶体管，以完成垂直存储器件。