公开(公告)号：US07863731B2

公开(公告)日：2011-01-04

申请号：US12001612

申请日：2007-12-11

Applicant: Chin-Te Chen ,  Ke-Chuan Yang ,  Chang-Fu Lin

Inventor： Chin-Te Chen ,  Ke-Chuan Yang ,  Chang-Fu Lin

IPC: H01L23/10

CPC classification number: H01L23/367 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A heat-dissipating structure and a heat-dissipating semiconductor package having the same are disclosed in the present invention. The heat-dissipating semiconductor package includes a chip carrier, a flip chip semiconductor chip attached and electrically connected to the chip carrier, and a heat sink bonded to the flip chip semiconductor chip via a thermal interface material, such as a solder material, wherein a groove is formed on the heat sink around the bonding area of the thermal interface material, and a blocking layer, such as a metal oxide layer, is formed on the surface of the groove to reduce the wetting capability of the thermal interface material, thus further prevents the thermal interface material from wetting the groove in the fusion process performed the thermal interface material, therefore, it ensures the thermal interface material has sufficient thickness for forming solder bonding between the heat sink and the flip chip semiconductor chip.

Abstract translation: 在本发明中公开了一种散热结构和具有该散热结构的散热半导体封装。 散热半导体封装包括芯片载体，安装并电连接到芯片载体的倒装芯片半导体芯片，以及通过诸如焊料材料的热界面材料接合到倒装芯片半导体芯片的散热器，其中a 在热界面材料的接合区域周围的散热器上形成凹槽，并且在凹槽的表面上形成诸如金属氧化物层的阻挡层，以降低热界面材料的润湿能力，因此进一步 防止热界面材料在进行热界面材料的熔融过程中润湿槽，因此，确保热界面材料具有足够的厚度，用于在散热器和倒装芯片半导体芯片之间形成焊接。

公开(公告)号：US07203072B2

公开(公告)日：2007-04-10

申请号：US10851288

申请日：2004-05-21

Applicant: Chin-Te Chen ,  Chang-Fu Lin

Inventor： Chin-Te Chen ,  Chang-Fu Lin

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H01L23/10 ,  H01L23/36 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/163 ,  H01L2924/16315 ,  H01L2924/00

Abstract: A heat dissipating structure and a semiconductor package with the same are proposed. A substrate is used to accommodate at least one chip thereon, and the chip is electrically connected to the substrate. A heat dissipating structure having a flat portion and a support portion is mount on the substrate via the support portion by means of an adhesive. At least one groove is formed on the support portion and at least one air vent is formed around the groove to allow the groove to communicate with the outside via the air vent, such that the adhesive is allowed to fill the groove to expel air from the groove to the atmosphere through the air vent, thereby preventing the air from trapped in the groove.

Abstract translation: 提出了一种散热结构及其半导体封装。 衬底用于容纳至少一个芯片，芯片电连接至衬底。 具有平坦部分和支撑部分的散热结构通过粘合剂经由支撑部分安装在基板上。 在支撑部分上形成至少一个凹槽，并且围绕凹槽形成至少一个排气孔，以允许凹槽经由排气口与外部连通，使得允许粘合剂填充凹槽以从空气中排出空气 通过排气口到大气中，从而防止空气被捕获在槽中。

公开(公告)号：US06980438B2

公开(公告)日：2005-12-27

申请号：US10759863

申请日：2004-01-16

Applicant: Chien-Ping Huang ,  Han-Ping Pu ,  Chin-Te Chen ,  Chang-Fu Lin

Inventor： Chien-Ping Huang ,  Han-Ping Pu ,  Chin-Te Chen ,  Chang-Fu Lin

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/055 ,  H01L23/10 ,  H01L23/367 ,  H01L23/467 ,  H01L25/065 ,  H05K7/20

CPC classification number: H01L23/467 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/055 ,  H01L23/10 ,  H01L23/3672 ,  H01L23/3675 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00

Abstract: A semiconductor package with a heat dissipating structure includes a substrate, a chip and a heat dissipating structure. The chip is mounted on and electrically connected to the substrate. The heat dissipating structure includes a first heat sink having at least one positioning portion, and at least one second heat sink having at least one second positioning portion and at least one hollow portion. The second heat sink is mounted on the substrate, and the first positioning portion of the first heat sink is attached to the second positioning portion of the second heat sink, allowing the chip to be accommodated in a space defined by the first heat sink, the hollow portion of the second heat sink and the substrate. This semiconductor package has good heat dissipating efficiency and is cost-effective to fabricate.

公开(公告)号：US20050199998A1

公开(公告)日：2005-09-15

申请号：US10861544

申请日：2004-06-04

Applicant: Chin-Te Chen ,  Wen-Che Lee ,  Chang-Fu Lin

Inventor： Chin-Te Chen ,  Wen-Che Lee ,  Chang-Fu Lin

IPC: H01L23/28

CPC classification number: H01L23/16 ,  H01L23/3128 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package with a heat sink, a method for fabricating the same and a stiffener for the semiconductor package are proposed. At least one chip and the stiffener surrounding the chip are mounted on a substrate, and the heat sink is respectively attached to a non-active surface of the chip and the stiffener. A plurality of penetrating openings are formed on the stiffener, and an adhesive is filled in the penetrating openings to enhance the bonding strength of the heat sink and the stiffener, thereby inhibiting the heat sink and the stiffener from coming off.

Abstract translation: 提出了具有散热器的半导体封装，其制造方法和半导体封装的加强件。 至少一个芯片和围绕芯片的加强件安装在基板上，并且散热器分别附接到芯片和加强件的非活动表面。 在加强件上形成有多个贯通孔，在贯通孔中填充有粘合剂，以增强散热器和加强件的接合强度，从而抑制散热器和加强件的脱落。

公开(公告)号：US20050056926A1

公开(公告)日：2005-03-17

申请号：US10851288

申请日：2004-05-21

Applicant: Chin-Te Chen ,  Chang-Fu Lin

Inventor： Chin-Te Chen ,  Chang-Fu Lin

IPC: H01L23/10 ,  H01L23/36 ,  H01L23/495

CPC classification number: H01L23/10 ,  H01L23/36 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/163 ,  H01L2924/16315 ,  H01L2924/00

Abstract: A heat dissipating structure and a semiconductor package with the same are proposed. A substrate is used to accommodate at least one chip thereon, and the chip is electrically connected to the substrate. A heat dissipating structure having a flat portion and a support portion is mount on the substrate via the support portion by means of an adhesive. At least one groove is formed on the support portion and at least one air vent is formed around the groove to allow the groove to communicate with the outside via the air vent, such that the adhesive is allowed to fill the groove to expel air from the groove to the atmosphere through the air vent, thereby preventing the air from trapped in the groove.

Abstract translation: 提出了一种散热结构及其半导体封装。 衬底用于容纳至少一个芯片，芯片电连接至衬底。 具有平坦部分和支撑部分的散热结构通过粘合剂经由支撑部分安装在基板上。 在支撑部分上形成至少一个凹槽，并且围绕凹槽形成至少一个排气孔，以允许凹槽经由排气口与外部连通，使得允许粘合剂填充凹槽以从空气中排出空气 通过排气口到大气中，从而防止空气被捕获在槽中。

公开(公告)号：US20050036291A1

公开(公告)日：2005-02-17

申请号：US10759863

申请日：2004-01-16

Applicant: Chien-Ping Huang ,  Han-Ping Pu ,  Chin-Te Chen ,  Chang-Fu Lin

Inventor： Chien-Ping Huang ,  Han-Ping Pu ,  Chin-Te Chen ,  Chang-Fu Lin

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/055 ,  H01L23/10 ,  H01L23/367 ,  H01L23/467 ,  H01L25/065 ,  H05K7/20

CPC classification number: H01L23/467 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/055 ,  H01L23/10 ,  H01L23/3672 ,  H01L23/3675 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00

Abstract: A semiconductor package with a heat dissipating structure includes a substrate, a chip and a heat dissipating structure. The chip is mounted on and electrically connected to the substrate. The heat dissipating structure includes a first heat sink having at least one positioning portion, and at least one second heat sink having at least one second positioning portion and at least one hollow portion. The second heat sink is mounted on the substrate, and the first positioning portion of the first heat sink is attached to the second positioning portion of the second heat sink, allowing the chip to be accommodated in a space defined by the first heat sink, the hollow portion of the second heat sink and the substrate. This semiconductor package has good heat dissipating efficiency and is cost-effective to fabricate.

Abstract translation: 具有散热结构的半导体封装包括基板，芯片和散热结构。 芯片安装在基板上并电连接到基板。 散热结构包括具有至少一个定位部分的第一散热器和具有至少一个第二定位部分和至少一个中空部分的至少一个第二散热器。 第二散热器安装在基板上，并且第一散热器的第一定位部分附接到第二散热器的第二定位部分，允许芯片容纳在由第一散热器限定的空间中， 第二散热器的中空部分和基板。 该半导体封装具有良好的散热效率，并且制造成本低。

公开(公告)号：US20080142955A1

公开(公告)日：2008-06-19

申请号：US12001612

申请日：2007-12-11

Applicant: Chin-Te Chen ,  Ke-Chuan Yang ,  Chang-Fu Lin

Inventor： Chin-Te Chen ,  Ke-Chuan Yang ,  Chang-Fu Lin

IPC: H01L23/373

CPC classification number: H01L23/367 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A heat-dissipating structure and a heat-dissipating semiconductor package having the same are disclosed in the present invention. The heat-dissipating semiconductor package includes a chip carrier, a flip chip semiconductor chip attached and electrically connected to the chip carrier, and a heat sink bonded to the flip chip semiconductor chip via a thermal interface material, such as a solder material, wherein a groove is formed on the heat sink around the bonding area of the thermal interface material, and a blocking layer, such as a metal oxide layer, is formed on the surface of the groove to reduce the wetting capability of the thermal interface material, thus further prevents the thermal interface material from wetting the groove in the fusion process performed the thermal interface material, therefore, it ensures the thermal interface material has sufficient thickness for forming solder bonding between the heat sink and the flip chip semiconductor chip.

Abstract translation: 在本发明中公开了一种散热结构和具有该散热结构的散热半导体封装。 散热半导体封装包括芯片载体，安装并电连接到芯片载体的倒装芯片半导体芯片，以及通过诸如焊料材料的热界面材料接合到倒装芯片半导体芯片的散热器，其中a 在热界面材料的接合区域周围的散热器上形成凹槽，并且在凹槽的表面上形成诸如金属氧化物层的阻挡层，以降低热界面材料的润湿能力，因此进一步 防止热界面材料在进行热界面材料的熔融过程中润湿槽，因此，确保热界面材料具有足够的厚度，用于在散热器和倒装芯片半导体芯片之间形成焊接。

公开(公告)号：US06849942B2

公开(公告)日：2005-02-01

申请号：US10438463

申请日：2003-05-14

Applicant: Chang-Fu Lin ,  Han-Ping Pu ,  Cheng-Hsu Hsiao ,  Chien Ping Huang

Inventor： Chang-Fu Lin ,  Han-Ping Pu ,  Cheng-Hsu Hsiao ,  Chien Ping Huang

IPC: H01L23/367 ,  H01L23/34

CPC classification number: H01L23/3675 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A semiconductor package with a heat sink is provided in which at least one chip is mounted on the substrate and covered by a heat sink. The heat sink is formed with a flange in contact with the substrate, allowing a plurality of clip members to clamp the flange of the heat sink and the substrate. Each of the clip members has a recess portion for receiving the flange of the heat sink and the substrate to thereby firmly position the heat sink on the substrate. The clip members are engaged with edges of the heat sink and the substrate, thereby not affecting trace routability on the substrate. Moreover, the heat sink is mounted on the substrate and would not be dislocated.

Abstract translation: 提供了具有散热器的半导体封装，其中至少一个芯片安装在基板上并被散热器覆盖。 散热器形成有与基板接触的凸缘，允许多个夹子构件夹紧散热器和基板的凸缘。 每个夹子构件具有用于容纳散热器和基板的凸缘的凹部，从而将散热器牢固地定位在基板上。 夹子构件与散热器和基板的边缘接合，从而不影响基板上的迹线布线性。 此外，散热器安装在基板上并且不会脱位。

公开(公告)号：US06424189B1

公开(公告)日：2002-07-23

申请号：US09687418

申请日：2000-10-13

Applicant: Jen-Pin Su ,  Tsan-Hui Chen ,  Wen-Hsiang Lin ,  Chun-Chieh Wu ,  Chang-Fu Lin

Inventor： Jen-Pin Su ,  Tsan-Hui Chen ,  Wen-Hsiang Lin ,  Chun-Chieh Wu ,  Chang-Fu Lin

IPC: H03L700

CPC classification number: G06F5/06 ,  H04L7/005 ,  H04L7/02

Abstract: The present invention discloses an apparatus and system for multi-stage event synchronization, whose main object is to eliminate the drawbacks of an expensive synchronization circuit used to balance the data transmissions between an origination agent and a destination agent operating at different frequencies or clock phases as in prior art. The apparatus of the present invention organizes the slower one with multi-stage chains, each of which comprises a simple synchronization circuit and an XOR gate, for receiving the number of events transmitted from the faster one. Therefore, the slower one will not miss the data from the faster one.

Abstract translation: 本发明公开了一种用于多级事件同步的装置和系统，其主要目的是消除用于平衡在不同频率或时钟相位工作的发起代理和目的代理之间的数据传输的昂贵的同步电路的缺点，如 在现有技术中。 本发明的装置组合了具有多级链的较慢级的链，其中每一级都包括一个简单的同步电路和一个异或门，用于接收从较快级链发送的事件数。 因此，较慢的数据不会错过更快的数据。

公开(公告)号：US09666453B2

公开(公告)日：2017-05-30

申请号：US13546281

申请日：2012-07-11

Applicant: Chang-Fu Lin ,  Ho-Yi Tsai ,  Chin-Tsai Yao

Inventor： Chang-Fu Lin ,  Ho-Yi Tsai ,  Chin-Tsai Yao

IPC: H01L21/56 ,  H01L23/498

CPC classification number: H01L23/49838 ,  H01L21/563 ,  H01L23/293 ,  H01L23/3142 ,  H01L23/3675 ,  H01L23/49827 ,  H01L24/06 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/35121

Abstract: A semiconductor package is provided, which includes: a substrate having a metal pattern layer; a semiconductor die formed on the substrate; and an underfill filled between the substrate and the semiconductor die. At least an opening is formed in the metal pattern layer to reduce the area of the metal pattern layer on the substrate, thereby reducing the contact area between the underfill and the metal pattern layer, hence eliminating the underfill delamination.