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公开(公告)号：US10784179B2
公开(公告)日：2020-09-22
申请号：US16839964
申请日：2020-04-03
Inventor： Hyung Seok Lee , Zin-Sig Kim , Sung-Bum Bae
IPC: H01L23/367 , H01L23/00 , H01L23/538 , H01L25/065 , H01L29/778 , H01L29/20 , H01L23/373
Abstract: A method for fabricating a semiconductor device includes sequentially laminating a separation layer and a first substrate layer on a sacrificial substrate, and forming a heat dissipation plate comprising a first region and a second region on the first substrate layer. The method further includes removing the sacrificial substrate and the separation layer, and patterning the first substrate layer to form a first substrate exposing the heat dissipation plate in the second region and contacting the heat dissipation plate in the first region, and forming a first element on the first substrate. The method still further includes forming a plurality of conductive pads disposed on the heat dissipation plate in the second region and a first line connecting at least one of the plurality of conductive pads to the first element, and forming a second element on the conductive pads in the second region.
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公开(公告)号：US10249750B2
公开(公告)日：2019-04-02
申请号：US15966879
申请日：2018-04-30
Inventor： Sung-Bum Bae , Sung Bock Kim
IPC: H01L29/06 , H01L29/778 , H01L29/20 , H01L29/66 , H01L21/762
Abstract: A semiconductor device includes a first semiconductor layer. A second semiconductor layer is disposed on the first semiconductor layer. A structure layer is disposed on the second semiconductor layer. A metal film covers a side surface of the first semiconductor layer, a side surface of the second semiconductor layer, and an upper surface of the structure layer. A flexible substrate covers the metal film.
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公开(公告)号：US08759204B1
公开(公告)日：2014-06-24
申请号：US13897706
申请日：2013-05-20
Inventor： Sung-Bum Bae , Sung Bock Kim , Jae Kyoung Mun , Eun Soo Nam
IPC: H01L21/20
CPC classification number: H01L21/0254 , H01L21/02458 , H01L21/02496 , H01L21/0262 , H01L21/02664 , H01L21/32
Abstract: The inventive concept provides methods for manufacturing a semiconductor substrate. The method may include forming a stop pattern surrounding an edge of a substrate, forming a transition layer an entire top surface of the substrate except the stop pattern, and forming an epitaxial semiconductor layer on the transition layer and the stop pattern. The epitaxial semiconductor layer may not be grown from the stop pattern. That is, the epitaxial semiconductor layer may be isotropically grown from a top surface and a sidewall of the transition layer by a selective isotropic growth method, so that the epitaxial semiconductor layer may gradually cover the stop pattern.
Abstract translation: 本发明构思提供了制造半导体衬底的方法。 该方法可以包括形成围绕衬底的边缘的停止图案，在除了停止图案之外的基板的整个顶表面上形成过渡层，以及在过渡层和停止图案上形成外延半导体层。 外延半导体层可能不会从停止图案生长。 也就是说，外延半导体层可以通过选择性各向同性生长方法从过渡层的顶表面和侧壁各向同性地生长，使得外延半导体层可以逐渐覆盖停止图案。
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公开(公告)号：US10020201B2
公开(公告)日：2018-07-10
申请号：US15093814
申请日：2016-04-08
Inventor： Chi Hoon Jun , Sang Choon Ko , Seok-Hwan Moon , Woojin Chang , Sung-Bum Bae , Young Rak Park , Je Ho Na , Jae Kyoung Mun , Eun Soo Nam
IPC: H01L23/367 , H01L21/3065 , H01L21/308 , H01L21/3205 , H01L23/473 , H01L23/467
CPC classification number: H01L21/3065 , H01L21/3081 , H01L21/32051 , H01L23/367 , H01L23/467 , H01L23/473 , H01L2924/0002 , H01L2924/00
Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.
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公开(公告)号：US09159583B2
公开(公告)日：2015-10-13
申请号：US14310784
申请日：2014-06-20
Inventor： Sang Choon Ko , Jae Kyoung Mun , Woojin Chang , Sung-Bum Bae , Young Rak Park , Chi Hoon Jun , Seok-Hwan Moon , Woo-Young Jang , Jeong-Jin Kim , Hyungyu Jang , Je Ho Na , Eun Soo Nam
IPC: H01L21/33 , H01L21/321 , H01L21/02 , H01L21/283
CPC classification number: H01L21/3212 , H01L21/0254 , H01L21/283 , H01L21/28575 , H01L21/28581 , H01L29/2003 , H01L29/41766 , H01L29/452 , H01L29/66462 , H01L29/7786
Abstract: Provided is a method of manufacturing a nitride semiconductor device. The method includes forming a plurality of electrodes on a growth substrate on which first and second nitride semiconductor layers are sequentially stacked, forming upper metal layers on the plurality of electrodes respectively, removing the growth substrate to expose a lower surface of the first nitride semiconductor layer, and forming a third nitride semiconductor layer and a lower metal layer sequentially on the exposed lower surface of the first nitride semiconductor layer.
Abstract translation: 提供一种制造氮化物半导体器件的方法。 该方法包括在生长衬底上形成多个电极，在其上依次层叠有第一和第二氮化物半导体层，分别在多个电极上形成上部金属层，去除生长衬底以暴露第一氮化物半导体层的下表面 并且在第一氮化物半导体层的暴露的下表面上顺序地形成第三氮化物半导体层和下金属层。
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Patent Agency Ranking
公开(公告)号：US09136347B2
公开(公告)日：2015-09-15
申请号：US14311675
申请日：2014-06-23
Inventor： Young Rak Park , Sang Choon Ko , Woojin Chang , Jae Kyoung Mun , Sung-Bum Bae
IPC: H01L29/66 , H01L29/20 , H01L29/205 , H01L29/49 , H01L29/417 , H01L29/778 , H01L29/737
CPC classification number: H01L29/66462 , H01L29/2003 , H01L29/4175 , H01L29/41758 , H01L29/4236 , H01L29/66431 , H01L29/737 , H01L29/778 , H01L29/7786
Abstract: Provided is a nitride semiconductor device including: a substrate having through via holes; first and second nitride semiconductor layers sequentially stacked on the substrate; drain electrodes and source electrodes provided on the second nitride semiconductor layer; and an insulating pattern provided on the second nitride semiconductor layer, the insulating pattern having upper via holes provided on the drain electrodes, wherein the through via holes are extended into the first and second nitride semiconductor layers and expose a bottom of each of the source electrodes.
Abstract translation: 提供一种氮化物半导体器件，包括：具有通孔的衬底; 顺序堆叠在基板上的第一和第二氮化物半导体层; 设置在第二氮化物半导体层上的漏电极和源电极; 以及设置在所述第二氮化物半导体层上的绝缘图案，所述绝缘图案具有设置在所述漏电极上的上通孔，所述贯通通孔延伸到所述第一氮化物半导体层和所述第二氮化物半导体层中，并暴露出每个所述源电极的底部 。
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7.发明授权公开(公告)号：US12191227B2
公开(公告)日：2025-01-07
申请号：US17518511
申请日：2021-11-03
Inventor： Hyung Seok Lee , Sung-Bum Bae
IPC: H01L23/373 , H01L21/48 , H01L23/367
Abstract: Provided is a heat dissipating substrate including a diamond substrate, wherein an upper portion of the diamond substrate has a concave-convex structure including recessed regions that are spaced apart from each other, and insulation patterns that fill the recessed regions. The insulation patterns include at least one of silicon carbide, silicon nitride, silicon oxide, aluminum nitride, and aluminum oxide.
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公开(公告)号：US09991374B2
公开(公告)日：2018-06-05
申请号：US15591643
申请日：2017-05-10
Inventor： Sung-Bum Bae , Sung Bock Kim
IPC: H01L21/48 , H01L29/778 , H01L29/20 , H01L29/66
CPC classification number: H01L29/7787 , H01L21/762 , H01L29/0657 , H01L29/2003 , H01L29/66462 , H01L29/7786
Abstract: A method for manufacturing a semiconductor device includes sequentially stacking a first epitaxial layer, a sacrificial layer, a second epitaxial layer, and a third epitaxial layer on a first substrate, forming a trench which penetrates the third epitaxial layer, the second epitaxial layer, and the sacrificial layer, forming a structure layer on an upper surface of the third epitaxial layer, forming a metal film which covers an inner surface of the trench and the structure layer, forming a second substrate which fills the trench and covers the metal film, and separating the second epitaxial layer, the third epitaxial layer, and the structure layer from the first epitaxial layer.
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公开(公告)号：US20140167070A1
公开(公告)日：2014-06-19
申请号：US13938324
申请日：2013-07-10
Inventor： Young Rak PARK , Sang Choon Ko , Byoung-Gue Min , Jong-Won Lim , Hokyun Ahn , Sung-Bum Bae , Jae Kyoung Mun , Eun Soo Nam
CPC classification number: H01L29/66477 , H01L23/5225 , H01L23/5228 , H01L23/5329 , H01L23/66 , H01L2223/6627 , H01L2223/6683 , H01L2924/0002 , H01L2924/00
Abstract: Provided are an electronic chip and a method of fabricating the same. The semiconductor chip may include a substrate, an active device integrated on the substrate, a lower interlayered insulating layer covering the resulting structure provided with the active device, a passive device provided on the lower interlayered insulating layer, an upper interlayered insulating layer covering the resulting structure provided with the passive device, and a ground electrode provided on the upper interlayered insulating layer. The upper interlayered insulating layer may be formed of a material, whose dielectric constant may be higher than that of the lower interlayered insulating layer.
Abstract translation: 提供一种电子芯片及其制造方法。 半导体芯片可以包括衬底，集成在衬底上的有源器件，覆盖所提供的有源器件的结构的下层间绝缘层，设置在下层间绝缘层上的无源器件，覆盖所得到的上层间绝缘层 设置有无源器件的结构，以及设置在上层间绝缘层上的接地电极。 上层间绝缘层可以由其介电常数可能高于下层间绝缘层的材料的材料形成。
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公开(公告)号：US20220189845A1
公开(公告)日：2022-06-16
申请号：US17518511
申请日：2021-11-03
Inventor： Hyung Seok Lee , Sung-Bum Bae
IPC: H01L23/373 , H01L23/367 , H01L21/48
Abstract: Provided is a heat dissipating substrate including a diamond substrate, wherein an upper portion of the diamond substrate has a concave-convex structure including recessed regions that are spaced apart from each other, and insulation patterns that fill the recessed regions. The insulation patterns include at least one of silicon carbide, silicon nitride, silicon oxide, aluminum nitride, and aluminum oxide.
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