公开(公告)号：US20050285240A1

公开(公告)日：2005-12-29

申请号：US11167169

申请日：2005-06-28

申请人： Eitaro Miyake ,  Yoshihiko Tojo ,  Osamu Usuda

发明人： Eitaro Miyake ,  Yoshihiko Tojo ,  Osamu Usuda

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L21/4842 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49537 ,  H01L23/49541 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device and manufacturing the semiconductor device are described. There is provided a method of manufacturing a semiconductor device including, disposing a lead frame inside an outer lead so as to couple between a coupling portion and a coupling acceptance portion, the lead frame including a chip mounting portion and the coupling acceptance portion, the outer lead including a frame portion with outer terminal portions and the coupling portion, disposing a semiconductor chip on the chip mounting portion, connecting between the outer terminal portions and the semiconductor chip with a plurality of wires or leads, sealing the outer terminal portion, the lead frame disposed the semiconductor chip on and the wires or the leads by a mold resin, cutting off the outer terminal portions from the outer lead, and uncoupling the coupling portion from the coupling acceptance portion.

摘要翻译： 描述半导体器件并制造半导体器件。 提供了一种制造半导体器件的方法，包括：将引线框架设置在外部引线内部以便耦合在耦合部分和耦合接受部分之间，引线框架包括芯片安装部分和耦合接合部分，外部 引线，其包括具有外部端子部分的框架部分和耦合部分，在芯片安装部分上设置半导体芯片，用多个导线或引线连接外部端子部分和半导体芯片之间，密封外部端子部分，引线 框架通过模制树脂将半导体芯片放置在导线或引线上，从外部引线切断外部端子部分，以及将耦合部分与联接接合部分分离。

公开(公告)号：US07332804B2

公开(公告)日：2008-02-19

申请号：US11167169

申请日：2005-06-28

申请人： Eitaro Miyake ,  Yoshihiko Tojo ,  Osamu Usuda

发明人： Eitaro Miyake ,  Yoshihiko Tojo ,  Osamu Usuda

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/4842 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49537 ,  H01L23/49541 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device and manufacturing the semiconductor device are described. There is provided a method of manufacturing a semiconductor device including, disposing a lead frame inside an outer lead so as to couple between a coupling portion and a coupling acceptance portion, the lead frame including a chip mounting portion and the coupling acceptance portion, the outer lead including a frame portion with outer terminal portions and the coupling portion, disposing a semiconductor chip on the chip mounting portion, connecting between the outer terminal portions and the semiconductor chip with a plurality of wires or leads, sealing the outer terminal portion, the lead frame disposed the semiconductor chip on and the wires or the leads by a mold resin, cutting off the outer terminal portions from the outer lead, and uncoupling the coupling portion from the coupling acceptance portion.

摘要翻译： 描述半导体器件并制造半导体器件。 提供了一种制造半导体器件的方法，包括：将引线框架设置在外部引线内部以便耦合在耦合部分和耦合接受部分之间，引线框架包括芯片安装部分和耦合接合部分，外部 引线，其包括具有外部端子部分的框架部分和耦合部分，在芯片安装部分上设置半导体芯片，用多个导线或引线连接外部端子部分和半导体芯片之间，密封外部端子部分，引线 框架通过模制树脂将半导体芯片放置在导线或引线上，从外部引线切断外部端子部分，以及将耦合部分与联接接合部分分离。

公开(公告)号：US08952508B2

公开(公告)日：2015-02-10

申请号：US13605687

申请日：2012-09-06

申请人： Eitaro Miyake

发明人： Eitaro Miyake

IPC分类号： H05K1/11 ,  H01L21/56 ,  H01L23/495 ,  H01L23/00

CPC分类号： H05K1/111 ,  H01L21/56 ,  H01L21/565 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49544 ,  H01L23/49551 ,  H01L24/45 ,  H01L24/78 ,  H01L24/97 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48247 ,  H01L2224/78301 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/2076

摘要： According to one embodiment, a lead frame includes a die pad having a mounting surface on which a semiconductor chip is mounted, plural leads having inner leads and outer leads, and a connecting member that extends from the die pad to both ends of a plurality of leads and connects the die pad and the plurality leads so that the ends of the inner leads are positioned above of the mounting surface.

摘要翻译： 根据一个实施例，引线框架包括：芯片焊盘，其具有安装有半导体芯片的安装面，具有内引线和外引线的多个引线以及从管芯焊盘延伸到多个焊盘的两端的连接部件 引导并连接芯片焊盘和多个引线，使得内部引线的端部位于安装表面的上方。

公开(公告)号：US06759735B2

公开(公告)日：2004-07-06

申请号：US10347927

申请日：2003-01-22

申请人： Ichiro Omura ,  Tomokazu Domon ,  Eitaro Miyake

发明人： Ichiro Omura ,  Tomokazu Domon ,  Eitaro Miyake

IPC分类号： H01L2302

CPC分类号： H01L23/051 ,  H01L24/72 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00

摘要： A plurality of semiconductor chips is each arranged over a first conductor. Each of semiconductor chips has a first main electrode, a second main electrode and a control electrode. A second conductor is electrically connected to the second main electrode and has columns each having an upper surface arranged over each of the semiconductor chips and equal to the number of the semiconductor chips. A circuit board has openings penetrated by the columns and equal to the number of the semiconductor chips and has a first insulating film, a third conductive film arranged on a back surface of the first insulating film and electrically connected to the second conductor, and a fourth conductive film arranged on a surface of the first insulating film and electrically connected to the control electrode.

摘要翻译： 多个半导体芯片分别布置在第一导体上。 每个半导体芯片具有第一主电极，第二主电极和控制电极。 第二导体电连接到第二主电极，并且具有各自具有布置在每个半导体芯片上的上表面并且等于半导体芯片的数量的列。 电路板具有通过列穿透并且等于半导体芯片的数量的开口，并且具有第一绝缘膜，布置在第一绝缘膜的背表面上并电连接到第二导体的第三导电膜，以及第四绝缘膜 导电膜布置在第一绝缘膜的表面上并电连接到控制电极。

公开(公告)号：US06605870B2

公开(公告)日：2003-08-12

申请号：US09774610

申请日：2001-02-01

申请人： Eitaro Miyake ,  Satoshi Yanagisawa

发明人： Eitaro Miyake ,  Satoshi Yanagisawa

IPC分类号： H01L2352

CPC分类号： H01L23/051 ,  H01L24/72 ,  H01L27/082 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2224/48 ,  H01L2924/00

摘要： A pressure-contact type semiconductor device comprises a plurality of semiconductor elements (IGBTs) which are in pressure contact with one another, and in which first main electrodes are electrically connected to a first common main power source plate (pressure-contact type emitter electrode plate), and second main electrodes are electrically connected to a second common main power source plate (pressure-contact type collector electrode). The pressure-contact type semiconductor device also includes a common control signal board which is constituted by a printed circuit board or a multi-layered printed circuit board, and extends over spaces between rows of semiconductor elements, thereby forming a path for sending a control signal.

摘要翻译： 压接型半导体器件包括彼此压力接触的多个半导体元件（IGBT），其中第一主电极电连接到第一公共主电源板（压接型发射极电极板 ），第二主电极与第二公共主电源板（压接型集电极）电连接。 压接型半导体器件还包括由印刷电路板或多层印刷电路板构成的公共控制信号板，并且在半导体元件行之间的空间上延伸，从而形成用于发送控制信号的路径 。

公开(公告)号：US06548890B2

公开(公告)日：2003-04-15

申请号：US10051001

申请日：2002-01-22

申请人： Eitaro Miyake ,  Yoshiki Endo ,  Ichiro Omura ,  Tomokazu Domon

发明人： Eitaro Miyake ,  Yoshiki Endo ,  Ichiro Omura ,  Tomokazu Domon

IPC分类号： H01L2348

CPC分类号： H01L23/051 ,  H01L24/90 ,  H01L25/072 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00

摘要： A press-contact type semiconductor device comprises: a plurality of semiconductor elements each of which has a first main electrode and a control electrode and a second main electrode; a second common main power source plate having the semiconductor elements positioned on a front surface thereof and electrically connected to the second main electrodes; a first common main power source plate arranged on the front surfaces of the semiconductor elements and electrically connected to the first main electrodes; a common control signal/main current plate arranged between semiconductor elements and including at least control signal wiring layers and main current wiring layers; conductive connectors for electrically connecting at least the main current wiring layers and the first common maim power source plate; and conductive elastic members for electrically connecting the main current wiring layers or the first common main power source plate to the conductive connectors by elasticity.

摘要翻译： 压触式半导体器件包括：多个半导体元件，每个半导体元件具有第一主电极和控制电极以及第二主电极; 第二公共主电源板，其半导体元件位于其前表面上并电连接到第二主电极; 第一公共主电源板，布置在半导体元件的前表面上并电连接到第一主电极; 布置在半导体元件之间并且至少包括控制信号布线层和主电流布线层的公共控制信号/主电流板; 导电连接器，用于至少电连接主电流布线层和第一公共电源电源板; 以及用于通过弹性将主电流布线层或第一公共主电源板电连接到导电连接器的导电弹性构件。

公开(公告)号：US08896113B2

公开(公告)日：2014-11-25

申请号：US13607522

申请日：2012-09-07

申请人： Eitaro Miyake

发明人： Eitaro Miyake

IPC分类号： B32B3/24 ,  H01L21/50 ,  H01L23/02 ,  H01L23/00 ,  H01L23/40 ,  H01L23/24

CPC分类号： H01L21/50 ,  H01L23/02 ,  H01L23/24 ,  H01L23/4006 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/83385 ,  H01L2924/01029 ,  H01L2924/0781 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/3511 ,  Y10T428/24273 ,  H01L2924/014 ,  H01L2924/00014

摘要： According to one embodiment, the base plate includes first and a second faces that are opposed to each other; the second face has a contoured rear surface, and the first area is set in the center of the plate. There is a second area with via holes in the peripheral areas of the center part. Also, the thickness of the second area is less than the thickness of the first area.

摘要翻译： 根据一个实施例，基板包括彼此相对的第一和第二面; 第二面具有轮廓的后表面，并且第一区域被设置在板的中心。 在中心部分的周边区域中有第二区域具有通孔。 此外，第二区域的厚度小于第一区域的厚度。