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    Sensor arrangement with pressure detector and sensor circuit
    1.
    发明授权
    Sensor arrangement with pressure detector and sensor circuit 失效
    传感器布置与压力检测器和传感器电路

    公开(公告)号：US06810746B2

    公开(公告)日：2004-11-02

    申请号：US10239817

    申请日：2002-12-09

    申请人： Erwin Naegele ,  Martin Knapp ,  Wolfgang E. Mueller ,  Andreas Fischer ,  Joerg Gebers

    发明人： Erwin Naegele ,  Martin Knapp ,  Wolfgang E. Mueller ,  Andreas Fischer ,  Joerg Gebers

    IPC分类号： G01L708

    CPC分类号： G01L9/0051

    摘要： A sensor arrangement has a housing, a pressure detector having a measuring diaphragm which is deflectable by a pressurized measurement medium, a sensor circuit attached directly to the measuring diaphragm, an electronic evaluation circuit connected to the sensor circuit and formed as a hybrid circuit, a connector contacted by an element selected from the group consisting of the sensor circuit, the evaluation circuit and both, the hybrid circuit being fastened directly to the measuring diaphragm by a conductive glue which produces electrical connections between the hybrid circuit and the sensor circuit fastened to the measuring diaphragm and produces a ground connection to the housing.

    摘要翻译： 传感器装置具有壳体，压力检测器，其具有可由加压测量介质偏转的测量膜片，直接附接到测量膜片的传感器电路，连接到传感器电路并形成为混合电路的电子评估电路， 连接器由选自传感器电路，评估电路和两者的元件接触，混合电路通过导电胶直接紧固到测量隔膜上，该导电胶在混合电路和固定到该混合电路的传感器电路之间产生电连接 测量隔膜并产生与外壳的接地连接。

    METHOD FOR DEPOSITING THIN FILMS BY MIXED PULSED CVD AND ALD
    3.
    发明申请
    METHOD FOR DEPOSITING THIN FILMS BY MIXED PULSED CVD AND ALD 有权
    通过混合脉冲CVD和ALD沉积薄膜的方法

    公开(公告)号：US20080317972A1

    公开(公告)日：2008-12-25

    申请号：US11766625

    申请日：2007-06-21

    申请人： Menso Hendriks ,  Martin Knapp ,  Suvi Haukka

    发明人： Menso Hendriks ,  Martin Knapp ,  Suvi Haukka

    IPC分类号： H05H1/24

    CPC分类号： C23C16/308 ,  C23C16/18 ,  C23C16/30 ,  C23C16/34 ,  C23C16/401 ,  C23C16/405 ,  C23C16/45523

    摘要： Films are deposited on a substrate by a process in which atomic layer deposition (ALD) is used to deposit one layer of the film and pulsed chemical vapor deposition (CVD) is used to deposit another layer of the film. During the ALD part of the process, a layer is formed by flowing sequential and alternating pulses of mutually reactive reactants that deposit self-limitingly on a substrate. During the pulsed CVD part of the process, another layer is deposited by flowing two CVD reactants into a reaction chamber, with at least a first of the CVD reactants flowed into the reaction chamber in pulses, with those pulses overlapping at least partially with the flow of a second of the CVD reactants. The ALD and CVD parts of the process ca be used to deposit layers with different compositions, thereby forming, e.g., nanolaminate films. Preferably, high quality layers are formed by flowing the second CVD reactant into the reaction chamber for a longer total duration than the first CVD reactant. In some embodiments, the pulses of the third reactant at separated by a duration at least about 1.75 times the length of the pulse. Preferably, less than about 8 monolayers of material are deposited per pulse of the first CVD reactant.

    摘要翻译： 通过使用原子层沉积（ALD）沉积一层膜并使用脉冲化学气相沉积（CVD）沉积另一层膜的方法将膜沉积在衬底上。 在该过程的ALD部分期间，通过使在衬底上自发沉积的相互反应的反应物的顺序和交替脉冲流动形成层。 在该过程的脉冲CVD部分期间，通过使两个CVD反应物流入反应室来沉积另一层，其中至少一个CVD反应物以脉冲流入反应室，这些脉冲至少部分地与流动重叠 的二分之一的CVD反应物。 该方法的ALD和CVD部分可用于沉积具有不同组成的层，从而形成例如Nanolaminate膜。 优选地，通过使第二CVD反应物流入反应室中比第一CVD反应物更长的总持续时间形成高质量的层。 在一些实施方案中，第三反应物的脉冲以脉冲长度的至少约1.75倍的持续时间隔开。 优选地，每个脉冲的第一CVD反应物沉积少于约8个单层的材料。

    Electronic device comprising a housing
    4.
    发明申请
    Electronic device comprising a housing 审中-公开
    电子设备包括壳体

    公开(公告)号：US20060175087A1

    公开(公告)日：2006-08-10

    申请号：US10514642

    申请日：2003-05-02

    申请人： Guenter Schelling ,  Gerhard Holzwarth ,  Martin Knapp ,  Christoph Wenger

    发明人： Guenter Schelling ,  Gerhard Holzwarth ,  Martin Knapp ,  Christoph Wenger

    IPC分类号： H05K5/00

    CPC分类号： H01F38/30

    摘要： An electronic device having a housing is provided, the housing having an interior space surrounded by housing walls. A torroidal coil is arranged in the interior space. Furthermore, the housing has a lead-through region which extends from the top to the bottom of the housing. In the lead-through region, which is completely surrounded by the interior space, the torroidal coil, and the housing wall a current-conducting element is accommodated.

    摘要翻译： 设有具有壳体的电子设备，该壳体具有由壳体壁包围的内部空间。 在内部空间设置有一个环形线圈。 此外，壳体具有从壳体的顶部延伸到底部的引导区域。 在由内部空间完全包围的导通区域中，环形线圈和壳体壁容纳导电元件。

    Method for depositing thin films by mixed pulsed CVD and ALD
    5.
    发明授权
    Method for depositing thin films by mixed pulsed CVD and ALD 有权
    通过混合脉冲CVD和ALD沉积薄膜的方法

    公开(公告)号：US08017182B2

    公开(公告)日：2011-09-13

    申请号：US11766625

    申请日：2007-06-21

    申请人： Menso Hendriks ,  Martin Knapp ,  Suvi Haukka

    发明人： Menso Hendriks ,  Martin Knapp ,  Suvi Haukka

    IPC分类号： C23C16/22

    CPC分类号： C23C16/308 ,  C23C16/18 ,  C23C16/30 ,  C23C16/34 ,  C23C16/401 ,  C23C16/405 ,  C23C16/45523

    摘要： Films are deposited on a substrate by a process in which atomic layer deposition (ALD) is used to deposit one layer of the film and pulsed chemical vapor deposition (CVD) is used to deposit another layer of the film. During the ALD part of the process, a layer is formed by flowing sequential and alternating pulses of mutually reactive reactants that deposit self-limitingly on a substrate. During the pulsed CVD part of the process, another layer is deposited by flowing two CVD reactants into a reaction chamber, with at least a first of the CVD reactants flowed into the reaction chamber in pulses, with those pulses overlapping at least partially with the flow of a second of the CVD reactants. The ALD and CVD parts of the process ca be used to deposit layers with different compositions, thereby forming, e.g., nanolaminate films. Preferably, high quality layers are formed by flowing the second CVD reactant into the reaction chamber for a longer total duration than the first CVD reactant. In some embodiments, the pulses of the third reactant at separated by a duration at least about 1.75 times the length of the pulse. Preferably, less than about 8 monolayers of material are deposited per pulse of the first CVD reactant.

    摘要翻译： 通过使用原子层沉积（ALD）沉积一层膜并使用脉冲化学气相沉积（CVD）沉积另一层膜的方法将膜沉积在衬底上。 在该过程的ALD部分期间，通过使在衬底上自发沉积的相互反应的反应物的顺序和交替脉冲流动形成层。 在该过程的脉冲CVD部分期间，通过使两个CVD反应物流入反应室来沉积另一层，其中至少一个CVD反应物以脉冲流入反应室，这些脉冲至少部分地与流动重叠 的二分之一的CVD反应物。 该方法的ALD和CVD部分可用于沉积具有不同组成的层，从而形成例如Nanolaminate膜。 优选地，通过使第二CVD反应物流入反应室中比第一CVD反应物更长的总持续时间形成高质量的层。 在一些实施方案中，第三反应物的脉冲以脉冲长度的至少约1.75倍的持续时间隔开。 优选地，每个脉冲的第一CVD反应物沉积少于约8个单层的材料。

    Highly light-scattering pigment mixture
    6.
    发明授权
    Highly light-scattering pigment mixture 有权
    高光散射颜料混合物

    公开(公告)号：US06648958B2

    公开(公告)日：2003-11-18

    申请号：US10292519

    申请日：2002-11-13

    申请人： Ralf Anselmann ,  Martin Knapp ,  Uta Hillgärtner

    发明人： Ralf Anselmann ,  Martin Knapp ,  Uta Hillgärtner

    IPC分类号： C09C128

    CPC分类号： C09C1/0087 ,  C01P2004/32 ,  C01P2004/61 ,  C01P2004/82 ,  C01P2006/60 ,  C01P2006/62 ,  C01P2006/66 ,  C09C1/3054

    摘要： Highly light-scattering pigment mixture featuring (i) 70-99.9% by weight of a component A consisting of spherical silicon dioxide with a diameter of less than 50 &mgr;m, coated with titanium dioxide and optionally a further layer of SiO2, and (ii) 0.1-30% by weight of a component B consisting of spherical silicon dioxide with a diameter of less than 50 &mgr;m, coated with titanium dioxide as a first layer and iron(III) oxide as a second, outer layer, the refractive index of the pigment being adjusted to a value of between 1.45 and 1.65.

    摘要翻译： 高光散射颜料混合物，其特征在于（i）70-99.9重量％的由直径小于50μm的球形二氧化硅组成的组分A，涂覆有二氧化钛和任选的另外的SiO 2层，以及（ii） 0.1-30重量％的由直径小于50μm的球形二氧化硅组成的组分B，其中涂覆有二氧化钛作为第一层和作为第二层的氧化铁（III），外层的折射率 颜料被调节到1.45和1.65之间的值。

    Method for the qualitative and/or quantitative analysis of tumour cells
    8.
    发明申请
    Method for the qualitative and/or quantitative analysis of tumour cells 审中-公开
    肿瘤细胞定性和/或定量分析方法

    公开(公告)号：US20120190057A1

    公开(公告)日：2012-07-26

    申请号：US13321817

    申请日：2010-05-19

    申请人： Khatuna Elizbarowna Gvichiya ,  Michael Edetsberger ,  Martin Knapp

    发明人： Khatuna Elizbarowna Gvichiya ,  Michael Edetsberger ,  Martin Knapp

    IPC分类号： G01N21/64

    CPC分类号： G01N33/582 ,  G01N33/57407

    摘要： A method for qualitative and/or quantitative analysis of tumor cells, including the following steps: a) generating a dye complex from an aminocoumarin and cyclodextrin; b) mixing the tumor cells with the dye complex prepared in step a); c) incubating the cells with the dye complex prepared in step a); d) analyzing the tumor cells by means of fluorescence microscopy and/or fluorescence spectrometric analysis.

    摘要翻译： 一种用于定性和/或定量分析肿瘤细胞的方法，包括以下步骤：a）从氨基香豆素和环糊精产生染料络合物; b）将肿瘤细胞与步骤a）中制备的染料络合物混合; c）将细胞与步骤a）中制备的染料络合物一起孵育; d）通过荧光显微镜和/或荧光光谱分析分析肿瘤细胞。

    Method of stacking chips with a removable connecting layer
    10.
    发明授权
    Method of stacking chips with a removable connecting layer 失效
    用可拆卸连接层堆叠芯片的方法

    公开(公告)号：US6040204A

    公开(公告)日：2000-03-21

    申请号：US143309

    申请日：1998-08-28

    申请人： Werner Herden ,  Johann Konrad ,  Hans-Peter Jahn ,  Martin Knapp ,  Hans-Peter Fuessl ,  Ning Qu

    发明人： Werner Herden ,  Johann Konrad ,  Hans-Peter Jahn ,  Martin Knapp ,  Hans-Peter Fuessl ,  Ning Qu

    IPC分类号： H01L25/07 ,  H01L21/98 ,  H01L27/00 ,  H01L29/866 ,  H01L23/10

    CPC分类号： H01L25/50 ,  H01L2924/0002

    摘要： A method for manufacturing chip stacks in which wafers are stacked one on top of the other. The wafer is provided with an adhesive foil on its bottom, and is subsequently cut into chips so that the adhesive foil remains intact and the chips adhering to the adhesive foil are stacked one on top of the other. A first layer of chips is reversibly attached to a baseplate, the adhesive foil is removed, the next layer of chips is attached to the bottom side of the chips already fastened to the baseplate, the adhesive foil is removed, and the last two steps are repeated until the desired number of chips is stacked one on top of the other.

    摘要翻译： 一种制造芯片堆叠的方法，其中晶片彼此层叠。 晶片在其底部设置有粘合剂箔，随后被切割成芯片，使得粘合箔保持完整，并且粘附到粘合剂箔的芯片一个堆叠在另一个之上。 第一层芯片可逆地连接到基板上，去除粘合箔，下一层芯片附着到已经固定在基板上的芯片的底部，去除粘合箔，最后两个步骤是 重复直到所需数量的芯片堆叠在另一个之上。