公开(公告)号：US08927414B2

公开(公告)日：2015-01-06

申请号：US13470487

申请日：2012-05-14

Applicant: Byoung-Iyong Choi ,  Eun-kyung Lee ,  Dong-mok Whang

Inventor： Byoung-Iyong Choi ,  Eun-kyung Lee ,  Dong-mok Whang

IPC: H01L21/4763 ,  H01L23/52

CPC classification number: H01L29/1606 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/02164 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02491 ,  H01L21/02527 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  H01L29/0673 ,  H01L29/66045 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/775 ,  H01L29/785 ,  H01L29/78684 ,  H01L29/78696

Abstract: A graphene structure and a method of manufacturing the graphene structure, and a graphene device and a method of manufacturing the graphene device. The graphene structure includes a substrate; a growth layer disposed on the substrate and having exposed side surfaces; and a graphene layer disposed on the side surfaces of the growth layer.

公开(公告)号：US09230801B2

公开(公告)日：2016-01-05

申请号：US13229183

申请日：2011-09-09

Applicant: Byoung-Iyong Choi ,  Eun-kyung Lee ,  Dong-mok Whang

Inventor： Byoung-Iyong Choi ,  Eun-kyung Lee ,  Dong-mok Whang

IPC: B32B9/00 ,  H01L21/02 ,  C01B31/04

CPC classification number: H01L21/02381 ,  C01B32/182 ,  H01L21/02428 ,  H01L21/02444 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02527 ,  H01L21/0259 ,  H01L21/02606 ,  H01L21/02664 ,  Y10T428/13 ,  Y10T428/24273 ,  Y10T428/24479 ,  Y10T428/30

Abstract: A graphene structure and a method of forming the same may include a graphene formed in a three-dimensional (3D) shape, e.g., a column shape, a stacking structure, and a three-dimensionally connected structure. The graphene structure can be formed by using Ge.

Abstract translation: 石墨烯结构及其形成方法可以包括以三维（3D）形状形成的石墨烯，例如柱状，堆叠结构和三维连接的结构。 可以使用Ge形成石墨烯结构。

公开(公告)号：US08679976B2

公开(公告)日：2014-03-25

申请号：US12976874

申请日：2010-12-22

Applicant: Eun-kyung Lee ,  Byoung-Iyong Choi ,  Dong-mok Whang ,  Jae-hyun Lee

Inventor： Eun-kyung Lee ,  Byoung-Iyong Choi ,  Dong-mok Whang ,  Jae-hyun Lee

IPC: H01L21/44

CPC classification number: H01L21/02527 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/186 ,  C01B2204/04 ,  C23C16/0272 ,  C23C16/26 ,  C30B25/02 ,  C30B29/08 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0262

Abstract: A method of manufacturing graphene includes forming a germanium layer on a surface of a substrate, and forming the graphene directly on the germanium layer by supplying carbon-containing gas into a chamber in which the substrate is disposed.

Abstract translation: 制造石墨烯的方法包括在基板的表面上形成锗层，并且通过将含碳气体供给到其中设置基板的室中，直接在锗层上形成石墨烯。

公开(公告)号：US20060227837A1

公开(公告)日：2006-10-12

申请号：US11285176

申请日：2005-11-23

Applicant: Eun-kyung Lee ,  Byoung-Iyong Choi

Inventor： Eun-kyung Lee ,  Byoung-Iyong Choi

IPC: H01S5/00

CPC classification number: B82Y20/00 ,  H01S5/026 ,  H01S5/041 ,  H01S5/18 ,  H01S5/34

Abstract: A quantum dot vertical capacity surface emitting laser (QD-VCSEL) and a method of manufacturing the same are provided. The QD-VCSEL includes a substrate, a lower distributed brag reflector (DBR) mirror formed on the substrate, an electron transport layer (ETL) formed on the lower DBR mirror, an emitting layer (EML) formed of nano-particle type group II-VI compound semiconductor quantum dots on the ETL, a hole transport layer (HTL) formed on the EML, and an upper DBR mirror formed on the HTL.

Abstract translation: 提供量子点垂直容量表面发射激光器（QD-VCSEL）及其制造方法。 QD-VCSEL包括基板，形成在基板上的下分布式布拉格反射镜（DBR）反射镜，形成在下DBR反射镜上的电子传输层（ETL），由纳米颗粒型II组形成的发射层（EML） -VI化合物半导体量子点，在EML上形成的空穴传输层（HTL）和形成在HTL上的上DBR反射镜。

公开(公告)号：US20060212975A1

公开(公告)日：2006-09-21

申请号：US11369859

申请日：2006-03-08

Applicant: Byoung-Iyong Choi ,  Eun-kyung Lee

Inventor： Byoung-Iyong Choi ,  Eun-kyung Lee

IPC: H01L51/40

CPC classification number: B82Y30/00 ,  C30B11/12 ,  C30B29/605 ,  Y10S977/721 ,  Y10S977/762 ,  Y10S977/768 ,  Y10S977/789 ,  Y10S977/81 ,  Y10S977/938

Abstract: Provided are nano wires and a method of manufacturing the same. The method includes forming microgrooves having a plurality of microcavities, the microgrooves forming a regular pattern on a surface of a silicon substrate; forming a metal layer on the silicon substrate by depositing a material which acts as a catalyst to form nano wires on the silicon substrate; agglomerating the metal layer within the microgrooves on the surface of the silicon substrate by heating the metal layer to form catalysts; and growing the nano wires between the catalysts and the silicon substrate using a thermal process.

Abstract translation: 提供纳米线及其制造方法。 该方法包括形成具有多个微腔的微槽，微槽在硅衬底的表面上形成规则图案; 通过沉积作为催化剂的材料在硅衬底上形成纳米线，在硅衬底上形成金属层; 通过加热金属层以形成催化剂，将硅衬底表面上的微槽内的金属层凝集成形成催化剂; 并使用热处理在催化剂和硅衬底之间生长纳米线。

公开(公告)号：US08353613B2

公开(公告)日：2013-01-15

申请号：US12687290

申请日：2010-01-14

Applicant: Byoung-Iyong Choi ,  Hong-seok Lee ,  Jong-min Kim ,  Eun-kyung Lee

Inventor： Byoung-Iyong Choi ,  Hong-seok Lee ,  Jong-min Kim ,  Eun-kyung Lee

IPC: F21V7/04 ,  H01L33/00

CPC classification number: G02B6/0035 ,  G02B6/0038

Abstract: A light guide plate includes a plurality of quantum dots on at least one of a surface of the light guide plate and inside the light guide plate, wherein the plurality of quantum dots emit light having a different wavelength than a light incident thereto.

Abstract translation: 导光板在导光板的表面和导光板的至少一个上包括多个量子点，其中多个量子点发射具有与入射到其上的光不同的波长的光。

公开(公告)号：US07750353B2

公开(公告)日：2010-07-06

申请号：US11350751

申请日：2006-02-10

Applicant: Eun-kyung Lee ,  Byoung-Iyong Choi ,  Pil-soo Ahn ,  Jun-young Kim ,  Young-gu Jin

Inventor： Eun-kyung Lee ,  Byoung-Iyong Choi ,  Pil-soo Ahn ,  Jun-young Kim ,  Young-gu Jin

IPC: H01L21/00

CPC classification number: H01L33/34 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  G01Q80/00 ,  H01L27/14601 ,  H01L27/14621 ,  H01L27/14645 ,  H01L27/14683 ,  H01L27/156 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/035281 ,  H01L31/1804 ,  H01L33/0054 ,  H01L33/24 ,  Y02E10/547 ,  Y02P70/521

Abstract: A method of manufacturing a silicon optoelectronic device, a silicon optoelectronic device manufactured by the method, and an image input and/or output apparatus including the silicon optoelectronic device are provided. The method includes preparing an n- or p-type silicon-based substrate, forming a microdefect pattern along a surface of the substrate by etching, forming a control film with an opening on the microdefect pattern, and forming a doping region on the surface of the substrate having the microdefect pattern in such a way that a predetermined dopant of the opposite type to the substrate is injected onto the substrate through the opening of the control film to be doped to a depth so that a photoelectric conversion effect leading to light emission and/or reception by quantum confinement effect in the p-n junction occurs. The silicon optoelectronic device has superior light-emitting efficiency, can be used as at least one of a light-emitting device and a light-receiving device, and has high wavelength selectivity. In addition, the silicon optoelectronic device panel having the two-dimensional array of the silicon optoelectronic devices can be applied in the image input and/or output apparatus capable of directly displaying an image and/or inputting optical information in a screen.

公开(公告)号：US20060269745A1

公开(公告)日：2006-11-30

申请号：US11362046

申请日：2006-02-27

Applicant: Eun-kyung Lee ,  Byoung-Iyong Choi ,  Sang-jun Choi ,  Hoon Kim

Inventor： Eun-kyung Lee ,  Byoung-Iyong Choi ,  Sang-jun Choi ,  Hoon Kim

IPC: D02G3/00

CPC classification number: H01L21/0273 ,  H01L21/26533 ,  H01L21/31654 ,  H01L21/76243 ,  H01L33/20 ,  Y10T428/2913

Abstract: The present invention provides a method of manufacturing nano wires and nano wires having a p-n junction structure. The method includes: stacking a mask layer on a substrate; patterning the mask layer into stripes; and performing an oxygen ion injection process on the substrate and the mask layer to form oxygen ion injection regions in the substrate, thereby forming nano wire regions embedded in the substrate and separated from the substrate by the oxygen ion injection regions.

Abstract translation: 本发明提供一种制造具有p-n结结构的纳米线和纳米线的方法。 该方法包括：在基板上层叠掩模层; 将掩模层图案化成条纹; 在基板和掩模层上进行氧离子注入处理，在基板上形成氧离子注入区域，由此形成嵌入到基板内的纳米线区域，并通过氧离子注入区域与基板分离。

公开(公告)号：US20060182966A1

公开(公告)日：2006-08-17

申请号：US11349250

申请日：2006-02-08

Applicant: Eun-kyung Lee ,  Byoung-Iyong Choi

Inventor： Eun-kyung Lee ,  Byoung-Iyong Choi

IPC: D02G3/00

CPC classification number: C30B29/06 ,  B82Y30/00 ,  C30B11/12 ,  C30B25/00 ,  C30B29/60 ,  Y10T428/2933

Abstract: Silicon nano wires having silicon nitride shells and a method of manufacturing the same are provided. Each silicon nano wire has a core portion formed of silicon, and a shell portion formed of silicon nitride surrounding the core portion. The method includes removing silicon oxide formed on the shell of the silicon nano wire and forming a silicon nitride shell.

Abstract translation: 提供了具有氮化硅壳的硅纳米线及其制造方法。 每个硅纳米线具有由硅形成的芯部分和由围绕芯部分的氮化硅形成的壳部分。 该方法包括去除形成在硅纳米线的外壳上并形成氮化硅壳的氧化硅。

公开(公告)号：US07012239B2

公开(公告)日：2006-03-14

申请号：US10716665

申请日：2003-11-20

Applicant: Jun-young Kim ,  Byoung-Iyong Choi ,  Eun-kyung Lee

Inventor： Jun-young Kim ,  Byoung-Iyong Choi ,  Eun-kyung Lee

IPC: H01L31/00

CPC classification number: H01L31/125 ,  H01L31/173

Abstract: A silicon optoelectronic device includes an optoelectronic device portion and a switching portion. The switching portion selectively controls the emission and detection of light by the optoelectronic device portion. The optoelectronic device portion includes: a doped region of the opposite type to an n- or p-type silicon-based substrate, in which emission and detection of light occurs due to quantum confinement effect at the p-n junction between the doped region and the substrate, and at least one semiconductor material region formed on the rear surface of the substrate, at least a portion of which forms a stack structure with the doped region so that a built-in transistor is formed. The silicon optoelectronic device allows selective light emission and detection without any external amplifying and switching circuits, easy control the duration of light emission and detection, and can be manufactured in a series of semiconductor fabrication process.

Abstract translation: 硅光电子器件包括光电器件部分和开关部分。 开关部分选择性地控制由光电子器件部分发出的光的发射和检测。 光电子器件部分包括：与n型或p型硅基衬底相反类型的掺杂区域，其中由于在掺杂区域和衬底之间的pn结处的量子限制效应而发生光的发射和检测 以及形成在所述衬底的后表面上的至少一个半导体材料区域，其至少一部分与所述掺杂区域形成堆叠结构，从而形成内置晶体管。 硅光电子器件允许选择性发光和检测，而无需任何外部放大和开关电路，便于控制发光和检测的持续时间，并且可以在一系列半导体制造工艺中制造。