公开(公告)号：US10998309B2

公开(公告)日：2021-05-04

申请号：US16566579

申请日：2019-09-10

申请人： Fuji Electric Co., Ltd.

发明人： Masashi Hoya ,  Katsumi Taniguchi ,  Naoyuki Kanai

IPC分类号： H01L23/498 ,  H01L27/06 ,  H01L23/31 ,  H01L23/522

摘要： A semiconductor unit includes: a plurality of transistor chips arranged in a plurality of parallel rows, each transistor chip respectively having a first main electrode on one surface and a second main electrode on another surface; a first conductor layer electrically connected to the first main electrodes of the transistor chips, both corner portions on one end of the first conductor layer being drawn out in a direction in which the rows of transistor chips run; a second conductor layer arranged between the both corner portions of the first conductor layer; and a wiring substrate that is arranged on a side of the second main electrodes of the plurality of transistor chips and includes a wiring layer electrically connected to the second main electrodes of the plurality of transistor chips and to the second conductor layer.

公开(公告)号：US20170278771A1

公开(公告)日：2017-09-28

申请号：US15445421

申请日：2017-02-28

申请人： Fuji Electric Co., Ltd.

发明人： Naoyuki Kanai ,  Tatsuhiko Asai

IPC分类号： H01L23/373 ,  H01L23/29 ,  H01L21/52 ,  H01L23/00 ,  H01L21/48 ,  H01L23/053 ,  H01L23/08 ,  H01L23/18 ,  H01L23/31 ,  H01L21/56

CPC分类号： H01L23/3735 ,  H01L21/4803 ,  H01L21/52 ,  H01L21/565 ,  H01L23/053 ,  H01L23/08 ,  H01L23/18 ,  H01L23/295 ,  H01L23/3121 ,  H01L24/01 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/29111 ,  H01L2224/2912 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/4516 ,  H01L2224/45565 ,  H01L2224/45624 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/067 ,  H01L2924/0705 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12032 ,  H01L2924/13055 ,  H01L2924/15747 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/186 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/2076

摘要： A highly-reliable semiconductor device has improved adhesion between a sealing material and a sealed metal member and/or a case member. In some implementations, the semiconductor device includes: a laminated substrate on which a semiconductor element is mounted; and a sealing material. In some implementations, the sealing material contains an epoxy base resin, a curing agent, and a phosphonic acid.

公开(公告)号：US11309276B2

公开(公告)日：2022-04-19

申请号：US17185931

申请日：2021-02-25

申请人： FUJI ELECTRIC CO., LTD.

发明人： Yuma Murata ,  Ryoichi Kato ,  Naoyuki Kanai ,  Akito Nakagome ,  Yoshinari Ikeda

IPC分类号： H01L23/00 ,  H01L23/538 ,  H01L25/07

摘要： A semiconductor module includes a case with a side wall in a first direction in which gate and source terminals are embodied and exposed therefrom, first and second semiconductor elements each having gate and source electrodes, gate and source relay layers positioned at a center between the first and second semiconductor elements in the first direction at a side of the semiconductor elements farther from the side wall, first gate and source wires respectively connecting the gate and source terminals to the gate and source relay layers, second gate and source wires, and third gate and source wires, respectively connecting the gate and source electrodes of the first semiconductor element, and the gate and source electrode of the second semiconductor element, to the gate and source relay layers. The first to third source wires are respectively located closer to the first to third gate wires than any other gate wires.

公开(公告)号：US10418359B2

公开(公告)日：2019-09-17

申请号：US15390683

申请日：2016-12-26

申请人： FUJI ELECTRIC CO., LTD.

发明人： Naoyuki Kanai ,  Motohito Hori ,  Satoshi Kaneko

IPC分类号： H01L29/16 ,  H01L27/06 ,  H01L21/56 ,  H01L23/31 ,  H01L29/06 ,  H01L29/66 ,  H01L29/739 ,  H01L29/872 ,  H01L25/065 ,  H01L23/24 ,  H01L23/00 ,  H01L23/049

摘要： A semiconductor device 100 includes a semiconductor element 12 having an electrode on a front surface, a wire 15 bonded to the electrode of the semiconductor element 12, a resin layer 22b covering a bonding portion of the wire 15 on the front surface of the semiconductor element 12, and a gel filler material 23 that seals the semiconductor element 12, the wire 15, and the resin layer 22b. By protecting the bonding portion of the wire 15 with the resin layer 22b, degradation of the wire 15 is ameliorated and the reliability of the semiconductor device 100 is improved.

公开(公告)号：US10256169B2

公开(公告)日：2019-04-09

申请号：US15445421

申请日：2017-02-28

申请人： Fuji Electric Co., Ltd.

发明人： Naoyuki Kanai ,  Tatsuhiko Asai

IPC分类号： H01L23/373 ,  H01L21/48 ,  H01L21/52 ,  H01L21/56 ,  H01L23/053 ,  H01L23/08 ,  H01L23/18 ,  H01L23/29 ,  H01L23/31 ,  H01L23/00

摘要： A highly-reliable semiconductor device has improved adhesion between a sealing material and a sealed metal member and/or a case member. In some implementations, the semiconductor device includes: a laminated substrate on which a semiconductor element is mounted; and a sealing material. In some implementations, the sealing material contains an epoxy base resin, a curing agent, and a phosphonic acid.

公开(公告)号：US12057367B2

公开(公告)日：2024-08-06

申请号：US17586264

申请日：2022-01-27

申请人： FUJI ELECTRIC CO., LTD.

发明人： Yushi Sato ,  Yuichiro Hinata ,  Naoyuki Kanai

IPC分类号： H01L23/06 ,  H01L21/48 ,  H01L21/56 ,  H01L23/10 ,  H01L23/31 ,  H01L23/373

CPC分类号： H01L23/3735 ,  H01L21/4807 ,  H01L21/565 ,  H01L23/3107

摘要： A semiconductor device includes a semiconductor chip, an insulated circuit board including a metal plate, an insulating plate and a circuit pattern, each of which has a rectangular shape, and a spacer part disposed on the periphery of a rear surface of the metal plate including at least one of the four corners thereof. The spacer part protrudes from a rear surface of the metal plate in the thickness direction away from a front surface of the insulated circuit board.

公开(公告)号：US12046539B2

公开(公告)日：2024-07-23

申请号：US17542949

申请日：2021-12-06

申请人： Fuji Electric Co., Ltd.

发明人： Yuichiro Hinata ,  Yuma Murata ,  Naoyuki Kanai ,  Ryoichi Kato

IPC分类号： H01L23/495 ,  H01L23/58 ,  H01R43/02 ,  H01G2/00

CPC分类号： H01L23/495 ,  H01L23/58 ,  H01R43/0221 ,  H01G2/00

摘要： A semiconductor module includes a resin case housing a semiconductor element; an insulating layer extending outward from the resin case; and a first external connection terminal extending outward from the resin case, arranged above the insulating layer so as to face the insulting layer, the first external connection terminal having a non-contact portion that is not in contact with the insulating layer in a thickness direction of the insulating layer at a position overlapping the insulating layer in a plan view.

公开(公告)号：US09818687B2

公开(公告)日：2017-11-14

申请号：US15177658

申请日：2016-06-09

申请人： Fuji Electric Co., Ltd.

发明人： Naoyuki Kanai

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L23/24 ,  H01L23/60 ,  H01L23/373 ,  H01L23/00 ,  H01L25/07 ,  H01L23/14

CPC分类号： H01L23/49894 ,  H01L21/4871 ,  H01L21/563 ,  H01L23/053 ,  H01L23/142 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/3735 ,  H01L23/49811 ,  H01L23/60 ,  H01L24/29 ,  H01L24/32 ,  H01L24/40 ,  H01L24/45 ,  H01L24/73 ,  H01L25/072 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/40137 ,  H01L2224/40227 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/4516 ,  H01L2224/45565 ,  H01L2224/45624 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12032 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/2076 ,  H01L2224/37099

摘要： A semiconductor module includes an insulated circuit board that includes an insulating substrate, a first conductive plate arranged on a first principal surface of the insulating substrate and within the outer edges of the insulating substrate, and a second conductive plate arranged within the outer edges of the insulating substrate on a second principal surface of the insulating substrate that faces the first principal surface. Furthermore, boundary edges between the first principal surface of the insulating substrate and the side faces of the first conductive plate are covered by an ion gel that contains an ionic liquid.

公开(公告)号：US11610826B2

公开(公告)日：2023-03-21

申请号：US17363628

申请日：2021-06-30

申请人： FUJI ELECTRIC CO., LTD.

发明人： Naoyuki Kanai ,  Yuichiro Hinata ,  Yuta Tamai

IPC分类号： H01L23/00 ,  H01L23/055 ,  H01L23/31

摘要： A semiconductor module is provided with: a case having a frame that surrounds a substrate and a terminal block formed extending inward from an inner wall surface of the frame; a terminal having one end extending outward from the frame, and another end extending inward from the frame and being secured to a top face of the terminal block; a wiring member that electrically connects the terminal and a semiconductor element on the substrate; and an encapsulating resin that encapsulates the other end of the terminal, the wiring member, and the semiconductor element inside the case. A hole is formed in the top face of the terminal block. The hole is filled with the encapsulating resin, and is positioned closer to the inner wall surface of the frame than a bonding part between the terminal and the wiring member.

公开(公告)号：US11437302B2

公开(公告)日：2022-09-06

申请号：US17242812

申请日：2021-04-28

申请人： FUJI ELECTRIC CO., LTD.

发明人： Naoyuki Kanai ,  Yuichiro Hinata

IPC分类号： H01L23/49 ,  H01L23/047 ,  H01L23/31 ,  H01L23/373 ,  H01L23/50 ,  H01L21/48 ,  H01L21/56

摘要： Provided are a semiconductor module capable of easily connecting extraction pin with a wiring board and having reliable connections, and a method for manufacturing the same. A semiconductor module includes: a multilayer board having a semiconductor device mounted thereon, the multilayer board electrically connecting to the semiconductor device; an extraction pin electrically connecting to one of the semiconductor device and the multilayer board; and a wiring board bonded to the extraction pin for electrical connection. The extraction pin has a press-fit. The wiring board has a hole portion bonded with the press-fit of the extraction pin. The base materials of the press-fit of the extraction pin and the hole portion of the wiring board are copper (Cu). A bonded portion between the base materials of press-fit and the corresponding hole portion of the wiring board includes a CuSnNi alloy layer.