公开(公告)号：US07030038B1

公开(公告)日：2006-04-18

申请号：US09176422

申请日：1998-10-21

申请人： Glen D. Wilk ,  Robert M. Wallace ,  Berinder P. S. Brar

发明人： Glen D. Wilk ,  Robert M. Wallace ,  Berinder P. S. Brar

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/31662 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/28211 ,  H01L29/51 ,  H01L29/7833

摘要： This invention pertains generally to forming thin oxides at low temperatures, and more particularly to forming uniformly thick, thin oxides. We disclose a low temperature method for forming a thin, uniform oxide 16 on a silicon surface 12. This method includes providing a partially completed integrated circuit on a semiconductor substrate 10 with a clean, hydrogen terminated or atomically flat, silicon surface 12; and stabilizing the substrate at a first temperature. The method further includes exposing the silicon surface to an atmosphere 14 including ozone, while maintaining the substrate 10 at the first temperature. In this method, the exposing step creates a uniformly thick, oxide film 16. This method is suitable for room temperature processing.

摘要翻译： 本发明一般涉及在低温下形成薄氧化物，尤其涉及形成均匀的厚的氧化物。 我们公开了在硅表面12上形成薄均匀氧化物16的低温方法。 该方法包括在半导体衬底10上提供部分完成的集成电路，其具有清洁的氢封端或原子平坦的硅表面12; 以及在第一温度下稳定所述衬底。 该方法还包括将硅表面暴露于包括臭氧的气氛14，同时将衬底10保持在第一温度。 在该方法中，曝光步骤产生均匀厚的氧化膜16。 该方法适用于室温处理。

公开(公告)号：US06468856B2

公开(公告)日：2002-10-22

申请号：US09798329

申请日：2001-03-02

申请人： Robert M. Wallace ,  Glen D. Wilk ,  Mark Anthony ,  Dim-Lee Kwong

发明人： Robert M. Wallace ,  Glen D. Wilk ,  Mark Anthony ,  Dim-Lee Kwong

IPC分类号： H01L218242

CPC分类号： H01L21/0214 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02197 ,  H01L21/02249 ,  H01L21/28167 ,  H01L21/3143 ,  H01L21/31612 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31691 ,  H01L29/51

摘要： An integrated circuit capacitor comprising a high permittivity dielectric and a method of forming the same are disclosed herein. In one embodiment, this capacitor may be used as a DRAM storage cell. For example, a DRAM storage node electrode 22 may be formed of polysilicon. An ultrathin oxynitride passivation layer 25 (e.g. less than 1 nm) is formed on this electrode by exposure of the substrate to NO. A tantalum pentoxide layer 24 is formed over layer 25, followed by a cell plate 26. Passivation layer 25 allows electrode 22 to resist oxidation during deposition of layer 25, thus preventing formation of an interfacial oxide layer. A passivation layer formed by this method may typically be deposited with shorter exposure times and lower temperatures than nitride passivation layers.

摘要翻译： 本文公开了包括高介电常数介电体的集成电路电容器及其形成方法。 在一个实施例中，该电容器可以用作DRAM存储单元。 例如，DRAM存储节点电极22可以由多晶硅形成。 通过将衬底暴露于NO，在该电极上形成超薄氧氮化物钝化层25（例如小于1nm）。 在层25上形成五氧化二钽层24，随后形成电池板26.钝化层25允许电极22在层25沉积期间抵抗氧化，从而防止形成界面氧化物层。 通过该方法形成的钝化层通常可以以比氮化物钝化层更短的曝光时间和更低的温度沉积。

公开(公告)号：US06245606B1

公开(公告)日：2001-06-12

申请号：US09421815

申请日：1999-10-20

申请人： Glen D. Wilk ,  Robert M. Wallace

发明人： Glen D. Wilk ,  Robert M. Wallace

IPC分类号： H01L218238

CPC分类号： H01L29/513 ,  H01L21/28229 ,  H01L21/31683 ,  H01L29/517

摘要： This invention pertains generally to forming thin aluminum oxides at low temperatures, and more particularly to forming uniformly thick, aluminum gate oxides. We disclose a low temperature method for forming a thin, uniform aluminum gate oxide 16 on a silicon surface 12. This method includes providing a partially completed integrated circuit on a semiconductor substrate 10 with a clean, hydrogen terminated or atomically flat, silicon surface 12; forming a uniformly thick aluminum layer 13; and stabilizing the substrate at a first temperature. The method further includes exposing the aluminum layer to an atmosphere 14 including ozone, while maintaining the substrate 10 at the first temperature. In this method, the exposing step creates a uniformly thick, aluminum oxide film 16. This method is suitable for room temperature processing.

摘要翻译： 本发明一般涉及在低温下形成薄的氧化铝，更特别地涉及形成均匀厚的铝栅极氧化物。 我们公开了一种用于在硅表面12上形成薄均匀的铝栅极氧化物16的低温方法。该方法包括在半导体衬底10上提供部分完成的集成电路，其具有清洁的氢端接或原子平坦的硅表面12; 形成均匀厚的铝层13; 以及在第一温度下稳定所述衬底。 该方法还包括将铝层暴露于包括臭氧的气氛14，同时将衬底10保持在第一温度。 在该方法中，曝光步骤产生均匀厚的氧化铝膜16.该方法适用于室温处理。

公开(公告)号：US6020247A

公开(公告)日：2000-02-01

申请号：US904009

申请日：1997-07-31

申请人： Glen D. Wilk ,  Yi Wei ,  Robert M. Wallace

发明人： Glen D. Wilk ,  Yi Wei ,  Robert M. Wallace

IPC分类号： H01L21/302 ,  H01L21/20 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/316 ,  H01L21/469

CPC分类号： H01L21/02043 ,  H01L21/02046 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02301 ,  H01L21/02312 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/31662 ,  Y10S438/974

摘要： A method of preparing a surface for and forming a thin film on a single-crystal silicon substrate is disclosed. One embodiment of his method comprises forming an oxidized silicon layer (which may be a native oxide) on at least one region of the substrate, and thermally annealing the substrate in a vacuum while supplying a silicon-containing flux to the oxide surface, thus removing the oxidized silicon layer. Preferably, the thin film is formed immediately after removal of the oxidized silicon layer. The silicon-containing flux is preferably insufficient to deposit a silicon-containing layer on top of the oxidized silicon layer, and yet sufficient to substantially inhibit an SiO-forming reaction between the silicon substrate and the oxidized silicon layer. The method of the invention allows for growth or deposition of films which have exceptionally smooth interfaces (less than 0.1 nm rms roughness) with the underlying silicon substrate at temperatures less than 800.degree. C., and is ideally suited for deposition of ultrathin films having thicknesses less than about 5 nm.

摘要翻译： 公开了一种制备在单晶硅衬底上形成薄膜的表面的方法。 他的方法的一个实施方案包括在衬底的至少一个区域上形成氧化硅层（其可以是天然氧化物），并且在真空中对衬底进行热退火，同时向氧化物表面提供含硅助焊剂，从而除去 氧化硅层。 优选地，在去除氧化硅层之后立即形成薄膜。 含硅助焊剂优选不足以在氧化硅层的顶部上沉积含硅层，并且还足以基本上抑制硅衬底和氧化硅层之间的形成SiO的反应。 本发明的方法允许在低于800℃的温度下与下面的硅衬底具有非常平滑的界面（小于0.1nm均方根粗糙度）的生长或沉积，并且理想地适用于沉积具有厚度的超薄膜 小于约5nm。

公开(公告)号：US6013553A

公开(公告)日：2000-01-11

申请号：US115773

申请日：1998-07-15

申请人： Robert M. Wallace ,  Richard A. Stoltz ,  Glen D. Wilk

发明人： Robert M. Wallace ,  Richard A. Stoltz ,  Glen D. Wilk

IPC分类号： H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L29/51 ,  H01L21/283 ,  H01L21/31 ,  H01L21/441 ,  H01L21/469

CPC分类号： H01L21/31691 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28229 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L21/3143 ,  H01L21/31612 ,  H01L21/31641 ,  H01L21/31645

摘要： A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide.

摘要翻译： 本文公开了包括高介电常数锆（或铪）氧氮化物栅极电介质的场效应半导体器件及其形成方法。 该器件包括其中形成有半导体沟道区24的硅衬底20。 在该衬底上形成氧氮化锆栅极电介质层36，然后形成导电栅极38.氧氮化硅栅极电介质层36的介电常数明显高于二氧化硅的介电常数。

公开(公告)号：US06730977B2

公开(公告)日：2004-05-04

申请号：US10452999

申请日：2003-06-03

申请人： Glen D. Wilk ,  John Mark Anthony ,  Yi Wei ,  Robert M. Wallace

发明人： Glen D. Wilk ,  John Mark Anthony ,  Yi Wei ,  Robert M. Wallace

IPC分类号： H01L2976

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/3185 ,  H01L29/511 ,  H01L29/513 ,  H01L29/518

摘要： A method for forming a thermal silicon nitride on a semiconductor substrate is disclosed. This method allows formation of thermal silicon nitride that is thick enough for a FET gate dielectric, but has a low thermal budget.

摘要翻译： 公开了一种在半导体衬底上形成热氮化硅的方法。 该方法允许形成足够厚的用于FET栅极电介质但具有低热量预算的热氮化硅。

公开(公告)号：US06258637B1

公开(公告)日：2001-07-10

申请号：US09452922

申请日：1999-12-02

申请人： Glen D. Wilk ,  Yi Wei ,  Robert M. Wallace

发明人： Glen D. Wilk ,  Yi Wei ,  Robert M. Wallace

IPC分类号： H01L2100

CPC分类号： H01L21/02043 ,  H01L21/02046 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02301 ,  H01L21/02312 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/31662 ,  Y10S438/974

摘要： A method of preparing a surface for and forming a thin film on a single-crystal silicon substrate is disclosed. One embodiment of his method comprises forming an oxidized silicon layer (which may be a native oxide) on at least one region of the substrate, and thermally annealing the substrate in a vacuum while supplying a silicon-containing flux to the oxide surface, thus removing the oxidized silicon layer. Preferably, the thin film is formed immediately after removal of the oxidized silicon layer. The silicon-containing flux is preferably insufficient to deposit a silicon-containing layer on top of the oxidized silicon layer, and yet sufficient to substantially inhibit an SiO-forming reaction between the silicon substrate and the oxidized silicon layer. The method of the invention allows for growth or deposition of films which have exceptionally smooth interfaces (less than 0.1 nm rms roughness) with the underlying silicon substrate at temperatures less than 800° C., and is ideally suited for deposition of ultrathin films having thicknesses less than about 5 nm.

摘要翻译： 公开了一种制备在单晶硅衬底上形成薄膜的表面的方法。 他的方法的一个实施方案包括在衬底的至少一个区域上形成氧化硅层（其可以是天然氧化物），并且在真空中对衬底进行热退火，同时向氧化物表面提供含硅助焊剂，从而除去 氧化硅层。 优选地，在去除氧化硅层之后立即形成薄膜。 含硅助焊剂优选不足以在氧化硅层的顶部上沉积含硅层，并且还足以基本上抑制硅衬底和氧化硅层之间的形成SiO的反应。 本发明的方法允许在低于800℃的温度下与底层硅衬底具有非常平滑的界面（小于0.1nm均方根粗糙度）的生长或沉积，并且理想地适用于沉积具有厚度的超薄膜 小于约5nm。

公开(公告)号：US6020243A

公开(公告)日：2000-02-01

申请号：US115859

申请日：1998-07-15

申请人： Robert M. Wallace ,  Richard A. Stoltz ,  Glen D. Wilk

发明人： Robert M. Wallace ,  Richard A. Stoltz ,  Glen D. Wilk

IPC分类号： H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L29/51 ,  H01L21/283 ,  H01L21/31 ,  H01L21/441 ,  H01L21/469

CPC分类号： H01L21/31691 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28229 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L21/3143 ,  H01L21/31612 ,  H01L21/31641 ,  H01L21/31645

摘要： A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) silicon-oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium silicon-oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium silicon-oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide. However, the zirconium silicon-oxynitride gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability.

摘要翻译： 本文公开了包括高介电常数锆（或铪）硅 - 氧氮化物栅极电介质的场效应半导体器件及其形成方法。 该器件包括其中形成有半导体沟道区24的硅衬底20。 在该衬底上形成锆硅氧烷栅极电介质层36，然后形成导电栅极38.具有介电常数的氧化硅 - 氧氮化硅栅极电介质层36显着高于二氧化硅的介电常数。 然而，锆硅氧烷栅极电介质也可以被设计为具有二氧化硅的优点，例如， 高击穿，低界面状态密度和高稳定性。

公开(公告)号：US07115461B2

公开(公告)日：2006-10-03

申请号：US11015604

申请日：2004-12-17

申请人： John Mark Anthony ,  Scott R. Summerfelt ,  Robert M. Wallace ,  Glen D. Wilk

发明人： John Mark Anthony ,  Scott R. Summerfelt ,  Robert M. Wallace ,  Glen D. Wilk

IPC分类号： H01L21/8238

CPC分类号： H01L21/31691 ,  H01L21/02181 ,  H01L21/02323 ,  H01L21/0234 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28229 ,  H01L21/3143 ,  H01L21/31612 ,  H01L21/31641 ,  H01L21/31645 ,  H01L29/517

摘要： A field effect semiconductor device comprising a high permittivity silicate gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A metal silicate gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Silicate layer 36 may be, e.g., hafnium silicate, such that the dielectric constant of the gate dielectric is significantly higher than the dielectric constant of silicon dioxide. However, the silicate gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability. The present invention includes methods for depositing both amorphous and polycrystalline silicate layers, as well as graded composition silicate layers.

摘要翻译： 本文公开了包括高介电常数硅酸盐栅极电介质的场效应半导体器件及其形成方法。 该器件包括其中形成有半导体沟道区24的硅衬底20。 在该衬底上形成金属硅酸盐栅极电介质层36，之后是导电栅极38。 硅酸盐层36可以是例如硅酸铪，使得栅极电介质的介电常数显着高于二氧化硅的介电常数。 然而，硅酸盐栅极电介质也可以被设计成具有二氧化硅的优点。 高击穿，低界面状态密度和高稳定性。 本发明包括沉积无定形和多晶硅酸盐层以及梯度组合硅酸盐层的方法。

公开(公告)号：US06841439B1

公开(公告)日：2005-01-11

申请号：US09116138

申请日：1998-07-15

申请人： John Mark Anthony ,  Scott R. Summerfelt ,  Robert M. Wallace ,  Glen D. Wilk

发明人： John Mark Anthony ,  Scott R. Summerfelt ,  Robert M. Wallace ,  Glen D. Wilk

IPC分类号： H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L29/51 ,  H01L21/8238

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28229 ,  H01L21/3143 ,  H01L21/31612 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31691 ,  H01L29/517

摘要： A field effect semiconductor device comprising a high permittivity silicate gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A metal silicate gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Silicate layer 36 may be, e.g., hafnium silicate, such that the dielectric constant of the gate dielectric is significantly higher than the dielectric constant of silicon dioxide. However, the silicate gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability. The present invention includes methods for depositing both amorphous and polycrystalline silicate layers, as well as graded composition silicate layers.

摘要翻译： 本文公开了包括高介电常数硅酸盐栅极电介质的场效应半导体器件及其形成方法。 该器件包括其中形成有半导体沟道区24的硅衬底20。 在该衬底上形成金属硅酸盐栅极电介质层36，之后是导电栅极38.硅酸盐层36可以是例如硅酸铪，使得栅极电介质的介电常数显着高于二氧化硅的介电常数 。 然而，硅酸盐栅极电介质也可以被设计成具有二氧化硅的优点。 高击穿，低界面状态密度和高稳定性。 本发明包括沉积无定形和多晶硅酸盐层以及梯度组合硅酸盐层的方法。