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    Homogeneous porous low dielectric constant materials
    3.
    发明授权
    Homogeneous porous low dielectric constant materials 有权
    均质多孔低介电常数材料

    公开(公告)号：US08492239B2

    公开(公告)日：2013-07-23

    申请号：US13602957

    申请日：2012-09-04

    申请人： Robert L. Bruce ,  Geraud Jean-Michel Dubois ,  Theo J. Frot ,  Teddie P. Magbitang ,  Sampath Purushothaman ,  David L. Rath ,  Willi Volksen

    发明人： Robert L. Bruce ,  Geraud Jean-Michel Dubois ,  Theo J. Frot ,  Teddie P. Magbitang ,  Sampath Purushothaman ,  David L. Rath ,  Willi Volksen

    IPC分类号： H01L21/76

    CPC分类号： H01L21/3105 ,  H01L21/02203 ,  H01L21/76802 ,  H01L21/76826 ,  H01L21/76828

    摘要： In one exemplary embodiment, a method includes: providing a structure having a first layer overlying a substrate, where the first layer includes a dielectric material having a plurality of pores; applying a filling material to an exposed surface of the first layer; heating the structure to a first temperature to enable the filling material to homogeneously fill the plurality of pores; after filling the plurality of pores, performing at least one first process on the structure; after performing the at least one first process, removing the filling material from the plurality of pores by heating the structure to a second temperature to decompose the filling material; and after removing the filling material from the plurality of pores, performing at least one second process on the structure, where the at least one second process is performed at a third temperature that is greater than the second temperature.

    摘要翻译： 在一个示例性实施例中，一种方法包括：提供具有覆盖衬底的第一层的结构，其中第一层包括具有多个孔的电介质材料; 将填充材料施加到第一层的暴露表面; 将结构加热到第一温度以使填充材料均匀地填充多个孔; 在填充所述多个孔之后，在所述结构上执行至少一个第一处理; 在执行所述至少一个第一处理之后，通过将所述结构加热至第二温度以分解所述填充材料，从所述多个孔中除去所述填充材料; 并且在从所述多个孔中除去所述填充材料之后，对所述结构执行至少一个第二工艺，其中所述至少一个第二工艺在大于所述第二温度的第三温度下进行。

    HOMOGENEOUS POROUS LOW DIELECTRIC CONSTANT MATERIALS
    4.
    发明申请
    HOMOGENEOUS POROUS LOW DIELECTRIC CONSTANT MATERIALS 有权
    均质多孔低介电常数材料

    公开(公告)号：US20120329273A1

    公开(公告)日：2012-12-27

    申请号：US13602957

    申请日：2012-09-04

    申请人： Robert L. Bruce ,  Geraud Jean-Michel Dubois ,  Theo J. Frot ,  Teddie P. Magbitang ,  Sampath Purushothaman ,  David L. Rath ,  Willi Volksen

    发明人： Robert L. Bruce ,  Geraud Jean-Michel Dubois ,  Theo J. Frot ,  Teddie P. Magbitang ,  Sampath Purushothaman ,  David L. Rath ,  Willi Volksen

    IPC分类号： H01L21/28

    CPC分类号： H01L21/3105 ,  H01L21/02203 ,  H01L21/76802 ,  H01L21/76826 ,  H01L21/76828

    摘要： In one exemplary embodiment, a method includes: providing a structure having a first layer overlying a substrate, where the first layer includes a dielectric material having a plurality of pores; applying a filling material to an exposed surface of the first layer; heating the structure to a first temperature to enable the filling material to homogeneously fill the plurality of pores; after filling the plurality of pores, performing at least one first process on the structure; after performing the at least one first process, removing the filling material from the plurality of pores by heating the structure to a second temperature to decompose the filling material; and after removing the filling material from the plurality of pores, performing at least one second process on the structure, where the at least one second process is performed at a third temperature that is greater than the second temperature.

    摘要翻译： 在一个示例性实施例中，一种方法包括：提供具有覆盖衬底的第一层的结构，其中第一层包括具有多个孔的电介质材料; 将填充材料施加到第一层的暴露表面; 将结构加热到第一温度以使填充材料均匀地填充多个孔; 在填充所述多个孔之后，在所述结构上执行至少一个第一处理; 在执行所述至少一个第一处理之后，通过将所述结构加热至第二温度以分解所述填充材料，从所述多个孔中除去所述填充材料; 并且在从所述多个孔中除去所述填充材料之后，对所述结构进行至少一个第二工艺，其中所述至少一个第二工艺在大于所述第二温度的第三温度下进行。

    Gap free anchored conductor and dielectric structure and method for fabrication thereof
    5.
    发明授权
    Gap free anchored conductor and dielectric structure and method for fabrication thereof 失效
    无缝隙锚固导体和电介质结构及其制造方法

    公开(公告)号：US07985928B2

    公开(公告)日：2011-07-26

    申请号：US12190814

    申请日：2008-08-13

    申请人： Tibor Bolom ,  Stephan Grunow ,  David L. Rath ,  Andrew Herbert Simon

    发明人： Tibor Bolom ,  Stephan Grunow ,  David L. Rath ,  Andrew Herbert Simon

    IPC分类号： H05K1/11

    CPC分类号： H01L23/5226 ,  H01L21/76805 ,  H01L21/76844 ,  H01L21/76873 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A microelectronic structure and a method for fabricating the microelectronic structure use a dielectric layer that is located and formed upon a first conductor layer. An aperture is located through the dielectric layer. The aperture penetrates vertically into the first conductor layer and extends laterally within the first conductor layer beneath the dielectric layer while not reaching the dielectric layer, to form an extended and winged aperture. A contiguous via and interconnect may be formed anchored into the extended and winged aperture while using a plating method, absent voids.

    摘要翻译： 微电子结构和制造微电子结构的方法使用位于第一导体层上并形成的介电层。 孔通过介电层定位。 孔径垂直地穿入第一导体层，并且在电介质层下方的第一导体层内横向延伸，而不到达电介质层，以形成延伸和有翅的孔。 可以使用不存在空隙的电镀方法，将连续的通孔和互连件形成为锚固到延伸和有翼的孔中。

    AIR GAP STRUCTURE HAVING PROTECTIVE METAL SILICIDE PADS ON A METAL FEATURE
    6.
    发明申请
    AIR GAP STRUCTURE HAVING PROTECTIVE METAL SILICIDE PADS ON A METAL FEATURE 有权
    在金属特征上具有保护性金属硅化物垫的气隙结构

    公开(公告)号：US20110092067A1

    公开(公告)日：2011-04-21

    申请号：US12972808

    申请日：2010-12-20

    申请人： Griselda Bonilla ,  Daniel C. Edelstein ,  Satyanarayana V. Nitta ,  Takeshi Nogami ,  Shom Ponoth ,  David L. Rath ,  Chih-Chao Yang

    发明人： Griselda Bonilla ,  Daniel C. Edelstein ,  Satyanarayana V. Nitta ,  Takeshi Nogami ,  Shom Ponoth ,  David L. Rath ,  Chih-Chao Yang

    IPC分类号： H01L21/4763

    CPC分类号： H01L23/5222 ,  H01L21/31144 ,  H01L21/7682 ,  H01L21/76849 ,  H01L21/76852 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A hard mask is formed on an interconnect structure comprising a low-k material layer and a metal feature embedded therein. A block polymer is applied to the hard mask layer, self-assembled, and patterned to form a polymeric matrix of a polymeric block component and containing cylindrical holes. The hard mask and the low-k material layer therebelow are etched to form cavities. A conductive material is plated on exposed metallic surfaces including portions of top surfaces of the metal feature to form metal pads. Metal silicide pads are formed by exposure of the metal pads to a silicon containing gas. An etch is performed to enlarge and merge the cavities in the low-k material layer. The metal feature is protected from the etch by the metal silicide pads. An interconnect structure having an air gap and free of defects to surfaces of the metal feature is formed.

    摘要翻译： 在包括低k材料层和嵌入其中的金属特征的互连结构上形成硬掩模。 将嵌段聚合物施加到硬掩模层上，自组装和图案化以形成聚合物嵌段组分的聚合物基质并且包含圆柱形孔。 蚀刻硬掩模和低k材料层以形成空腔。 导电材料镀在暴露的金属表面上，包括金属特征的顶表面的部分以形成金属垫。 金属硅化物焊盘通过将金属焊盘暴露于含硅气体而形成。 进行蚀刻以放大和合并低k材料层中的空腔。 通过金属硅化物焊盘防止金属特征被蚀刻。 形成具有空隙并且没有金属特征表面的缺陷的互连结构。

    Oxidant and passivant composition and method for use in treating a microelectronic structure
    8.
    发明授权
    Oxidant and passivant composition and method for use in treating a microelectronic structure 失效
    氧化剂和钝化剂组合物和用于处理微电子结构的方法

    公开(公告)号：US07670497B2

    公开(公告)日：2010-03-02

    申请号：US11774041

    申请日：2007-07-06

    申请人： John A. Fitzsimmons ,  David L. Rath ,  Shom Ponoth ,  Michael Beck

    发明人： John A. Fitzsimmons ,  David L. Rath ,  Shom Ponoth ,  Michael Beck

    IPC分类号： H01B13/00

    CPC分类号： C23G1/103 ,  H01L21/02063

    摘要： A composition that may be used for cleaning a metal containing conductor layer, such as a copper containing conductor layer, within a microelectronic structure includes an aqueous acid, along with an oxidant material and a passivant material contained within the aqueous acid. The composition does not include an abrasive material. The composition is particularly useful for cleaning a residue from a copper containing conductor layer and an adjoining dielectric layer that provides an aperture for accessing the copper containing conductor layer within a microelectronic structure.

    摘要翻译： 微电子结构中可用于清洗含金属导体层（例如含铜导电体层）的组合物包括酸水溶液以及氧化剂材料和含水酸性物质中的钝化材料。 组合物不包括研磨材料。 所述组合物特别可用于从含铜导体层和邻接的介电层清洁残留物，所述相邻介电层提供用于在微电子结构内进入含铜导体层的孔。

    INTERCONNECT STRUCTURE AND METHOD OF MAKING SAME
    9.
    发明申请
    INTERCONNECT STRUCTURE AND METHOD OF MAKING SAME 审中-公开
    互连结构及其制作方法

    公开(公告)号：US20090127711A1

    公开(公告)日：2009-05-21

    申请号：US11940487

    申请日：2007-11-15

    申请人： Griselda Bonilla ,  Daniel C. Edelstein ,  Mahadevaiyer Krishnan ,  Takeshi Nogami ,  David L. Rath

    发明人： Griselda Bonilla ,  Daniel C. Edelstein ,  Mahadevaiyer Krishnan ,  Takeshi Nogami ,  David L. Rath

    IPC分类号： H01L23/48 ,  H01L21/4763

    CPC分类号： H01L21/76847 ,  H01L21/76805 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2224/13099 ,  H01L2924/14

    摘要： A highly reliable copper interconnect structure and method of fabricating the same is provided. The interconnect structure comprises a metal layer buried between an adjacent upper copper layer and an adjacent lower copper layer structure. More specifically, the interconnect structure comprises a recess formed in a dielectric layer; a barrier metal lining sidewalls of the recess; a first copper layer within the recess; a second copper layer within the recess; and a metal layer buried between the first copper layer and the second copper layer. The method comprises forming a recess in an interlayer dielectric; forming a first copper layer, a metal layer over the first copper layer and a second copper layer over the metal layer, all within the recess. The metal layer is sandwiched between the first copper layer and the second copper layer within the recess.

    摘要翻译： 提供了一种高度可靠的铜互连结构及其制造方法。 互连结构包括埋在相邻的上铜层和相邻的下铜层结构之间的金属层。 更具体地，互连结构包括形成在电介质层中的凹部; 衬垫侧壁的阻挡金属衬垫; 凹槽内的第一铜层; 凹槽内的第二铜层; 以及埋在第一铜层和第二铜层之间的金属层。 该方法包括在层间电介质中形成凹陷; 在第一铜层上形成第一铜层，金属层和金属层上的第二铜层，全部在凹部内。 金属层夹在凹槽内的第一铜层和第二铜层之间。