公开(公告)号：US20050031284A1

公开(公告)日：2005-02-10

申请号：US10929271

申请日：2004-08-30

申请人： Guy Blalock ,  Howard Rhodes ,  Vishnu Agarwal ,  Gurtej Sandhu ,  James Foresi ,  Jean-Francois Viens ,  Dale Fried

发明人： Guy Blalock ,  Howard Rhodes ,  Vishnu Agarwal ,  Gurtej Sandhu ,  James Foresi ,  Jean-Francois Viens ,  Dale Fried

IPC分类号： G02B6/12 ,  G02B6/125 ,  G02B6/136 ,  G02F1/01 ,  G02F1/025 ,  G02B6/10

CPC分类号： G02F1/025 ,  G02B6/125 ,  G02B6/136 ,  G02B2006/12107 ,  G02B2006/12164 ,  G02F1/0147 ,  G02F2203/15

摘要： A waveguide and resonator are formed on a lower cladding of a thermo optic device, each having a formation height that is substantially equal. Thereafter, the formation height of the waveguide is attenuated. In this manner, the aspect ratio as between the waveguide and resonator in an area where the waveguide and resonator front or face one another decreases (in comparison to the prior art) thereby restoring the synchronicity between the waveguide and the grating and allowing higher bandwidth configurations to be used. The waveguide attenuation is achieved by photomasking and etching the waveguide after the resonator and waveguide are formed. In one embodiment the photomasking and etching is performed after deposition of the upper cladding. In another, it is performed before the deposition. Thermo optic devices, thermo optic packages and fiber optic systems having these waveguides are also taught.

摘要翻译： 波导和谐振器形成在热光器件的下包层上，每个具有基本相等的形成高度。 此后，波导的形成高度被衰减。 以这种方式，波导和谐振器在波导和谐振器前面或彼此面对的区域（与现有技术相比）中的波导和谐振器之间的纵横比，从而恢复波导和光栅之间的同步性并允许更高的带宽配置 要使用的。 在形成谐振器和波导之后，通过光掩模和蚀刻波导来实现波导衰减。 在一个实施例中，在沉积上部包层之后进行光掩模和蚀刻。 另一方面，它是在沉积之前进行的。 还教导了具有这些波导的热光器件，热光封装和光纤系统。

公开(公告)号：US20080089647A1

公开(公告)日：2008-04-17

申请号：US11951796

申请日：2007-12-06

申请人： Gurtej Sandhu ,  Guy Blalock ,  Howard Rhodes

发明人： Gurtej Sandhu ,  Guy Blalock ,  Howard Rhodes

IPC分类号： G02B6/26

CPC分类号： G02B6/132 ,  G02B6/12004 ,  G02B6/12007 ,  G02B6/136 ,  G02F1/011 ,  G02F1/0147 ,  G02F2203/15

摘要： A resonator for thermo optic devices is formed in the same process steps as a waveguide and is formed in a depression of a lower cladding while the waveguide is formed on a surface of the lower cladding. Since upper surfaces of the resonator and waveguide are substantially coplanar, the aspect ratio, as between the waveguide and resonator in an area where the waveguide and resonator front one another, decreases thereby increasing the bandwidth of the resonator. The depression is formed by photomasking and etching the lower cladding before forming the resonator and waveguide. Pluralities of resonators are also taught that are formed in a plurality of depressions of the lower cladding. To decrease resonator bandwidth, waveguide(s) are formed in the depression(s) of the lower cladding while the resonator is formed on the surface. Thermo optic devices formed with these resonators are also taught.

摘要翻译： 用于热光器件的谐振器以与波导相同的工艺步骤形成，并且形成在下包层的凹陷中，同时波导形成在下包层的表面上。 由于谐振器和波导的上表面基本上是共面的，因此在波导和谐振器彼此前向的区域中的波导和谐振器之间的纵横比减小，从而增加了谐振器的带宽。 在形成谐振器和波导之前，通过光掩模和蚀刻下部包层形成凹陷。 还教导了形成在下部包层的多个凹部中的多个谐振器。 为了减小谐振器带宽，当在表面上形成谐振器时，在下包层的凹陷中形成波导。 还教导了用这些谐振器形成的热光器件。

公开(公告)号：US20060263027A1

公开(公告)日：2006-11-23

申请号：US11493717

申请日：2006-07-26

申请人： Gurtej Sandhu ,  Guy Blalock ,  Howard Rhodes

发明人： Gurtej Sandhu ,  Guy Blalock ,  Howard Rhodes

IPC分类号： G02B6/10

CPC分类号： G02B6/132 ,  G02B6/12004 ,  G02B6/12007 ,  G02B6/136 ,  G02F1/011 ,  G02F1/0147 ,  G02F2203/15

摘要： A resonator for thermo optic devices is formed in the same process steps as a waveguide and is formed in a depression of a lower cladding while the waveguide is formed on a surface of the lower cladding. Since upper surfaces of the resonator and waveguide are substantially coplanar, the aspect ratio, as between the waveguide and resonator in an area where the waveguide and resonator front one another, decreases thereby increasing the bandwidth of the resonator. The depression is formed by photomasking and etching the lower cladding before forming the resonator and waveguide. Pluralities of resonators are also taught that are formed in a plurality of depressions of the lower cladding. To decrease resonator bandwidth, waveguide(s) are formed in the depression(s) of the lower cladding while the resonator is formed on the surface. Thermo optic devices formed with these resonators are also taught.

公开(公告)号：US20060234465A1

公开(公告)日：2006-10-19

申请号：US11452816

申请日：2006-06-13

申请人： Vishnu Agarwal ,  Gurtej Sandhu

发明人： Vishnu Agarwal ,  Gurtej Sandhu

IPC分类号： H01L21/44

CPC分类号： H01L28/75 ,  C23C16/34 ,  C23C16/56 ,  H01L21/28568 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76868 ,  H01L21/7687 ,  H01L27/1085 ,  H01L28/55 ,  H01L2221/1078

摘要： In one aspect, the invention includes a method of forming a material comprising tungsten and nitrogen, comprising: a) providing a substrate; b) depositing a layer comprising tungsten and nitrogen over the substrate; and c) in a separate step from the depositing, exposing the layer comprising tungsten and nitrogen to a nitrogen-containing plasma. In another aspect, the invention includes a method of forming a capacitor, comprising: a) forming a first electrical node; b) forming a dielectric layer over the first electrical node; c) forming a second electrical node; and d) providing a layer comprising tungsten and nitrogen between the dielectric layer and one of the electrical nodes, the providing comprising; i) depositing a layer comprising tungsten and nitrogen; and ii) in a separate step from the depositing, exposing the layer comprising tungsten and nitrogen to a nitrogen-containing plasma.

公开(公告)号：US20050266624A1

公开(公告)日：2005-12-01

申请号：US11119370

申请日：2005-04-29

申请人： Vishnu Agarwal ,  Gurtej Sandhu

发明人： Vishnu Agarwal ,  Gurtej Sandhu

IPC分类号： H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/532 ,  H01L29/49

CPC分类号： H01L21/28088 ,  H01L21/28061 ,  H01L21/76841 ,  H01L23/53257 ,  H01L29/4941 ,  H01L29/4966 ,  H01L2924/0002 ,  H01L2924/00

摘要： A diffusion barrier layer comprising TiNxBy is disclosed for protection of gate oxide layers in integrated transistors. The diffusion barrier layer can be fabricated by first forming a TiN layer and then incorporating boron into the TiN layer. The diffusion barrier layer can also be fabricated by forming a TiNxBy layer using a TDMAT process including boron. The diffusion barrier layer can also be fabricated by forming a TiNxBy layer using a CVD process. The diffusion barrier layer is of particular utility in conjunction with tungsten or tungsten silicide conductive layers formed by CVD.

摘要翻译： 公开了一种包括TiN x B B y y的扩散阻挡层，用于保护集成晶体管中的栅极氧化物层。 可以通过首先形成TiN层然后将硼掺入到TiN层中来制造扩散阻挡层。 扩散阻挡层也可以通过使用包括硼的TDMAT工艺来形成TiN层的方法来制造。 扩散阻挡层也可以通过使用CVD工艺形成TiN x B层Y 3层来制造。 扩散阻挡层特别适用于通过CVD形成的钨或硅化钨导电层。

公开(公告)号：US20060261421A1

公开(公告)日：2006-11-23

申请号：US11493458

申请日：2006-07-25

申请人： Vishnu Agarwal ,  Gurtej Sandhu

发明人： Vishnu Agarwal ,  Gurtej Sandhu

IPC分类号： H01L29/94

CPC分类号： H01L21/28088 ,  H01L21/28061 ,  H01L21/76841 ,  H01L23/53257 ,  H01L29/4941 ,  H01L29/4966 ,  H01L2924/0002 ,  H01L2924/00

摘要： A diffusion barrier layer comprising TiNxBy is disclosed for protection of gate oxide layers in integrated transistors. The diffusion barrier layer can be fabricated by first forming a TiN layer and then incorporating boron into the TiN layer. The diffusion barrier layer can also be fabricated by forming a TiNxBy layer using a TDMAT process including boron. The diffusion barrier layer can also be fabricated by forming a TiNxBy layer using a CVD process. The diffusion barrier layer is of particular utility in conjunction with tungsten or tungsten silicide conductive layers formed by CVD.

公开(公告)号：US20060076597A1

公开(公告)日：2006-04-13

申请号：US11235866

申请日：2005-09-26

申请人： Vishnu Agarwal ,  Garo Derderian ,  Gurtej Sandhu ,  Weimin Li ,  Mark Visokay ,  Cem Basceri ,  Sam Yang

发明人： Vishnu Agarwal ,  Garo Derderian ,  Gurtej Sandhu ,  Weimin Li ,  Mark Visokay ,  Cem Basceri ,  Sam Yang

IPC分类号： H01L29/94

CPC分类号： H01L28/84 ,  H01L21/02183 ,  H01L21/02197 ,  H01L21/31637 ,  H01L28/55 ,  H01L28/65

摘要： Capacitors having increased capacitance include an enhanced-surface-area (rough-surfaced) electrically conductive layer or other layers that are compatible with the high-dielectric constant materials. In one approach, an enhanced-surface-area electrically conductive layer for such capacitors is formed by processing a ruthenium oxide layer at high temperature at or above 500° C. and low pressure 75 torr or below, most desirably 5 torr or below, to produce a roughened ruthenium layer having a textured surface with a mean feature size of at least about 100 Angstroms. The initial ruthenium oxide layer may be provided by chemical vapor deposition techniques or sputtering techniques or the like. The layer may be formed over an underlying electrically conductive layer. The processing may be performed in an inert ambient or in a reducing ambient. A nitrogen-supplying ambient or nitrogen-supplying reducing ambient may be used during the processing or afterwards to passivate the ruthenium for improved compatibility with high-dielectric-constant dielectric materials. Processing in an oxidizing ambient may also be performed to passivate the roughened layer. The roughened layer of ruthenium may be used to form an enhanced-surface-area electrically conductive layer. The resulting enhanced-surface-area electrically conductive layer may form a plate of a storage capacitor in an integrated circuit, such as in a memory cell of a DRAM or the like. In another approach, a tungsten nitride layer is provided as an first electrode of such a capacitor. The capacitor, or at least the tungsten nitride layer, is annealed to increase the capacitance of the capacitor.

公开(公告)号：US20050093052A1

公开(公告)日：2005-05-05

申请号：US10973343

申请日：2004-10-27

申请人： Vishnu Agarwal ,  Gurtej Sandhu

发明人： Vishnu Agarwal ,  Gurtej Sandhu

IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L21/768 ,  H01L21/8242 ,  H01L27/02 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L27/10817 ,  H01L21/7682 ,  H01L27/0207 ,  H01L27/10852 ,  H01L28/90 ,  H01L28/91

摘要： Structurally-stable, tall capacitors having unique three-dimensional architectures for semiconductor devices are disclosed. The capacitors include monolithically-fabricated upright microstructures, i.e., those having large height/width (H/W) ratios, which are mechanical reinforcement against shear forces and the like, by a brace layer that transversely extends between lateral sides of at least two of the free-standing microstructures. The brace layer is formed as a microbridge type structure spanning between the upper ends of the two or more microstructures.

摘要翻译： 公开了具有用于半导体器件的独特三维结构的结构稳定的高电容器。 这些电容器包括单片制造的直立微结构，即具有大的高/宽（H / W）比的那些，它们是抗剪切力等的机械加强，该支撑层横向延伸在至少两个 独立的微结构。 支撑层形成为跨越两个或更多个微结构的上端之间的微桥型结构。

公开(公告)号：US20060258113A1

公开(公告)日：2006-11-16

申请号：US11460021

申请日：2006-07-26

申请人： Gurtej Sandhu ,  Guy Blalock

发明人： Gurtej Sandhu ,  Guy Blalock

IPC分类号： H01L29/94 ,  H01L21/20

CPC分类号： H01L27/10852 ,  H01L21/02183 ,  H01L21/02197 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/31637 ,  H01L21/31654 ,  H01L27/10811 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/56 ,  H01L28/65 ,  H01L28/91

摘要： A capacitor structure and method of forming it are described. In particular, a high-K dielectric oxide is provided as the capacitor dielectric. The high-K dielectric is deposited in a series of thin layers and oxidized in a series of oxidation steps, as opposed to a depositing a single thick layer. Further, at least one of the oxidation steps is less aggressive than the oxidation environment or environments that would be used to deposit the single thick layer. This allows greater control over oxidizing the dielectric and other components beyond the dielectric.

摘要翻译： 描述电容器结构及其形成方法。 特别地，提供高K电介质氧化物作为电容器电介质。 与沉积单个厚层相反，高K电介质沉积在一系列薄层中并在一系列氧化步骤中被氧化。 此外，至少一个氧化步骤比用于沉积单个厚层的氧化环境或环境更不具有侵蚀性。 这允许更好地控制电介质和超过电介质的其它组件的氧化。

公开(公告)号：US20060228084A1

公开(公告)日：2006-10-12

申请号：US11424401

申请日：2006-06-15

申请人： Gurtej Sandhu ,  Guy Blalock

发明人： Gurtej Sandhu ,  Guy Blalock

IPC分类号： G02B6/10

CPC分类号： G02B6/125 ,  G02F1/0102 ,  G02F1/0147 ,  G02F1/2257 ,  G02F2201/30 ,  G02F2201/307 ,  G02F2202/104

摘要： Resistive heaters formed in two mask counts on a surface of a grating of a thermo optic device thereby eliminating one mask count from prior art manufacturing methods. The resistive heater is comprised of a heater region and a conductive path region formed together in a first mask count from a relatively high resistance material. A conductor formed from a relatively low resistance material is formed directly on the conductive path region in a second mask count. Thermo optic devices formed by these two mask count methods are also described.

摘要翻译： 在热光器件的光栅的表面上形成两个掩模计数的电阻加热器，从而从现有技术的制造方法中消除一个掩模计数。 电阻加热器包括加热器区域和形成在来自相对高电阻材料的第一掩模计数中的导电路径区域。 由相对低电阻材料形成的导体以第二掩模计数直接形成在导电路径区域上。 还描述了通过这两种掩模计数方法形成的热光学器件。