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    Device to generate excited/ionized particles in a plasma
    2.
    发明授权
    Device to generate excited/ionized particles in a plasma 有权
    在等离子体中产生激发/电离粒子的装置

    公开(公告)号：US06706141B1

    公开(公告)日：2004-03-16

    申请号：US09625200

    申请日：2000-07-21

    Applicant: Heinz Steinhardt ,  Alexander Gschwandtner ,  Josef Mathuni

    Inventor： Heinz Steinhardt ,  Alexander Gschwandtner ,  Josef Mathuni

    IPC: H05H100

    CPC classification number: H01J37/32229 ,  H01J37/32357 ,  H05H1/46

    Abstract: A device to generate excited and/or ionized particles in plasma with a generator to generate an electromagnetic wave and at least one plasma zone, in which the excited and/or ionized particles are formed by the electromagnetic wave. The plasma zone is formed in an interior chamber of a conductor for the electromagnetic wave.

    Abstract translation: 一种用发生器产生等离子体中的激发和/或电离粒子以产生电磁波和至少一个等离子体区域的装置，其中激发和/或离子化的颗粒由电磁波形成。 等离子体区域形成在用于电磁波的同轴导体的内部室中。

    Method for generating excited neutral particles for etching and deposition processes in semiconductor technology with a plasma discharge fed by microwave energy
    4.
    发明授权
    Method for generating excited neutral particles for etching and deposition processes in semiconductor technology with a plasma discharge fed by microwave energy 失效
    用于通过微波能量馈送的等离子体放电在半导体技术中产生用于蚀刻和沉积工艺的激发中性粒子的方法

    公开(公告)号：US5489362A

    公开(公告)日：1996-02-06

    申请号：US211472

    申请日：1994-08-29

    Applicant: Heinz Steinhardt ,  Josef Mathuni

    Inventor： Heinz Steinhardt ,  Josef Mathuni

    IPC: E05D7/086 ,  A45C13/00 ,  B62D25/12 ,  E05D11/08 ,  E05F1/12 ,  E05F5/00 ,  F16C11/04 ,  F16F1/14 ,  H01J37/32 ,  H01L21/205 ,  H01L21/302 ,  H01L21/3065 ,  H05H1/46 ,  H01L21/00

    CPC classification number: H01J37/32357 ,  H01J37/32229 ,  E05Y2900/20

    Abstract: A plasma discharge tube (5) having a diameter that corresponds to a quarter wavelength of the standing wave is selected and the waveguide system (2) is dimensioned and tuned such that the standing wave forms a first voltage maximum at a first side of the plasma discharge tube (5) and the standing wave is also supplied reflected, so that it forms a second, anti-phase voltage maximum at a second side of the plasma discharge tube (5) that lies opposite the first side and faces toward an end termination (12) of the waveguide system (2). A controlled magnetic field is applied in order to achieve an especially low working pressure.

    Abstract translation: PCT No.PCT / EP92 / 02268 Sec。 371日期：1994年8月29日 102（e）日期1994年8月29日PCT提交1992年9月30日PCT公布。 公开号WO93 / 07639 日期为1993年4月15日。选择具有对应于驻波的四分之一波长的直径的等离子体放电管（5），并且对波导系统（2）进行尺寸调整，使得驻波形成第一电压最大值 在等离子体放电管（5）的第一侧，并且驻波也被反射，从而在等离子体放电管（5）的与第一相对的第二侧处形成第二反相电压最大值 并朝向波导系统（2）的端部终端（12）。 施加受控磁场以实现特别低的工作压力。

    Method of structuring with metal oxide masks by reactive ion-beam etching
    5.
    发明授权
    Method of structuring with metal oxide masks by reactive ion-beam etching 失效
    通过反应离子束蚀刻用金属氧化物掩模构成的方法

    公开(公告)号：US4390394A

    公开(公告)日：1983-06-28

    申请号：US338605

    申请日：1982-01-11

    Applicant: Josef Mathuni ,  Karin Unger

    Inventor： Josef Mathuni ,  Karin Unger

    IPC: H01L21/302 ,  G03F7/09 ,  G03F7/40 ,  H01L21/033 ,  H01L21/3065 ,  C23F1/02 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06

    CPC classification number: H01L21/0332 ,  G03F7/094 ,  G03F7/40 ,  Y10S438/949 ,  Y10S438/95

    Abstract: Very fine circuit structures in microelectronics are produced by first applying a thin metal oxide layer uniformly over an entire surface of a layer to be etched, then applying a resist layer uniformly over the entire metal oxide layer and structuring such oxide layer by ion-beam etching and, utilizing the structured oxide layer as a mask, performing a dry-etching with an ion beam of the metal layer lying thereunder so as to attain structures having very unfavorable resist height to etching depth ratios.

    Abstract translation: 通过首先在待蚀刻层的整个表面上均匀地施加薄的金属氧化物层，然后在整个金属氧化物层上均匀地施加抗蚀剂层并通过离子束蚀刻来构造这样的氧化物层来生产微电子中的非常精细的电路结构 并且利用结构化氧化物层作为掩模，利用其下面的金属层的离子束进行干蚀刻，以获得对蚀刻深度比非常不利的抗蚀剂高度的结构。

    Photomask, in particular alternating phase shift mask, with compensation structure
    6.
    发明授权
    Photomask, in particular alternating phase shift mask, with compensation structure 失效
    光掩模，特别是交替相移掩模，具有补偿结构

    公开(公告)号：US07063921B2

    公开(公告)日：2006-06-20

    申请号：US10667552

    申请日：2003-09-22

    Applicant: Wolfgang Dettman ,  Josef Mathuni ,  Oliver Fagerer ,  Bettina Schiessl ,  Stephen Rahn

    Inventor： Wolfgang Dettman ,  Josef Mathuni ,  Oliver Fagerer ,  Bettina Schiessl ,  Stephen Rahn

    IPC: G01F9/00 ,  G03C5/00

    CPC classification number: G03F1/34 ,  G03F1/30 ,  G03F1/36 ,  G03F1/40 ,  Y10T403/5773

    Abstract: The invention relates to a method for the production of masks, in particular for the production of alternating phase shift masks (1), or of chromeless phase shift masks or phase shift masks structured by quartz etching, respectively, as well as to a mask (1), in particular photomask, for the production of semiconductor devices, comprising at least one product field area (6a) and a compensation structure (5) positioned outside the product field area (6a), wherein the compensation structure (5) comprises at least one electroconductive region (8b) that is electrically connected with the product field area (6a).

    Abstract translation: 本发明涉及一种用于制造掩模的方法，特别是用于生产交替相移掩模（1）或由石英蚀刻构成的无铬相移掩模或相移掩模以及掩模（ 1），特别是光掩模，用于生产半导体器件，包括至少一个产品场区（6a）和位于产品场区（6a）外部的补偿结构（5），其中补偿结构（5） 包括与产品场区域（6a）电连接的至少一个导电区域（8b）。

    Method for damage etching the back side of a semiconductor disk having a protected front side
    7.
    发明授权
    Method for damage etching the back side of a semiconductor disk having a protected front side 失效
    用于损坏蚀刻具有受保护的正面​​的半导体盘的背面的方法

    公开(公告)号：US5693182A

    公开(公告)日：1997-12-02

    申请号：US604643

    申请日：1996-02-21

    Applicant: Josef Mathuni

    Inventor： Josef Mathuni

    IPC: C23F4/00 ,  H01L21/301 ,  H01L21/302 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/78 ,  H01L21/00

    CPC classification number: H01L21/3086 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/78

    Abstract: A method for making large scale integrated circuits on a disklike semiconductor substrate includes grinding a disk thin enough to be able to be sawn apart into individual chips. A damage zone caused by the grinding on a back side of the wafer is removed by etching while protecting a front side of the wafer, prior to sawing. The etching is carried out in the form of a microwave or high-frequency-excited downstream plasma etching process using fluorine compounds in an etching gas.

    Abstract translation: 一种在盘状半导体衬底上制造大规模集成电路的方法包括：将足够薄的盘研磨成可分离成独立的芯片。 在切割之前，通过蚀刻除去晶片背侧的研磨引起的损伤区域，同时保护晶片的前侧。 蚀刻以蚀刻气体中的氟化合物的微波或高频激发下游等离子体蚀刻工艺的形式进行。

    Method for etching a semiconductor substrate and etching system
    10.
    发明授权
    Method for etching a semiconductor substrate and etching system 失效
    蚀刻半导体衬底和蚀刻系统的方法

    公开(公告)号：US5874366A

    公开(公告)日：1999-02-23

    申请号：US863371

    申请日：1997-05-27

    Applicant: Roland Sporer ,  Josef Mathuni ,  Alexander Gschwandtner

    Inventor： Roland Sporer ,  Josef Mathuni ,  Alexander Gschwandtner

    IPC: H01L21/306 ,  H01L21/00

    CPC classification number: H01L21/02052

    Abstract: The method and system of the invention allow etching even relatively thick layers on the rear side of a semiconductor substrate where the front side is resist-free. An etching solution is sprayed in fine droplets onto the rear side of the semiconductor substrate. The semiconductor substrate may thereby be heated to a temperature .ltoreq.100.degree. C.

    Abstract translation: 本发明的方法和系统允许在半导体衬底的背面没有抗蚀剂的情况下蚀刻甚至相当厚的层。 蚀刻溶液以细小的液滴喷射到半导体衬底的后侧。 因此可以将半导体衬底加热到​​100℃的温度。

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