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公开(公告)号：US20080268577A1
公开(公告)日：2008-10-30
申请号：US12164625
申请日：2008-06-30
申请人： Hidemasa KAGII , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人： Hidemasa KAGII , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号： H01L21/00
CPC分类号： H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.
摘要翻译： 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内，而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极，并且栅电极和源电极通过连接材料5b，5c连接金属板端子6G，6S 。 此外，半导体芯片由金属板端子6G，6S的露出的安装面的树脂密封体密封。 金属板端子6G，6S和金属盖的第三部分的安装表面通过连接材料5e，5f和5g与安装板10上的电极接合。
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公开(公告)号：US07220617B2
公开(公告)日：2007-05-22
申请号：US11349219
申请日：2006-02-08
申请人： Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人： Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
CPC分类号： H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals being exposed. Mounting surfaces of the metal plate terminals and a third part of the metal cap are bonded to electrodes on a mounting board.
摘要翻译： 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内，而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极，并且栅极电极和源极电极与金属板端子接合。 此外，半导体芯片被树脂密封体密封，金属板端子的安装表面露出。 金属板端子和金属盖的第三部分的安装表面与安装板上的电极接合。
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公开(公告)号：US20060175700A1
公开(公告)日：2006-08-10
申请号：US11349219
申请日：2006-02-08
申请人： Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人： Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号： H01L23/34
CPC分类号： H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals being exposed. Mounting surfaces of the metal plate terminals and a third part of the metal cap are bonded to electrodes on a mounting board.
摘要翻译： 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内，而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅极电极和源极电极，并且栅极电极和源极电极与金属板端子接合。此外，半导体芯片由树脂密封体 金属板端子的安装表面露出。 金属板端子和金属盖的第三部分的安装表面与安装板上的电极接合。
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公开(公告)号：US20070210430A1
公开(公告)日：2007-09-13
申请号：US11783919
申请日：2007-04-13
申请人： Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人： Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号： H01L23/02
CPC分类号： H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.
摘要翻译： 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内，而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极，并且栅电极和源电极通过连接材料5b，5c连接金属板端子6G，6S 。 此外，半导体芯片由金属板端子6G，6S的露出的安装面的树脂密封体密封。 金属板端子6G，6S和金属盖的第三部分的安装表面通过连接材料5e，5f和5g与安装板10上的电极接合。
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公开(公告)号：US07405469B2
公开(公告)日：2008-07-29
申请号：US11783919
申请日：2007-04-13
申请人： Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人： Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号： H01L23/495
CPC分类号： H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.
摘要翻译： 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内，而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极，并且栅电极和源电极通过连接材料5b，5c连接金属板端子6G，6S 。 此外，半导体芯片由金属板端子6G，6S的露出的安装面的树脂密封体密封。 金属板端子6G，6S和金属盖的第三部分的安装表面通过连接材料5e，5f和5g与安装板10上的电极接合。
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公开(公告)号：US20060177967A1
公开(公告)日：2006-08-10
申请号：US11348362
申请日：2006-02-07
申请人： Akira Muto , Ichio Shimizu , Katsuo Arai , Hidemasa Kagii , Hiroshi Sato , Hiroyuki Nakamura , Takuya Nakajo , Keiichi Okawa , Masahiko Osaka
发明人： Akira Muto , Ichio Shimizu , Katsuo Arai , Hidemasa Kagii , Hiroshi Sato , Hiroyuki Nakamura , Takuya Nakajo , Keiichi Okawa , Masahiko Osaka
IPC分类号： H01L21/50
CPC分类号： H01L23/49562 , H01L23/3107 , H01L23/49537 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/84 , H01L2224/32245 , H01L2224/371 , H01L2224/37147 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01051 , H01L2924/01067 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A semiconductor device in the form of a resin sealed semiconductor package is disclosed, wherein a gate terminal connected to a gate pad electrode formed on a surface of a semiconductor chip and a source terminal connected to a source pad electrode formed on the chip surface exposed to a back surface of a sealing resin portion, a first portion of a drain terminal connected to a back-surface drain electrode of the semiconductor chip is exposed to an upper surface of the sealing resin portion, and a second portion of the drain terminal formed integrally with the first portion of the drain terminal is exposed to the back surface of the sealing resin portion. When forming the sealing resin portion in such a semiconductor device, first the sealing resin portion is formed so as to also cover an upper surface of the first portion of the drain terminal and thereafter the upper surface side of the sealing resin portion is polished by liquid honing, thereby allowing the upper surface of the first portion of the drain terminal to be exposed on the upper surface of the sealing resin portion. Both heat dissipating property and production yield of the semiconductor device are improved.
摘要翻译： 公开了一种树脂密封半导体封装形式的半导体器件，其中连接到形成在半导体芯片的表面上的栅极焊盘电极的栅极端子和连接到形成在芯片表面上的源极焊盘电极的源极端子暴露于 密封树脂部分的背面，连接到半导体芯片的背面漏电极的漏极端子的第一部分暴露于密封树脂部分的上表面，并且漏极端子的第二部分整体地形成 漏极端子的第一部分暴露于密封树脂部分的背面。 当在这种半导体器件中形成密封树脂部分时，首先形成密封树脂部分，以便也覆盖漏极端子的第一部分的上表面，此后密封树脂部分的上表面侧被液体 从而允许排水端子的第一部分的上表面暴露在密封树脂部分的上表面上。 改善了半导体器件的散热性能和生产成本。
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公开(公告)号：US20080220568A1
公开(公告)日：2008-09-11
申请号：US12117359
申请日：2008-05-08
申请人： Akira MUTO , Ichio Shimizu , Katsuo Arai , Hidemasa Kagii , Hiroshi Sato , Hiroyuki Nakamura , Takuya Nakajo , Keiichi Okawa , Masahiko Osaka
发明人： Akira MUTO , Ichio Shimizu , Katsuo Arai , Hidemasa Kagii , Hiroshi Sato , Hiroyuki Nakamura , Takuya Nakajo , Keiichi Okawa , Masahiko Osaka
IPC分类号： H01L23/28
CPC分类号： H01L23/49562 , H01L23/3107 , H01L23/49537 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/84 , H01L2224/32245 , H01L2224/371 , H01L2224/37147 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01051 , H01L2924/01067 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A semiconductor device in the form of a resin sealed semiconductor package is disclosed, wherein a gate terminal connected to a gate pad electrode formed on a surface of a semiconductor chip and a source terminal connected to a source pad electrode formed on the chip surface exposed to a back surface of a sealing resin portion, a first portion of a drain terminal connected to a back-surface drain electrode of the semiconductor chip is exposed to an upper surface of the sealing resin portion, and a second portion of the drain terminal formed integrally with the first portion of the drain terminal is exposed to the back surface of the sealing resin portion. When forming the sealing resin portion in such a semiconductor device, first the sealing resin portion is formed so as to also cover an upper surface of the first portion of the drain terminal and thereafter the upper surface side of the sealing resin portion is polished by liquid honing, thereby allowing the upper surface of the first portion of the drain terminal to be exposed on the upper surface of the sealing resin portion. Both heat dissipating property and production yield of the semiconductor device are improved.
摘要翻译： 公开了一种树脂密封半导体封装形式的半导体器件，其中连接到形成在半导体芯片的表面上的栅极焊盘电极的栅极端子和连接到形成在芯片表面上的源极焊盘电极的源极端子暴露于 密封树脂部分的背面，连接到半导体芯片的背面漏电极的漏极端子的第一部分暴露于密封树脂部分的上表面，并且漏极端子的第二部分整体地形成 漏极端子的第一部分暴露于密封树脂部分的背面。 当在这种半导体器件中形成密封树脂部分时，首先形成密封树脂部分，以便也覆盖漏极端子的第一部分的上表面，此后密封树脂部分的上表面侧被液体 从而允许排水端子的第一部分的上表面暴露在密封树脂部分的上表面上。 改善了半导体器件的散热性能和生产成本。
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公开(公告)号：US07374965B2
公开(公告)日：2008-05-20
申请号：US11348362
申请日：2006-02-07
申请人： Akira Muto , Ichio Shimizu , Katsuo Arai , Hidemasa Kagii , Hiroshi Sato , Hiroyuki Nakamura , Takuya Nakajo , Keiichi Okawa , Masahiko Osaka
发明人： Akira Muto , Ichio Shimizu , Katsuo Arai , Hidemasa Kagii , Hiroshi Sato , Hiroyuki Nakamura , Takuya Nakajo , Keiichi Okawa , Masahiko Osaka
IPC分类号： H01L21/00
CPC分类号： H01L23/49562 , H01L23/3107 , H01L23/49537 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/84 , H01L2224/32245 , H01L2224/371 , H01L2224/37147 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01051 , H01L2924/01067 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A semiconductor device in the form of a resin sealed semiconductor package is disclosed, wherein a gate terminal connected to a gate pad electrode formed on a surface of a semiconductor chip and a source terminal connected to a source pad electrode formed on the chip surface exposed to a back surface of a sealing resin portion, a first portion of a drain terminal connected to a back-surface drain electrode of the semiconductor chip is exposed to an upper surface of the sealing resin portion, and a second portion of the drain terminal formed integrally with the first portion of the drain terminal is exposed to the back surface of the sealing resin portion. When forming the sealing resin portion in such a semiconductor device, first the sealing resin portion is formed so as to also cover an upper surface of the first portion of the drain terminal and thereafter the upper surface side of the sealing resin portion is polished by liquid honing, thereby allowing the upper surface of the first portion of the drain terminal to be exposed on the upper surface of the sealing resin portion. Both heat dissipating property and production yield of the semiconductor device are improved.
摘要翻译： 公开了一种树脂密封半导体封装形式的半导体器件，其中连接到形成在半导体芯片的表面上的栅极焊盘电极的栅极端子和连接到形成在芯片表面上的源极焊盘电极的源极端子暴露于 密封树脂部分的背面，连接到半导体芯片的背面漏电极的漏极端子的第一部分暴露于密封树脂部分的上表面，并且漏极端子的第二部分整体地形成 漏极端子的第一部分暴露于密封树脂部分的背面。 当在这种半导体器件中形成密封树脂部分时，首先形成密封树脂部分，以便也覆盖漏极端子的第一部分的上表面，此后密封树脂部分的上表面侧被液体 从而允许排水端子的第一部分的上表面暴露在密封树脂部分的上表面上。 改善了半导体器件的散热性能和生产成本。
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公开(公告)号：US07968370B2
公开(公告)日：2011-06-28
申请号：US12267079
申请日：2008-11-07
CPC分类号： H01L23/49524 , H01L23/4952 , H01L24/03 , H01L24/05 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/84 , H01L24/91 , H01L29/7816 , H01L2224/02166 , H01L2224/04042 , H01L2224/05093 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/05624 , H01L2224/05647 , H01L2224/37147 , H01L2224/40245 , H01L2224/45014 , H01L2224/45015 , H01L2224/45144 , H01L2224/48463 , H01L2224/48624 , H01L2224/48647 , H01L2224/4903 , H01L2224/49051 , H01L2224/49171 , H01L2224/73221 , H01L2224/84801 , H01L2224/8485 , H01L2224/85399 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , H01L2924/19043 , H01L2924/00 , H01L2924/00015 , H01L2924/207
摘要： There is a need for providing a technology capable of decreasing on-resistance of a power transistor in a semiconductor device that integrates the power transistor and a control integrated circuit into a single semiconductor chip. There is another need for providing a technology capable of reducing a chip size of a semiconductor device. A semiconductor chip includes a power transistor formation region to form a power transistor, a logic circuit formation region to form a logic circuit, and an analog circuit formation region to form an analog circuit. A pad is formed in the power transistor formation region. The pad and a lead are connected through a clip whose cross section is larger than that of a wire. On the other hand, a bonding pad is connected through the wire 29.
摘要翻译： 需要提供一种能够降低将功率晶体管和控制集成电路集成到单个半导体芯片的半导体器件中的功率晶体管的导通电阻的技术。 另外需要提供能够减少半导体器件的芯片尺寸的技术。 半导体芯片包括形成功率晶体管的功率晶体管形成区域，形成逻辑电路的逻辑电路形成区域和形成模拟电路的模拟电路形成区域。 在功率晶体管形成区域中形成焊盘。 焊盘和引线通过横截面大于导线的夹子连接。 另一方面，焊盘通过导线29连接。
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公开(公告)号：US07462887B2
公开(公告)日：2008-12-09
申请号：US11503153
申请日：2006-08-14
IPC分类号： H01L31/111
CPC分类号： H01L23/49524 , H01L23/4952 , H01L24/03 , H01L24/05 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/84 , H01L24/91 , H01L29/7816 , H01L2224/02166 , H01L2224/04042 , H01L2224/05093 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/05624 , H01L2224/05647 , H01L2224/37147 , H01L2224/40245 , H01L2224/45014 , H01L2224/45015 , H01L2224/45144 , H01L2224/48463 , H01L2224/48624 , H01L2224/48647 , H01L2224/4903 , H01L2224/49051 , H01L2224/49171 , H01L2224/73221 , H01L2224/84801 , H01L2224/8485 , H01L2224/85399 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , H01L2924/19043 , H01L2924/00 , H01L2924/00015 , H01L2924/207
摘要： There is a need for providing a technology capable of decreasing on-resistance of a power transistor in a semiconductor device that integrates the power transistor and a control integrated circuit into a single semiconductor chip. There is another need for providing a technology capable of reducing a chip size of a semiconductor device. A semiconductor chip includes a power transistor formation region to form a power transistor, a logic circuit formation region to form a logic circuit, and an analog circuit formation region to form an analog circuit. A pad is formed in the power transistor formation region. The pad and a lead are connected through a clip whose cross-section is larger than that of a wire. On the other hand, a bonding pad is connected through the wire 29.
摘要翻译： 需要提供一种能够降低将功率晶体管和控制集成电路集成到单个半导体芯片的半导体器件中的功率晶体管的导通电阻的技术。 另外需要提供能够减少半导体器件的芯片尺寸的技术。 半导体芯片包括形成功率晶体管的功率晶体管形成区域，形成逻辑电路的逻辑电路形成区域和形成模拟电路的模拟电路形成区域。 在功率晶体管形成区域中形成焊盘。 焊盘和引线通过横截面大于导线的夹子连接。 另一方面，焊盘通过导线29连接。
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