公开(公告)号：US5986205A

公开(公告)日：1999-11-16

申请号：US923331

申请日：1997-09-04

申请人： Hisashi Matsune ,  Yasushi Nishimura ,  Takuji Okiyama ,  Masafumi Sano

发明人： Hisashi Matsune ,  Yasushi Nishimura ,  Takuji Okiyama ,  Masafumi Sano

IPC分类号： C21D9/46 ,  B21B1/22 ,  B21B1/28 ,  B21B3/02 ,  C21D9/52 ,  C25F1/06 ,  H01L31/0236 ,  H01L31/0392 ,  H01L31/04 ,  C23G1/19

CPC分类号： H01L31/0392 ,  B21B1/227 ,  H01L31/02366 ,  H01L31/03921 ,  B21B1/28 ,  B21B3/02 ,  Y02E10/50 ,  Y10T428/12528 ,  Y10T428/12993

摘要： The stainless steel sheet useful as a substrate for non-single crystalline semiconductor solar cells has minute ripples with undulations along a rolling direction, and its surface roughness is controlled in the range of R.sub.z 0.3-1.4 .mu.m and R.sub.max 0.5-1.7 .mu.m. It is manufactured by finish cold rolling a stainless steel strip with a reduction ratio of at least 20% at a rolling speed of at least 400 m/min. using work rolls polished with abrasives of gage #100-#400 at a final pass, annealing the rolled strip in an open-air atmosphere and then electrolytically pickling the annealed strip in a nitric acid solution. Since minute ripples with undulations are formed on the surface of the stainless steel sheet, an energy conversion efficiency is increased by acceleration of scattering and multiple reflection of incident light rays projected into a non-single crystalline semiconductor layer.

摘要翻译： 用作非单晶半导体太阳能电池的基板的不锈钢板沿着轧制方向具有波动小的波纹，其表面粗糙度控制在Rz0.3-1.4μm，Rmax为0.5-1.7μm的范围内。 通过以至少为400m / min的轧制速度将至少20％的压下率精轧冷轧不锈钢带来制造。 使用最后通过的具有量具＃100-＃400的研磨剂的工作辊，在露天气氛中退火轧制的带材，然后在硝酸溶液中电解酸洗退火的带材。 由于在不锈钢板的表面上形成具有起伏的微小波纹，所以通过散射的加速度和投射到非单晶半导体层中的入射光线的多次反射来提高能量转换效率。

公开(公告)号：US08599111B2

公开(公告)日：2013-12-03

申请号：US12162929

申请日：2007-03-08

申请人： Katsumi Abe ,  Masafumi Sano ,  Ryo Hayashi ,  Hideya Kumomi

发明人： Katsumi Abe ,  Masafumi Sano ,  Ryo Hayashi ,  Hideya Kumomi

IPC分类号： G09G3/30 ,  G09G5/10

CPC分类号： G09G3/3283 ,  G09G3/2014 ,  G09G3/325 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2310/066 ,  G09G2320/0238 ,  G09G2320/043

摘要： A driving circuit of a display element includes a current source circuit having a first transistor and a holding circuit for holding a gate voltage of the first transistor during a first period at an electric potential corresponding to a constant current to be supplied to the display element, and a control circuit including a second transistor connected in series to the current source circuit and connected in parallel to the display element and the capacitor element whose one terminal is connected to a gate of the second transistor and the other terminal is connected to a line, and controlling the light emission time of the display element by controlling the second transistor during a third period. A constant voltage is applied from the line during the first period. The gray-scale voltage is applied from the line during a second period, and the gate of the second transistor and the one terminal are short-circuited. In addition, an electric charge based on the difference between the gray-scale voltage and the gate voltage of the second transistor is accumulated in the capacitor element, and a sweep voltage is applied during the third period, so that the ON time of the second transistor is controlled.

摘要翻译： 显示元件的驱动电路包括具有第一晶体管和保持电路的电流源电路，所述保持电路用于在第一周期期间保持与要提供给显示元件的恒定电流相对应的电位的第一晶体管的栅极电压， 以及控制电路，包括与所述电流源电路串联连接并并联连接到所述显示元件的第二晶体管和所述电容器元件，所述电容器元件的一个端子连接到所述第二晶体管的栅极，并且所述另一端子连接到线路， 以及通过在第三周期期间控制所述第二晶体管来控制所述显示元件的发光时间。 在第一周期期间从线路施加恒定电压。 在第二周期期间，从线路施加灰度电压，并且第二晶体管的栅极和一个端子短路。 此外，基于第二晶体管的灰度电压和栅极电压之间的差异的电荷累积在电容器元件中，并且在第三周期期间施加扫描电压，使得第二时间的导通时间 晶体管被控制。

公开(公告)号：US08445902B2

公开(公告)日：2013-05-21

申请号：US12990408

申请日：2009-04-28

申请人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Masafumi Sano

发明人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Masafumi Sano

IPC分类号： H01L29/10 ,  H01L29/12

CPC分类号： H01L29/7869 ,  H01L29/78621

摘要： Provided are a coplanar structure thin film transistor that allows a threshold voltage to change only a little under electric stress, and a method of manufacturing the same. The thin film transistor includes on a substrate at least: a gate electrode; a gate insulating layer; an oxide semiconductor layer including a source electrode, a drain electrode, and a channel region; a channel protection layer; and an interlayer insulating layer. The channel protection layer includes one or more layers, the layer in contact with the oxide semiconductor layer among the one or more layers being made of an insulating material containing oxygen, ends of the channel protection layer are thinner than a central part of the channel protection layer, the interlayer insulating layer contains hydrogen, and regions of the oxide semiconductor layer that are in direct contact with the interlayer insulating layer form the source electrode and the drain electrode.

摘要翻译： 提供一种共面结构薄膜晶体管，其制造方法允许阈值电压在电应力下变化很小。 薄膜晶体管至少在基板上包括：栅电极; 栅极绝缘层; 包括源电极，漏电极和沟道区的氧化物半导体层; 通道保护层; 和层间绝缘层。 沟道保护层包括一层或多层，一层或多层中与氧化物半导体层接触的层由含氧的绝缘材料制成，沟道保护层的端部比通道保护层的中心部分薄 层间绝缘层含有氢，与层间绝缘层直接接触的氧化物半导体层的区域形成源电极和漏电极。

公开(公告)号：US08084331B2

公开(公告)日：2011-12-27

申请号：US12865032

申请日：2009-03-02

申请人： Masato Ofuji ,  Katsumi Abe ,  Hisae Shimizu ,  Ryo Hayashi ,  Masafumi Sano ,  Hideya Kumomi ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko

发明人： Masato Ofuji ,  Katsumi Abe ,  Hisae Shimizu ,  Ryo Hayashi ,  Masafumi Sano ,  Hideya Kumomi ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko

IPC分类号： H01L21/331

CPC分类号： H01L29/7869 ,  H01L29/66969 ,  H01L29/78633

摘要： In a method of treating a semiconductor element which at least includes a semiconductor, a threshold voltage of the semiconductor element is changed by irradiating the semiconductor with light with a wavelength longer than an absorption edge wavelength of the semiconductor. The areal density of in-gap states in the semiconductor is 1013 cm−2eV−1 or less. The band gap may be 2 eV or greater. The semiconductor may include at least one selected from the group consisting of In, Ga, Zn and Sn. The semiconductor may be one selected from the group consisting of amorphous In—Ga—Zn—O (IGZO), amorphous In—Zn—O (IZO) and amorphous Zn—Sn—O (ZTO). The light irradiation may induce the threshold voltage shift in the semiconductor element, the shift being of the opposite sign to the threshold voltage shift caused by manufacturing process history, time-dependent change, electrical stress or thermal stress.

摘要翻译： 在处理至少包括半导体的半导体元件的方法中，通过用比半导体的吸收边缘波长更长的光照射半导体来改变半导体元件的阈值电压。 半导体中间隙状态的面密度为1013cm-2eV-1或更小。 带隙可以是2eV或更大。 半导体可以包括选自In，Ga，Zn和Sn中的至少一种。 半导体可以是选自由无定形In-Ga-Zn-O（IGZO），非晶In-Zn-O（IZO）和无定形Zn-Sn-O（ZTO）组成的组中的一种。 光照射可以引起半导体元件中的阈值电压偏移，该偏移与由制造工艺历史，时间依赖变化，电应力或热应力引起的阈值电压偏移相反。

公开(公告)号：US20110042670A1

公开(公告)日：2011-02-24

申请号：US12990408

申请日：2009-04-28

申请人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Masafumi Sano

发明人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Masafumi Sano

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L29/7869 ,  H01L29/78621

摘要： Provided are a coplanar structure thin film transistor that allows a threshold voltage to change only a little under electric stress, and a method of manufacturing the same. The thin film transistor includes on a substrate at least: a gate electrode; a gate insulating layer; an oxide semiconductor layer including a source electrode, a drain electrode, and a channel region; a channel protection layer; and an interlayer insulating layer. The channel protection layer includes one or more layers, the layer in contact with the oxide semiconductor layer among the one or more layers being made of an insulating material containing oxygen, ends of the channel protection layer are thinner than a central part of the channel protection layer, the interlayer insulating layer contains hydrogen, and regions of the oxide semiconductor layer that are in direct contact with the interlayer insulating layer form the source electrode and the drain electrode.

摘要翻译： 提供一种共面结构薄膜晶体管，其制造方法允许阈值电压在电应力下变化很小。 薄膜晶体管至少在基板上包括：栅电极; 栅极绝缘层; 包括源电极，漏电极和沟道区的氧化物半导体层; 通道保护层; 和层间绝缘层。 沟道保护层包括一层或多层，一层或多层中与氧化物半导体层接触的层由含氧的绝缘材料制成，沟道保护层的端部比通道保护层的中心部分薄 层间绝缘层含有氢，与层间绝缘层直接接触的氧化物半导体层的区域形成源电极和漏电极。

公开(公告)号：US07855379B2

公开(公告)日：2010-12-21

申请号：US12123103

申请日：2008-05-19

申请人： Ryo Hayashi ,  Masafumi Sano

发明人： Ryo Hayashi ,  Masafumi Sano

IPC分类号： H01L29/10

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： In an electron device in which plural thin film transistors each having at least a source electrode, a drain electrode, a semiconductor region including a channel, a gate insulation film and a gate electrode are provided on a substrate, a device separation region provided between the plural thin film transistors and the semiconductor region are constituted by a same metal oxide layer, and resistance of the semiconductor region is formed to be lower than resistance of the device separation region.

摘要翻译： 在基板上设置有至少具有源电极，漏电极，包括沟道的半导体区域，栅极绝缘膜和栅极电极的多个薄膜晶体管的电子器件，设置在基板之间的器件分离区域 多个薄膜晶体管和半导体区域由相同的金属氧化物层构成，半导体区域的电阻形成为低于器件分离区域的电阻。

公开(公告)号：US07851792B2

公开(公告)日：2010-12-14

申请号：US12089907

申请日：2006-11-01

申请人： Toshiaki Aiba ,  Masafumi Sano ,  Nobuyuki Kaji

发明人： Toshiaki Aiba ,  Masafumi Sano ,  Nobuyuki Kaji

IPC分类号： H01L29/786

CPC分类号： H01L29/04 ,  H01L29/7869 ,  H01L29/78696

摘要： Provided is a field-effect transistor including an active layer and a gate insulating film, wherein the active layer includes an amorphous oxide layer containing an amorphous region and a crystalline region, and the crystalline region is in the vicinity of or in contact with an interface between the amorphous oxide layer and the gate insulating film.

摘要翻译： 提供了一种包括有源层和栅极绝缘膜的场效应晶体管，其中有源层包括含有非晶区域和结晶区域的非晶氧化物层，并且晶体区域在界面附近或与界面接触 在非晶氧化物层和栅极绝缘膜之间。

公开(公告)号：US07829444B2

公开(公告)日：2010-11-09

申请号：US11269641

申请日：2005-11-09

申请人： Hisato Yabuta ,  Masafumi Sano ,  Tatsuya Iwasaki ,  Hideo Hosono ,  Toshio Kamiya ,  Kenji Nomura

发明人： Hisato Yabuta ,  Masafumi Sano ,  Tatsuya Iwasaki ,  Hideo Hosono ,  Toshio Kamiya ,  Kenji Nomura

IPC分类号： H01L21/20

CPC分类号： H01L29/78618 ,  H01L29/66969 ,  H01L29/78693

摘要： Provided is a novel method for manufacturing a field effect transistor. Prior to forming an amorphous oxide layer on a substrate, ultraviolet rays are irradiated onto the substrate surface in an ozone atmosphere, plasma is irradiated onto the substrate surface, or the substrate surface is cleaned by a chemical solution containing hydrogen peroxide.

摘要翻译： 提供一种用于制造场效应晶体管的新颖方法。 在基板上形成无定形氧化物层之前，在臭氧气氛中将紫外线照射到基板表面上，将等离子体照射到基板表面上，或者通过含有过氧化氢的化学溶液清洁基板表面。

公开(公告)号：US20070184191A1

公开(公告)日：2007-08-09

申请号：US11627066

申请日：2007-01-25

申请人： Yasuyoshi Takai ,  Masafumi Sano ,  Keishi Saito

发明人： Yasuyoshi Takai ,  Masafumi Sano ,  Keishi Saito

IPC分类号： C23C16/00

CPC分类号： C23C16/24 ,  C23C16/45523 ,  C23C16/545 ,  Y02E10/545 ,  Y02E10/548

摘要： Provided is a deposited film containing microcrystalline silicon by plasma CVD, which includes changing at least one of conditions selected from a high frequency power density, a bias voltage with respect to an interelectrode distance, a bias current with respect to an electrode area, a high frequency power with respect to a source gas flow rate, a ratio of a diluting gas flow rate to a source gas flow rate, a substrate temperature, a pressure, and an interelectrode distance, between conditions for forming a deposited film of a microcrystalline region and conditions for forming a deposited film of an amorphous region; and forming a deposited film under conditions within a predetermined range in the vicinity of boundary conditions under which the crystal system of the deposited film substantially changes between a amorphous state and a microcrystalline state.

摘要翻译： 提供了通过等离子体CVD包含微晶硅的沉积膜，其包括改变选自高频功率密度，相对于电极间距离的偏置电压，相对于电极面积的偏置电流，高电平 用于形成微晶区域的沉积膜的条件和相对于源气体流量的稀释气体流量的比率，稀释气体流量与源气体流量的比率，基板温度，压力和电极间距离 形成非晶区沉积膜的条件; 以及在沉积膜的晶体系统在非晶态和微晶态之间基本上变化的边界条件附近的预定范围内的条件下形成沉积膜。

公开(公告)号：US20060113539A1

公开(公告)日：2006-06-01

申请号：US11269647

申请日：2005-11-09

申请人： Masafumi Sano ,  Katsumi Nakagawa ,  Hideo Hosono ,  Toshio Kamiya ,  Kenji Nomura

发明人： Masafumi Sano ,  Katsumi Nakagawa ,  Hideo Hosono ,  Toshio Kamiya ,  Kenji Nomura

IPC分类号： H01L29/04 ,  H01L27/12 ,  H01L31/0376

CPC分类号： H01L29/51 ,  H01L21/02422 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L29/7869

摘要： A novel field-effect transistor is provided which employs an amorphous oxide. In an embodiment of the present invention, the transistor comprises an amorphous oxide layer containing electron carrier at a concentration less than 1×10−18/cm3, and the gate-insulating layer is comprised of a first layer being in contact with the amorphous oxide and a second layer different from the first layer.

摘要翻译： 提供了一种采用无定形氧化物的新型场效应晶体管。 在本发明的一个实施例中，晶体管包括含有浓度小于1×10 -6 / cm 3的电子载流子的无定形氧化物层，栅极绝缘层 包括与非晶氧化物接触的第一层和不同于第一层的第二层。